Abstract: Methods of forming and processing semiconductor devices are described. Certain embodiments relate to the formation of self-aligned DRAM capacitors. More particularly, certain embodiments relate to the formation of self-aligned DRAM capacitors utilizing the formation of self-aligned growth pillars. The pillars lead to greater capacitor heights, increase critical dimension uniformity, and self-aligned bottom and top contacts.

Abstract: Memory devices are described. The memory devices include a plurality of bit lines extending through a stack of alternating memory layers and dielectric layers. Each of the memory layers comprises a single crystalline-like silicon layer and includes a first word line, a second word line, a first capacitor, and a second capacitor. Methods of forming stacked memory devices are also described.

Abstract: A resonant-filter image sensor includes a pixel array including a plurality of pixels and a microresonator layer above the pixel array. The microresonator layer includes a plurality of microresonators formed of a first material with an extinction coefficient less than 0.02 at a free-space wavelength of five hundred nanometers. Each of the plurality of pixels may have at least one of the plurality of microresonators at least partially thereabove. The resonant-filter image sensor may further include a layer covering the microresonator layer that has a second refractive index less than a first refractive index, the first refractive index being the refractive index of the first material. Each microresonator may be one of a parallelepiped, a cylinder, a spheroid, and a sphere.

Abstract: An eye wear comprises an optical filter disposed in front of an eye. The optical filter has a transmittance function of wavelength comprising a transmittance peak having a peak transmittance and a transmittance bandwidth. A transmittance outside the transmittance peak is at a lower level transmittance, wherein a ratio of the lower level transmittance to the peak transmittance is less than unity. The transmittance peak is at a central wavelength of a laser that emits laser light forming one of a laser spot and a laser line. The transmittance bandwidth is larger than a bandwidth of the laser light emitted by the laser. The laser spot or the laser line formed by the laser light emitted by the laser is viewed through the eye wear.

Abstract: A display system comprises a first display for providing a first value and a second display for providing a second value. The displayed image is a product of multiplication of the first value provided by the first display and the second value provided by the second display. The first display is a transmissive display comprises: a first glass substrate, an unpatterned ITO layer, a LC layer, a patterned ITO layer having isolated electrodes, and a second glass substrate. The second display is a reflective LCOS comprises: a glass substrate, an unpatterned ITO layer, a LC layer, a metal electrode layer, and a silicon substrate.

Abstract: A display system comprises a first display for providing a first value and a second display for providing a second value. The displayed image is a product of multiplication of the first value provided by the first display and the second value provided by the second display. The first display is a transmissive display comprises: a first glass substrate, an unpatterned ITO layer, a LC layer, a patterned ITO layer having isolated electrodes, and a second glass substrate. The second display is a reflective LCOS comprises: a glass substrate, an unpatterned ITO layer, a LC layer, a metal electrode layer, and a silicon substrate.

Abstract: A display system includes a display positioned to show images to a user, and a sensor positioned to monitor a gaze location of an eye of the user. A controller is coupled to the display and the sensor, and the controller includes logic that causes the display system to perform operations. For example, the controller may receive the gaze location information from the sensor, and determine the gaze location of the eye. First resolution image data is output to the display for a first region in the images. Second resolution image data is output to the display for a second region in the images. And third resolution image data is output to the display for a third region in the images.

Abstract: A resonant-filter image sensor includes a pixel array including a plurality of pixels and a microresonator layer above the pixel array. The microresonator layer includes a plurality of microresonators formed of a first material with an extinction coefficient less than 0.02 at a free-space wavelength of five hundred nanometers. Each of the plurality of pixels may have at least one of the plurality of microresonators at least partially thereabove. The resonant-filter image sensor may further include a layer covering the microresonator layer that has a second refractive index less than a first refractive index, the first refractive index being the refractive index of the first material. Each microresonator may be one of a parallelepiped, a cylinder, a spheroid, and a sphere.

Abstract: An alignment layer for a liquid crystal on silicon (LCOS) display includes a nano-particle layer. In a particular embodiment the nano-particle layer includes a lower nano-layer and an upper nano-layer, each formed onto oxide layers of the LCOS display. In a more particular embodiment, the lower nano-layer and the upper nano-layer are offset printed onto the oxide layers.

Abstract: A resonant-filter image sensor includes a pixel array including a plurality of pixels and a microresonator layer above the pixel array. The microresonator layer includes a plurality of microresonators formed of a first material with an extinction coefficient less than 0.02 at a free-space wavelength of five hundred nanometers. Each of the plurality of pixels may have at least one of the plurality of microresonators at least partially thereabove. The resonant-filter image sensor may further include a layer covering the microresonator layer that has a second refractive index less than a first refractive index, the first refractive index being the refractive index of the first material. Each microresonator may be one of a parallelepiped, a cylinder, a spheroid, and a sphere.

Abstract: An alignment layer for a liquid crystal on silicon (LCOS) display includes a nano-particle layer. In a particular embodiment the nano-particle layer includes a lower nano-layer and an upper nano-layer, each formed onto oxide layers of the LCOS display. In a more particular embodiment, the lower nano-layer and the upper nano-layer are offset printed onto the oxide layers.

Abstract: A resonant-filter image sensor includes a pixel array including a plurality of pixels and a microresonator layer above the pixel array. The microresonator layer includes a plurality of microresonators formed of a first material with an extinction coefficient less than 0.02 at a free-space wavelength of five hundred nanometers. Each of the plurality of pixels may have at least one of the plurality of microresonators at least partially thereabove. The resonant-filter image sensor may further include a layer covering the microresonator layer that has a second refractive index less than a first refractive index, the first refractive index being the refractive index of the first material. Each microresonator may be one of a parallelepiped, a cylinder, a spheroid, and a sphere.

Abstract: A method of image sensor fabrication includes providing a plurality of photodiodes disposed in a semiconductor material and a floating diffusion disposed in the semiconductor material. The method also includes providing peripheral circuitry disposed in the semiconductor material, including a first electrical contact to the semiconductor material, and forming a transfer gate disposed to transfer image charge from the photodiode to the floating diffusion. An isolation layer is deposited on a surface of the semiconductor material, and contact holes are etched in the isolation layer. A first silicide layer disposed on the floating diffusion, a second silicide layer disposed on the transfer gate, and a third silicide layer disposed on the first electrical contact to the semiconductor material are formed in the contact holes by depositing a silicon layer in the contact holes and metalizing the silicon layer.

Abstract: An image sensor includes a photodiode disposed in semiconductor material. The photodiode is one of a plurality of photodiodes formed in an array. The image sensor also includes a floating diffusion disposed in the semiconductor material, and the floating diffusion is disposed adjacent to the photodiode in the plurality of photodiodes. A transfer gate is disposed to transfer image charge generated in the individual photodiode into the floating diffusion. Peripheral circuitry is disposed in the semiconductor material and includes a first electrical contact to the semiconductor material. A first silicide layer is disposed on the floating diffusion, a second silicide layer is disposed on the transfer gate, and a third silicide layer is disposed on the first electrical contact to the semiconductor material.

Abstract: Systems and methods for chemical mechanical planarization topography control via implants are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes increasing the content of at least one of silicon or germanium in at least select regions of a dielectric material thereby reducing the material removal rate for a chemical mechanical polishing (CMP) process at the select regions, and removing material from the dielectric material using the CMP process. In another embodiment, a method of manufacturing a semiconductor device includes increasing content of at least one of boron, phosphorus, or hydrogen in at least select regions of a dielectric material thereby increasing the material removal rate of a CMP process at the select regions, and removing material from the dielectric material using the CMP process.

Abstract: Systems and methods for chemical mechanical planarization topography control via implants are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes increasing the content of at least one of silicon or germanium in at least select regions of a dielectric material thereby reducing the material removal rate for a chemical mechanical polishing (CMP) process at the select regions, and removing material from the dielectric material using the CMP process. In another embodiment, a method of manufacturing a semiconductor device includes increasing content of at least one of boron, phosphorus, or hydrogen in at least select regions of a dielectric material thereby increasing the material removal rate of a CMP process at the select regions, and removing material from the dielectric material using the CMP process.

Abstract: A method of forming capacitors includes providing a support material over a substrate. The support material is at least one of semiconductive or conductive. Openings are formed into the support material. The openings include at least one of semiconductive or conductive sidewalls. An insulator is deposited along the semiconductive and/or conductive opening sidewalls. A pair of capacitor electrodes having capacitor dielectric there-between is formed within the respective openings laterally inward of the deposited insulator. One of the pair of capacitor electrodes within the respective openings is laterally adjacent the deposited insulator. Other aspects are disclosed, including integrated circuitry independent of method of manufacture.

Abstract: Some embodiments include methods of forming isolation structures. A semiconductor base may be provided to have a crystalline semiconductor material projection between a pair of openings. SOD material (such as, for example, polysilazane) may be flowed within said openings to fill the openings. After the openings are filled with the SOD material, one or more dopant species may be implanted into the projection to amorphize the crystalline semiconductor material within an upper portion of said projection. The SOD material may then be annealed at a temperature of at least about 400° C. to form isolation structures. Some embodiments include semiconductor constructions that include a semiconductor material base having a projection between a pair of openings. The projection may have an upper region over a lower region, with the upper region being at least 75% amorphous, and with the lower region being entirely crystalline.

Abstract: Semiconductor devices and methods for forming semiconductor devices are provided, including semiconductor devices that comprise one or more diffusion regions in a semiconductor, the one or more diffusion regions being adjacent to a gate formed adjacent to a surface of the semiconductor (e.g., a semiconductor substrate). The one or more diffusion regions comprise a first width at a depth below the surface of the semiconductor and a second width near the surface of the semiconductor, the second width of the one or more diffusion regions being less than about 40% greater than the first width.

Abstract: A method of forming capacitors includes providing a support material over a substrate. The support material is at least one of semiconductive or conductive. Openings are formed into the support material. The openings include at least one of semiconductive or conductive sidewalls. An insulator is deposited along the semiconductive and/or conductive opening sidewalls. A pair of capacitor electrodes having capacitor dielectric there-between is formed within the respective openings laterally inward of the deposited insulator. One of the pair of capacitor electrodes within the respective openings is laterally adjacent the deposited insulator. Other aspects are disclosed, including integrated circuitry independent of method of manufacture.