Patents by Inventor Li Cheng

Li Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240047552
    Abstract: The present disclosure provides an embodiment of a method. The method includes patterning a substrate to form trenches; etching the substrate, thereby modifying the trenches with round tips; forming a stack including conductive layers and dielectric layers in the trenches, wherein the conductive layers and the dielectric layers alternate with one another within the stack; forming an insulating compressive film in the first trenches, thereby sealing voids in the trenches; and forming conductive plugs connected to the conductive layers, respectively.
    Type: Application
    Filed: May 17, 2023
    Publication date: February 8, 2024
    Inventors: Fu-Chiang Kuo, Hsin-Liang Chen, Hsin-Li Cheng, Ting-Chen Hsu
  • Publication number: 20240029354
    Abstract: Systems and techniques are provided for generating a texture for a three-dimensional (3D) facial model. For example, a process can include obtaining a first frame, the first frame including a first portion of a face. In some aspects, the process can include generating a 3D facial model based on the first frame and generating a first facial feature corresponding to the first portion of the face. In some examples, the process includes obtaining a second frame, the second frame including a second portion of the face. In some cases, the second portion of the face at least partially overlaps the first portion of the face. In some examples, the process includes combining the first facial feature with the second facial feature to generate an enhanced facial feature, wherein the combining is performed to enhance an appearance of select areas of the enhanced facial feature.
    Type: Application
    Filed: July 19, 2022
    Publication date: January 25, 2024
    Inventors: Ke-Li CHENG, Anupama S, Kuang-Man HUANG, Chieh-Ming KUO, Avani RAO, Chiranjib CHOUDHURI, Michel Adib SARKIS, Ning BI, Ajit Deepak GUPTE
  • Publication number: 20240030359
    Abstract: The present disclosure provides a semiconductor device, including a first semiconductor structure and a second semiconductor structure. Each of the first semiconductor structure and the second semiconductor structure includes a substrate; a through silicon via, penetrating the substrate; and a deep trench capacitor, disposed in the substrate, separated from the TSV by a distance. The deep trench capacitor includes a stack, including a dielectric layer between a pair of conductive layers in a trench; and an insulating layer, covering the stack and the trench. The insulating layer surround a plurality of voids in the trench.
    Type: Application
    Filed: July 21, 2022
    Publication date: January 25, 2024
    Inventors: SHU-HUI SU, HSIN-LI CHENG, YINGKIT FELIX TSUI, YU-CHI CHANG, HSUAN-NING SHIH
  • Patent number: 11879071
    Abstract: The present disclosure discloses a low-viscosity thermosetting starch adhesive for particleboards, and a preparation method therefore, belonging to the technical field of adhesive preparation. The adhesive of the present invention selects N-hydroxyethyl acrylamide or acetoxyethyl methacrylate as the crosslinking monomer, which has a low degree of crosslinking in the process of adhesive preparation to avoid the problem of increasing viscosity, but can cross-link quickly during the hot pressing process, forming a network structure, and improving the water resistance of the adhesive; and furthermore, itaconic acid is added to promote the self-crosslinking reaction of the crosslinking monomer in the hot-pressing process, thus further improving the water resistance.
    Type: Grant
    Filed: June 13, 2023
    Date of Patent: January 23, 2024
    Assignee: JIANGNAN UNIVERSITY
    Inventors: Li Cheng, Junnan Jin, Zhengbiao Gu, Zhaofeng Li, Yan Hong, Caiming Li, Xiaofeng Ban
  • Publication number: 20240021431
    Abstract: An apparatus, semiconductor device and method of manufacture are presented, wherein a hard mask layer and one or more etch stop layers are etched in an etching chamber. In an embodiment the semiconductor device is placed on a mounting platform at a first height and an etch process is performed, then the semiconductor device is moved to a second height within the chamber and a second etch process is performed, with the rotational speed of the semiconductor device reduced during movements in order to reduce the chance of cross contamination.
    Type: Application
    Filed: July 28, 2023
    Publication date: January 18, 2024
    Inventors: Wan Hsuan Hsu, Jao Sheng Huang, Yen-Chiu Kuo, Yu-Li Cheng, Ya Tzu Chen, Neng-Jye Yang, Chun-Li Chou
  • Publication number: 20240014254
    Abstract: Various embodiments of the present application are directed towards an integrated chip (IC). The IC comprises a trench capacitor overlying a substrate. The trench capacitor comprises a plurality of capacitor electrode structures, a plurality of warping reduction structures, and a plurality of capacitor dielectric structures. The plurality of capacitor electrode structures, the plurality of warping reduction structures, and the plurality of capacitor dielectric structures are alternatingly stacked and define a trench segment that extends vertically into the substrate. The plurality of capacitor electrode structures comprise a metal component and a nitrogen component. The plurality of warping reduction structures comprise the metal component, the nitrogen component, and an oxygen component.
    Type: Application
    Filed: July 11, 2022
    Publication date: January 11, 2024
    Inventors: Ting-Chen Hsu, Hsin-Li Cheng, Jyun-Ying Lin, Yingkit Felix Tsui, Shu-Hui Su, Shi-Min Wu
  • Publication number: 20240005607
    Abstract: Techniques are provided for generating three-dimensional models of objects from one or more images or frames. For example, at least one frame of an object in a scene can be obtained. A portion of the object is positioned on a plane in the at least one frame. The plane can be detected in the at least one frame and, based on the detected plane, the object can be segmented from the plane in the at least one frame. A three-dimensional (3D) model of the object can be generated based on segmenting the object from the plane. A refined mesh can be generated for a portion of the 3D model corresponding to the portion of the object positioned on the plane.
    Type: Application
    Filed: July 17, 2023
    Publication date: January 4, 2024
    Inventors: Ke-Li CHENG, Kuang-Man HUANG, Michel Adib SARKIS, Gerhard REITMAYR, Ning BI
  • Publication number: 20230410447
    Abstract: Systems and techniques are provided for generating a three-dimensional (3D) facial model. For example, a process can include obtaining at least one input image associated with a face. In some aspects, the process can include obtaining a pose for a 3D facial model associated with the face. In some examples, the process can include generating, by a machine learning model, the 3D facial model associated with the face. In some cases, one or more parameters associated with a shape component of the 3D facial model are conditioned on the pose. In some implementations, the 3D facial model is configured to vary in shape based on the pose for the 3D facial model associated with the face.
    Type: Application
    Filed: June 21, 2022
    Publication date: December 21, 2023
    Inventors: Ke-Li CHENG, Anupama S, Kuang-Man HUANG, Chieh-Ming KUO, Avani RAO, Chiranjib CHOUDHURI, Michel Adib SARKIS, Ajit Deepak GUPTE, Ning BI
  • Patent number: 11834591
    Abstract: The present disclosure discloses a thermosetting starch adhesive for a wood-based panel and a preparation method therefor, and belongs to the technical field of preparation of adhesives. In the present disclosure, starch is used as a main raw material, and after acid hydrolysis thereof, a semi-continuous seed emulsion polymerization method is adopted to improve control of monomer polymerization stability. After grafting is completed, a cross-linking monomer with polymerizable double bonds and condensable methylol functional groups is added for copolymerization. The cross-linking monomer is also added in a semi-continuous manner. After the cross-linking reaction is completed, the reaction mixture is gelatinized and incubated, and finally a thermosetting adhesive which can be used for bonding of hot-pressed wood-based panels is obtained.
    Type: Grant
    Filed: April 16, 2020
    Date of Patent: December 5, 2023
    Assignee: JIANGNAN UNIVERSITY
    Inventors: Li Cheng, Zhengbiao Gu, Yong Gu, Zhaofeng Li, Yan Hong, Caiming Li
  • Publication number: 20230378251
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a capacitor over a substrate. The capacitor includes a plurality of conductive layers and a plurality of dielectric layers. The plurality of conductive layers and dielectric layers define a base structure and a first protrusion structure extending downward from the base structure towards a bottom surface of the substrate. The first protrusion structure comprises one or more surfaces defining a first cavity. A top of the first cavity is disposed below the base structure.
    Type: Application
    Filed: July 31, 2023
    Publication date: November 23, 2023
    Inventors: Hsin-Li Cheng, Jyun-Ying Lin, Alexander Kalnitsky, Shih-Fen Huang, Shu-Hui Su, Ting-Chen Hsu, Tuo-Hsin Chien, Felix Ying-Kit Tsui, Shi-Min Wu, Yu-Chi Chang
  • Publication number: 20230367942
    Abstract: Implementations of the present disclosure provide coloring methods that sort and pre-color nodes of G0-linked networks in a multiple-patterning technology (MPT)-compliant layout design by coordinate. In one embodiment, a method includes identifying target networks in a circuit layout, each target network having two or more linked nodes representing circuit patterns, and each target network being presented in an imaginary X-Y coordinate plane, assigning a first feature to a first node in each target network, the first node is determined using a coordinate-based method, and assigning the first feature and a second feature to remaining nodes in each target network in an alternating manner so that any two immediately adjacent linked nodes in each target network have different features.
    Type: Application
    Filed: July 26, 2023
    Publication date: November 16, 2023
    Inventors: Chia-Ping CHIANG, Ming-Hui CHIH, Chih-Wei HSU, Ping-Chieh WU, Ya-Ting CHANG, Tsung-Yu WANG, Wen-Li CHENG, Hui En YIN, Wen-Chun HUANG, Ru-Gun LIU, Tsai-Sheng GAU
  • Publication number: 20230361166
    Abstract: A capacitor structure and method of forming the capacitor structure is provided, including a providing a doped region of a substrate having a two-dimensional trench array with a plurality of segments defined therein. Each of the plurality of segments has an array of a plurality of recesses extending along the substrate, where the plurality of segments are rotationally symmetric about a center of the two-dimensional trench array. A first conducting layer is presented over the surface and a bottom and sidewalls of the recesses and is insulated from the substrate by a first dielectric layer. A second conducting layer is presented over the first conducting layer and is insulated by a second dielectric layer. First and second contacts respectively connect to an exposed top surface of the first conducting layer and second conducting layer. A third contact connects to the substrate within a local region to the capacitor structure.
    Type: Application
    Filed: June 26, 2023
    Publication date: November 9, 2023
    Inventors: Jyun-Ying Lin, Hsin-Li Cheng, Jing-Hwang Yang, Felix Ying-Kit Tsui, Chien-Li Kuo
  • Patent number: 11809649
    Abstract: An electronic ink screen and a method for manufacturing the same are provided. The electronic ink screen includes: a display module including pixel units configured to display by using electronic ink; and a control module configured to convert a touch signal applied from outside into a change of electric signal of corresponding one or more pixel units through an electrode microstructure, so that a display state of the corresponding one or more pixel units is changed from an initial state; the electrode microstructure includes sub-electrode microstructures, each sub-electrode microstructure includes a first nano electrode and a second nano electrode which are made of different materials, the first nano electrode and the second nano electrode are arranged at intervals and configured to be in mutual friction contact in response to that the touch signal applied from the outside is received, so as to generate charge transferring.
    Type: Grant
    Filed: November 29, 2019
    Date of Patent: November 7, 2023
    Assignees: FUZHOU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Li Cheng, Jianming Huang, Hailong Yu, Yabin Lin, Chuanhe Jing, Wanping Pan, Xianjuan Jin
  • Publication number: 20230340152
    Abstract: The present disclosure provides anti-CD73 binding molecules, e.g., antibodies and antigen binding fragments thereof. Also provided are pharmaceutical formulations comprising the disclosed compositions, and methods for the diagnosis and treatment of diseases associated with CD73-expression, e.g., cancer. Such diseases can be treated, e.g., by direct therapy with the anti-CD73 binding molecules disclosed herein (e.g., naked antibodies or antibody-drug conjugates that bind CD73), by adjuvant therapy with other antigen-binding anticancer agents such as immune checkpoint inhibitors (e.g., anti-CTLA-4 and anti-PD-1 monoclonal antibodies), and/or by combination therapies where the anti-CD73 molecules are administered before, after, or concurrently with chemotherapy.
    Type: Application
    Filed: November 30, 2022
    Publication date: October 26, 2023
    Inventors: Carl HAY, Kris SACHSENMEIER, Erin SULT, Qihui Huang, Peter PAVLIK, Melissa DAMSCHRODER, Li CHENG, Gundo DIEDRICH, Jonathan RIOS-DORIA, Scott HAMMOND, Ralph MINTER, Steve RUST, Sandrine GUILLARD, Robert HOLLINGSWORTH, Lutz JERMUTUS, Nicholas DURHAM, Ching Ching LEOW, Mary ANTONYSAMY, James GEOGHEGAN, Xiaojun LU, Kim ROSENTHAL
  • Patent number: 11790145
    Abstract: Implementations of the present disclosure provide coloring methods that sort and pre-color nodes of G0-linked networks in a multiple-patterning technology (MPT)-compliant layout design by coordinate. In one embodiment, a method includes identifying target networks in a circuit layout, each target network having two or more linked nodes representing circuit patterns, and each target network being presented in an imaginary X-Y coordinate plane, assigning a first feature to a first node in each target network, the first node is determined using a coordinate-based method, and assigning the first feature and a second feature to remaining nodes in each target network in an alternating manner so that any two immediately adjacent linked nodes in each target network have different features.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: October 17, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia-Ping Chiang, Ming-Hui Chih, Chih-Wei Hsu, Ping-Chieh Wu, Ya-Ting Chang, Tsung-Yu Wang, Wen-Li Cheng, Hui En Yin, Wen-Chun Huang, Ru-Gun Liu, Tsai-Sheng Gau
  • Publication number: 20230323164
    Abstract: The present disclosure discloses a low-viscosity thermosetting starch adhesive for particleboards, and a preparation method therefore, belonging to the technical field of adhesive preparation. The adhesive of the present invention selects N-hydroxyethyl acrylamide or acetoxyethyl methacrylate as the crosslinking monomer, which has a low degree of crosslinking in the process of adhesive preparation to avoid the problem of increasing viscosity, but can cross-link quickly during the hot pressing process, forming a network structure, and improving the water resistance of the adhesive; and furthermore, itaconic acid is added to promote the self-crosslinking reaction of the crosslinking monomer in the hot-pressing process, thus further improving the water resistance.
    Type: Application
    Filed: June 13, 2023
    Publication date: October 12, 2023
    Inventors: Li Cheng, Junnan Jin, Zhengbiao Gu, Zhaofeng Li, Yan Hong, Caiming Li, Xiaofeng Ban
  • Patent number: 11771676
    Abstract: Disclosed is a method for preparing high-load oral paclitaxel capsule for a slow release in colon, belonging to the field of porous starch drug loading. The preparation method of the present disclosure includes the following steps: (1) dripping an ethanol solution of paclitaxel into a water phase and drying the solution to obtain an amorphous paclitaxel microsphere; (2) redissolving the paclitaxel microsphere prepared in step (1) in the ethanol solution, dispersing porous starch in the ethanol solution for adsorption, volatilizing a solvent in an oven, washing the porous starch with the ethanol solution to remove unadsorbed paclitaxel, and centrifuging same to obtain a precipitate, namely the porous starch loaded with paclitaxel; and (3) dispersing the porous starch loaded with paclitaxel prepared in step (2) in a chitosan solution, dropwise adding the solution into a phytic acid solution, and stirring the solution for 4 hours to obtain a coated capsule.
    Type: Grant
    Filed: March 27, 2023
    Date of Patent: October 3, 2023
    Assignee: JIANGNAN UNIVERSITY
    Inventors: Yan Hong, Beibei Zhao, Zhengbiao Gu, Li Cheng, Zhaofeng Li, Caiming Li, Xiaofeng Ban
  • Patent number: 11776818
    Abstract: An apparatus, semiconductor device and method of manufacture are presented, wherein a hard mask layer and one or more etch stop layers are etched in an etching chamber. In an embodiment the semiconductor device is placed on a mounting platform at a first height and an etch process is performed, then the semiconductor device is moved to a second height within the chamber and a second etch process is performed, with the rotational speed of the semiconductor device reduced during movements in order to reduce the chance of cross contamination.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: October 3, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wan Hsuan Hsu, Jao Sheng Huang, Yen-Chiu Kuo, Yu-Li Cheng, Ya Tzu Chen, Neng-Jye Yang, Chun-Li Chou
  • Patent number: 11769792
    Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) including a substrate comprising sidewalls that define a trench. A capacitor comprising a plurality of conductive layers and a plurality of dielectric layers that define a trench segment is disposed within the trench. A width of the trench segment continuously increases from a front-side surface of the substrate in a direction towards a bottom surface of the trench.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: September 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsin-Li Cheng, Jyun-Ying Lin, Alexander Kalnitsky, Shih-Fen Huang, Shu-Hui Su, Ting-Chen Hsu, Tuo-Hsin Chien, Felix Ying-Kit Tsui, Shi-Min Wu, Yu-Chi Chang
  • Publication number: 20230299073
    Abstract: A semiconductor structure includes a semiconductor substrate, a serpentine-shaped resistor, and a MOS transistor. The semiconductor substrate includes an isolation structure and an active region. The serpentine-shaped resistor is over the isolation structure. The serpentine-shaped resistor extends in a length direction and has a width that is equal to or greater than about 3.6 ?m in a width direction. The MOS transistor is over the active region of the semiconductor substrate.
    Type: Application
    Filed: March 17, 2022
    Publication date: September 21, 2023
    Inventors: LIANG-TAI KUO, HSIN-LI CHENG, YINGKIT FELIX TSUI