Abstract: A semiconductor substrate with an original semiconductor surface (OSS); a first gate region; a first concave formed in the semiconductor substrate and below the original semiconductor surface; a curved or depressed shape opening formed along the vertical direction of a sidewall of the semiconductor substrate in the first concave; and a first conductive region formed in the first concave and including a first doping region and a second doping region. Wherein the first doping region is formed based on the curved or depressed shape opening along the vertical direction of the sidewall of the semiconductor substrate.

Abstract: A transistor structure and a formation method thereof are provided. The transistor structure includes a transistor device, formed on an active region of a semiconductor substrate, and including: a gate structure, disposed on the active region; gate spacers, formed along opposite sidewalls of the gate structure; source/drain structures, formed in recesses of the active region at opposite sides of the gate structure; and buried isolation structures, separately extending along bottom sides of the source/drain structures. Further, a channel portion of the active region between the source/drain structures is strained as a result of a strained etching stop layer lying above or dislocation stressors formed in the source/drain structures.

Abstract: A memory device and a manufacturing method thereof are provided. The memory device includes an access transistor defined within an active region of a semiconductor substrate and a storage capacitor disposed on the access transistor. A recessed gate structure of the access transistor extends into the active region from above the active region. Source/drain contacts of the access transistor are disposed on the active region at opposite sides of the recessed gate structure. The storage capacitor includes: a composite bottom electrode, formed by alternately stacked first conductive layers and second conductive layers, wherein each second conductive layer is sandwiched between a pair of the first conductive layers, and tunnels laterally extend through the second conductive layers, respectively; a capacitor dielectric layer, covering inner and outer surfaces of the composite bottom electrode; and a top electrode, in contact with the composite bottom electrode through the capacitor dielectric layer.

Abstract: An IC device includes first through third rows of fin field-effect transistors (FinFETs), wherein the second row is between and adjacent to each of the first and third rows, the FinFETs of the first row are one of an n-type or p-type, the FinFETs of the second and third rows are the other of the n-type or p-type, the FinFETs of the first and third rows include a first total number of fins, and the FinFETs of the second row include a second total number of fins one greater or fewer than the first total number of fins.

Abstract: A method of packaging a semiconductor includes: positioning first and second semiconductor dies by one another on a carrier substrate, wherein first and second zones zone are defined with respect to the first die and third and fourth zones are defined with respect to the second die; forming first vias in the first zone, the first vias having a first size; forming second vias in the second zone, the second vias having a second size different from the first; forming third vias in the third zone, the third vias having a third size; forming fourth vias in the fourth zone, the fourth vias having a fourth size different from the third; and electrically connecting the first and second dies with an interconnection die such that electrical signals are exchangeable therebetween.

Abstract: A spliced display including a transparent substrate, a plurality of micro (light-emitting diodes) LEDs, and a plurality of light sensors is provided. The transparent substrate has a display surface and a back surface opposite to each other. The driving backplanes are disposed on the back surface of the transparent substrate to be spliced with each other. The micro LEDs are disposed on the driving backplanes respectively and located between the micro LEDs and the transparent substrate. Each of the driving backplanes is corresponding to parts of the micro LEDs. The light sensors are disposed on the transparent substrate and located between the driving backplanes and the transparent substrate. Each of the light sensors is adjacent to at least two of the micro LEDs, and at least one of the at least two of the micro LEDs is adjacent to two of the light sensor.

Abstract: A massive testing system of a micro integrated circuit includes: a first test area including a plurality of test pads and a plurality of reading pads, and disposed on scribe lines; a plurality of test controllers disposed on the scribe lines one by one; and a probe configured to contact the first test area to test a plurality of rows of integrated circuit chips; wherein each of the plurality of test controllers is configured to test a respective one of the plurality of rows of integrated circuit chips row by row; wherein the probe merely contacts the first test area once; wherein the plurality of reading pads are configured to read test results of each of the plurality of rows of integrated circuit chips row by row.

Abstract: A massive testing system of a micro integrated circuit includes: a first test area including a plurality of test pads and a plurality of reading pads, and disposed on scribe lines; a plurality of test controllers disposed on the scribe lines one by one; and a probe configured to contact the first test area to test a plurality of rows of integrated circuit chips; wherein each of the plurality of test controllers is configured to test a respective one of the plurality of rows of integrated circuit chips row by row; wherein the probe merely contacts the first test area once; wherein the plurality of reading pads are configured to read test results of each of the plurality of rows of integrated circuit chips row by row.

Abstract: A spliced display including a transparent substrate, a plurality of light emitting diode modules, at least one control element and a signal transmission structure is provided. The transparent substrate has a display surface and a back surface opposite to each other. The light emitting diode modules are disposed on the back surface of the transparent substrate to be spliced with each other. Each of the light emitting diode modules includes a driving backplane and a plurality of micro light emitting diodes, and the micro LEDs are disposed in an array between the driving backplane and the transparent substrate. The control element is disposed on the transparent substrate. The control element is connected to the light emitting diode modules via the signal transmission structure, and the light emitting diode modules are connected to each other via the signal transmission structure.

Abstract: A spliced display including a transparent substrate, a plurality of micro (light-emitting diodes) LEDs, and a plurality of light sensors is provided. The transparent substrate has a display surface and a back surface opposite to each other. The driving backplanes are disposed on the back surface of the transparent substrate to be spliced with each other. The micro LEDs are disposed on the driving backplanes respectively and located between the micro LEDs and the transparent substrate. Each of the driving backplanes is corresponding to parts of the micro LEDs. The light sensors are disposed on the transparent substrate and located between the driving backplanes and the transparent substrate. Each of the light sensors is adjacent to at least two of the micro LEDs, and at least one of the at least two of the micro LEDs is adjacent to two of the light sensor.

Abstract: A computer mouse includes abase unit, a button unit, and a fastening unit. The button unit is pivotally mounted to the base unit via a front part of the button unit, and is able to be actuated to allow a rear part of the button unit to substantially pivot in an up-down direction relative to the base unit. The fastening unit is disposed between the base unit and the button unit, and is operable to position the button unit relative to the base unit.

Abstract: A computer mouse includes abase unit, a button unit, and a fastening unit. The button unit is pivotally mounted to the base unit via a front part of the button unit, and is able to be actuated to allow a rear part of the button unit to substantially pivot in an up-down direction relative to the base unit. The fastening unit is disposed between the base unit and the button unit, and is operable to position the button unit relative to the base unit.

Abstract: An apparatus and a method for accessing a plurality of memory blocks is disclosed. The An apparatus comprises: a memory circuit configured to store a recording table, wherein the recording table corresponds to quality index of the plurality of memory blocks; and a control circuit configured to group the plurality of memory blocks to a first memory group and a second memory group according to the quality index; to enable to access the memory blocks in the first memory group, and to disable to access the memory blocks in the second memory group.

Abstract: A power quality detecting system includes a power module, a storage device, and a power quality detecting module. The power module receives an external power source. The power module converts the external power source into a first internal voltage. The power quality detecting module is electrically connected to the power module and the storage device. The storage device is electrically connected to the power module for receiving the first internal voltage through the power quality detecting module. The power quality detecting module determines whether a first alarm signal is transmitted according to a quality parameter of the first internal voltage.

Abstract: A spliced display including a transparent substrate, a plurality of (light-emitting diode) LED modules, at least one control element, and a signal transmission structure is provided. The transparent substrate has a display surface and a back surface opposite to each other. The LED modules are disposed on the back surface of the transparent substrate to be spliced with each other. Each of the LED modules includes a driving backplane and a plurality of micro LEDs, and the micro LEDs are disposed in an array between the driving backplane and the transparent substrate. The control element is disposed on the transparent substrate. The control element is connected to the LED modules via the signal transmission structure, and the LED modules are connected to each other via the signal transmission structure.

Abstract: A spliced display including a transparent substrate, a plurality of light emitting diode modules, at least one control element and a signal transmission structure is provided. The transparent substrate has a display surface and a back surface opposite to each other. The light emitting diode modules are disposed on the back surface of the transparent substrate to be spliced with each other. Each of the light emitting diode modules includes a driving backplane and a plurality of micro light emitting diodes, and the micro LEDs are disposed in an array between the driving backplane and the transparent substrate. The control element is disposed on the transparent substrate. The control element is connected to the light emitting diode modules via the signal transmission structure, and the light emitting diode modules are connected to each other via the signal transmission structure.

Abstract: An apparatus and a method for accessing a plurality of memory blocks is disclosed. The An apparatus comprises: a memory circuit configured to store a recording table, wherein the recording table corresponds to quality index of the plurality of memory blocks; and a control circuit configured to group the plurality of memory blocks to a first memory group and a second memory group according to the quality index; to enable to access the memory blocks in the first memory group, and to disable to access the memory blocks in the second memory group.

Abstract: A control method includes detecting an operational command to a first memory unit, interrupting an operational status of a second memory unit, asserting the operational command corresponding to the first memory unit, and recovering the operational status of the second memory unit. The first memory unit and the second memory unit correspond to the same channel.

Abstract: A method for writing data into a persistent storage device includes grouping a plurality of data entries stored in a temporary storage device to form a data unit, such that the data unit has a size equal to an integer multiple of a size of an access unit of the persistent storage device. The method further includes writing the data unit into the persistent storage device.

Abstract: A control method includes detecting an operational command to a first memory unit, interrupting an operational status of a second memory unit, asserting the operational command corresponding to the first memory unit, and recovering the operational status of the second memory unit. The first memory unit and the second memory unit correspond to the same channel.