Patents by Inventor Li-Yeh Chen

Li-Yeh Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11342138
    Abstract: The invention provides a switch device including a shell, an operating member, a spring, a movable conductor, a first pin, a second pin, two resistors, and two connecting conductors. The operating member is partially exposed out of the shell, and the movable conductor is displaced when the operating member is operated. One side of the shell is provided with the first pin and the spring, another side is provided with the second pin. The resistors are connected with the second pin and have different resistance values. The connecting conductors are arranged between the two pins. The first pin contacts with the movable conductor. The connecting conductors without disposal of any crossover part therebetween and respectively connected with the resistors. The connecting conductors are arranged at intervals along a displacement path of the movable conductor which contacted one connecting conductor before and after displacement and forming two conductive paths.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: May 24, 2022
    Assignee: ZIPPY TECHNOLOGY CORP.
    Inventor: Li-Yeh Chen
  • Patent number: 6826073
    Abstract: A new memory cell combination is disclosed. It includes a static random access memory (SRAM) unit and a mask read only memory (MROM) unit. The prior art separates the two memory units in different areas on a chip so that the circuit layout is not optimized. The disclosed cell combines them in the same area, saving more than 20% of the area.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: November 30, 2004
    Assignee: Brilliance Semiconductor Inc.
    Inventors: Shion-Hau Liaw, Li-Yeh Chen
  • Publication number: 20040004882
    Abstract: A new memory cell combination is disclosed. It includes a static random access memory (SRAM) unit and a mask read only memory (MROM) unit. The prior art separates the two memory units in different areas on a chip so that the circuit layout is not optimized. The disclosed cell combines them in the same area, saving more than 20% of the area.
    Type: Application
    Filed: June 30, 2003
    Publication date: January 8, 2004
    Inventors: Shion-Hau Liaw, Li-Yeh Chen