Abstract: An integrated circuit (IC) device includes a substrate, such as a printed circuit board (PCB) substrate. A chip assembly is disposed over the substrate. The chip assembly includes an IC, a plurality of electronic memory devices coupled to the IC, and a molding compound material that circumferentially surrounds the IC and the electronic memory devices collectively in a top view. A thermal interface material (TIM) is disposed over the chip assembly. The TIM includes an indium alloy, a gallium alloy, or an alloy that contains bismuth, indium, and tin. An adhesive dam is disposed over the substrate. The adhesive dam surrounds the chip assembly and the TIM laterally. A lid structure is disposed over the substrate and encapsulates the chip assembly therein. The lid structure includes one or more openings that expose portions of the TIM. The one or more openings accommodate an expansion of the TIM.

Abstract: A plurality of physical cores of a processor share a memory management unit (MMU) pool comprising a plurality of MMUs. The plurality of MMUs provides each physical core with an address translation function from a virtual address (VA) to a physical address (PA). If an address translation requirement of a physical core is high, for example, when a main memory is concurrently accessed, the plurality of MMUs can serve the physical core.

Abstract: A manufacturing method of a package structure includes: coupling a device package to a package substrate, where the device package includes semiconductor dies encapsulated by an insulating encapsulation and electrically coupled to the package substrate; forming a first dielectric pattern on the device package opposite to the package substrate, where the first dielectric pattern includes openings corresponding to the semiconductor dies of the device package; forming a thermal conductive material on the semiconductor dies of the device package and in the openings of the first dielectric pattern; placing a heat dissipating component over the device package and the package substrate, the heat dissipating component being in contact with the first dielectric pattern and the thermal conductive material; and performing a thermal treatment process on the first dielectric pattern and the thermal conductive material to form a thermal interface material structure coupling the heat dissipating component to the device pack

Abstract: The present invention relates to the field of biomedicine. Disclosed herein is a method for preventing cancer recurrence, comprising i) intermittently administering an interferon-based therapeutic agent, and optionally ii) administering an additional anticancer agent, to a subject. The present invention also relates to a pharmaceutical combination for use in said method.

Abstract: A method and a system for identifying a glacial lake outburst debris flow (GLODF) are provided. The method is obtained based on considering induced influences of slopes of channels and particle sizes of source particles on the GLODF. The method not only compensates for deficiencies in identifying the GLODF, but also realizes determination of the GLODF, which provides data basis for disaster prevention and control layout such as monitoring and early warning on a glacial lake and assists preventing and managing disasters caused by the GLODF. Meanwhile, multiple parameters used in the method are easy and convenient to obtain, and the parameters can be directly used on site, which saves engineering cost, improves working efficiency, and has high practical and promotional value in environmental protection and disaster prevention and mitigation.

Abstract: An electronic device uses a multidimensional (e.g., 3D) scaler to process multiple-viewing-angle (e.g., 3D-aware) images by resampling each view image and processing image data of each view image according to a view map to change resolution or improve perceived image quality. After being processed, each view image of the multiple-viewing-angle image is used to rebuild a final processed multiple-viewing-angle (e.g., 3D-aware image) with all views for displaying on the electronic device.

Abstract: A peptide biomarker for identifying Hippocampus species based on peptidomics and application thereof are disclosed, belonging to the technical field of biology. The protein in Hippocampus is studied, and the Hippocampus thermostable protein is comprehensively analyzed using a peptidomics method. The analysis discovered potential peptide biomarkers of Hippocampus collagen, the specificity of the potential peptide biomarkers is verified by HPLC-triple quadrupole mass spectrometry, and the peptide biomarkers are comprehensively identified by combining bioinformatics analysis. Finally, 10 peptide biomarkers are discovered, targeting 11 different species of Hippocampus. The markers provided may identify Hippocampus existing in the market, promote the scientific and standardized classification and grading of Hippocampus commodities, and play an important role in high-quality and high-price trade circulation of the Hippocampus commodities.

Abstract: A firmware protection method includes monitoring an access request to a storage device and obtaining access request data. The storage device is configured to store firmware. The method further includes, in response to the access request data, when determining that the access request is a denial-of-service (DOS) attack, performing write protection on a first region of the storage device, maintaining the power supply to the storage device, and allowing the storage device to be accessible by the firmware.

Abstract: The present disclosure provides methods for forming conductive features in a dielectric layer without using adhesion layers or barrier layers and devices formed thereby. In some embodiments, a structure comprising a dielectric layer over a substrate, and a conductive feature disposed through the dielectric layer. The dielectric layer has a lower surface near the substrate and a top surface distal from the substrate. The conductive feature is in direct contact with the dielectric layer, and the dielectric layer comprises an implant species. A concentration of the implant species in the dielectric layer has a peak concentration proximate the top surface of the dielectric layer, and the concentration of the implant species decreases from the peak concentration in a direction towards the lower surface of the dielectric layer.

Abstract: A package structure and the manufacturing method thereof are provided. The package structure includes a semiconductor die, conductive through vias, an insulating encapsulant, and a redistribution structure. The conductive through vias are electrically coupled to the semiconductor die. The insulating encapsulant laterally encapsulates the semiconductor die and the conductive through vias, wherein the insulating encapsulant has a recess ring surrounding the semiconductor die, the conductive through vias are located under the recess ring, and a vertical projection of each of the conductive through vias overlaps with a vertical projection of the recess ring. The redistribution structure is electrically connected to the semiconductor die and the conductive through vias.

Abstract: Embodiments of the present invention provide a data transmission method, a data transmission apparatus, a processor, and a mobile terminal. The data transmission method includes: determining, by a mobile terminal, whether to use multiple data channels to transmit to-be-transmitted data; if determining to use the multiple data channels to transmit the to-be-transmitted data, selecting, by the mobile terminal, at least two activated data channels for the to-be-transmitted data according to current traffic information and service quality information that are of the multiple data channels; and using, by the mobile terminal, the selected at least two data channels to transmit the to-be-transmitted data. According to the embodiments of the present invention, data transmission efficiency is enhanced, and idleness and a waste of data channel resources are avoided.

Abstract: Embodiments of the present disclosure provide a solution for video processing. A method for video processing is proposed. The method comprises: determining, during a conversion between a current video part of a video and a bitstream of the video, a process applied to the current video part at least based on coding information of the current video part, the determined process comprises at least one of an upsampling process or an enhancement process; and performing the conversion based on the determined process. The method in accordance with the present disclosure improves the coding process of the current video unit. Compared with the conventional solution, the proposed method can advantageously improve the coding efficiency and an image/video of larger size with more pixels and better visual quality is achieved.

Abstract: Provided is a sample analysis device, including: a housing, a reagent preparation apparatus, a sample processing apparatus, and an analysis apparatus. A first independent space, a second independent space and a third independent space are sequentially arranged in the housing at intervals. The reagent preparation apparatus is arranged in the first independent space. The sample processing apparatus is arranged in the second independent space, a first conveying channel is arranged between the reagent preparation apparatus and the sample processing apparatus, a first switching piece is arranged at the first conveying channel, and the first switching piece has a first opening state and a first closing state.

Abstract: The disclosure provides a to-be-tested object extraction apparatus and a nucleic acid testing integrated machine with the to-be-tested object preparation apparatus.

Abstract: The disclosure provides a to-be-tested object processing apparatus and a nucleic acid testing integrated machine with the to-be-tested object processing apparatus.

Abstract: A light emitting substrate is provided. The light emitting substrate includes a plurality of driver chip sets, a plurality of ground traces, and one or more connection lines. At least one driver chip set includes a plurality of driver chip subsets, at least one driver chip subset includes a plurality of driver chips that are cascaded, and driver chip subsets in a same driver chip set are cascaded. Driver chips in a same driver chip subset are electrically connected to a same ground trace, and different driver chip subsets are respectively connected to different ground traces. Ground traces respectively connected to the driver chip subsets in the same driver chip set are electrically connected by at least one connection line.

Abstract: A flip chip ball grid array package includes a package substrate and a flip chip device mounted on a top surface of the package substrate. The flip chip device includes a semiconductor integrated circuit die; an epoxy molding compound encapsulating vertical sidewalls of the semiconductor integrated circuit die; a re-distribution layer structure disposed on an active surface of the semiconductor integrated circuit die and on a lower surface of the epoxy molding compound; a sintered nanosilver layer disposed on a passive rear surface of the semiconductor integrated circuit die and on an upper surface of the epoxy molding compound; and a stiffener ring mounted around the flip chip device on the package substrate.

Abstract: Embodiments of the present disclosure provide a solution for video processing. A method for video processing comprises: determining, from a plurality of filter shapes during a conversion between a current video block of a video and a bitstream of the video, a first filter shape for coding a first sample of the current video block; and performing the conversion based on the first filter shape. Compared with the conventional solution, the proposed method can advantageously improve the performance of the filtering tool.

Abstract: A light-emitting substrate includes a substrate, and a first conductive layer, a passivation layer and a first protective pattern that are disposed on the substrate sequentially. The first conductive layer includes a plurality of pad groups each including a plurality of pads. The passivation layer is provided with a plurality of openings therein, an opening is located on a side of a pad away from the substrate, and the opening and an edge of the pad have a distance therebetween. The passivation layer includes a first climbing portion covering a sidewall of a first edge of the pad and a second climbing portion covering a sidewall of a second edge of the pad. The first protective pattern covers the first climbing portion and extends to a side of the passivation layer away from the pad, and the first protective pattern and the opening have a distance therebetween.