Abstract: A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.

Abstract: A per-phase quick response generation circuit generates a quick response signal to determine a quick response pulse to be inserted into a pulse width modulation signal of the corresponding phase. The quick response pulse will force the upper power switch of the corresponding phase on to increase the current supply ability during load transition. A multi-phase voltage regulator with the quick response generation circuit can have different quick response pulse widths for the interleaved phases, so as to decrease the current imbalance period of the voltage regulator after load transition.

Abstract: A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.

Abstract: A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.

Abstract: A quick turn on apparatus and method for a NMOSFET switch are used to maintain the gate voltage of the NMOSFET switch non-zero but not enough to turn on the NMOSFET switch, such that the NMOSFET switch turns on more quickly when it is to be turned on. Seamless transition can be further achieved in a single pole double throw switching circuit by using the quick turn on apparatus and method.

Abstract: A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.

Abstract: A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.

Abstract: In a voltage regulator including an error amplifier to generate a first signal related to an output voltage of the voltage regulator, a current sense circuit to generate a second signal related to an inductor current of the voltage regulator, and a PWM comparator to generate a PWM signal in response to the first and second signals to regulate the output voltage, a current feed-through adaptive voltage position control comprises supplying ramp signal and offset signal to modify the PWM signal to thereby eliminate the offset of the output voltage.

Abstract: A quick turn on apparatus and method for a NMOSFET switch are used to maintain the gate voltage of the NMOSFET switch non-zero but not enough to turn on the NMOSFET switch, such that the NMOSFET switch turns on more quickly when it is to be turned on. Seamless transition can be further achieved in a single pole double throw switching circuit by using the quick turn on apparatus and method.

Abstract: A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.

Abstract: The present invention discloses a voltage regulator which generates a control signal to convert an input voltage to an output voltage, the voltage regulator comprising: a regulator module for generating the control signal according to comparison between a signal representative of the output voltage and a signal representative of a reference voltage; and an amplifier for generating a first index signal by amplifying a difference between the signal representative of the output voltage and the signal representative of the reference voltage.

Abstract: A circuit and method for soft start of a system compare a feedback signal produced from an output voltage of the system with a ramp signal to generate a comparison signal, and enables the system once the comparison signal indicating the ramp signal reaches the feedback signal, such that the output voltage becomes active from a residual voltage toward a target level.

Abstract: A pulse-width-modulation (PWM) control system with nonlinear ramp is disclosed. A nonlinear ramp generator generates a nonlinear ramp varied with the duty (Vout/Vin) in a waveform signal, which could be a logarithm ramp, an exponent ramp, a multi-piecewise-linear ramp, a power ramp or a combination of above. The slope of the ramp is not a constant due to the non-linear characteristic. The voltage Vramp will vary with the input voltage Vin, output voltage Vout, and duty (Vout/Vin), therefore it will reduce the influence of the input voltage Vin or output voltage Vout on the modulation gain and loop gain, even to keep the modulation gain and loop gain in constant value. As mentioned-above, the present invention improves the transient response of system, the sensitivity for variation of Vin and Vout, thus it is capable of correcting the output voltage quickly, for supplying a more steady power output.

Abstract: An electrostatic loudspeaker driver includes a class-D amplifier and a demodulator circuit. The class-D amplifier is operated with a PWM signal, creating an amplified digital signal according to an input signal. A low-pass filter in the demodulator circuit filters out the PWM carrier frequency in the digital signal and retrieves an audio signal therefrom. The efficiency is improved significantly and heat sink is no longer needed.

Abstract: A DCR detecting circuit is parallel connected to the inductor of a self-clocking PWM buck converter which performs a trigger control of a PWM signal by an output feedback, to detect the current signal on the inductor to provide a large enough ripple to be combined into the output feedback, so as to enhance the system stability, while remains the small output ripple, without additional power loss.

Abstract: The present invention discloses a charge pump start up circuit comprising: a start up transistor having one end which is electrically connected with a voltage supply source, and another end which is electrically connected to a voltage node; and a charge pump circuit having an input which is electrically connected with the voltage node, and an output which is electrically with the gate of the start up transistor.

Abstract: A control circuit and method are provided to generate a modulation signal to operate a power stage in a DC/DC PWM converter such that the DC/DC PWM converter is controlled to operate with high switching frequency in light load stead state, once load transient happens, it still operates with high switching frequency for good transient response, and in heavy load stead state, it is controlled to operate with low switching frequency for good efficiency.

Abstract: A method and apparatus are provided for a switching mode converter to improve the light load efficiency thereof. The converter is thus operated with three modes by monitoring a feedback signal and a supply voltage. When the feedback signal indicates that loading gets light enough, the converter is switched from the first mode to the second mode, and during the second mode some cycles are skipped. If loading is too light, the converter is switched from the second mode to the third mode, and during the third mode more cycles will be skipped.

Abstract: The present invention discloses a charge pump start up circuit comprising: a start up transistor having one end which is electrically connected with a voltage supply source, and another end which is electrically connected to a voltage node; and a charge pump circuit having an input which is electrically connected with the voltage node, and an output which is electrically with the gate of the start up transistor.

Abstract: A switching circuit uses multiple common-drain JFETs to serve as the low-side switches of the switching circuit, and each of the low-side JFET is coupled between a high-side switch and a power node. Since a JFET can endure high voltage at both drain side and source side, and has good heat dissipation capability at drain side, the drain of the low-side JFET is coupled to the power node to enhance the heat dissipation capability and accordingly, all the low-side JFETs are allowed to be packaged in a same package to reduce the PCB layout area.