Patents by Inventor Lianmao Peng

Lianmao Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11107900
    Abstract: A dual-gate transistor and its production method are disclosed. An auxiliary gate is connected to the power supply of the integrated circuits, to form thick and high square-shaped potential barrier of minority carriers adjacent to the drain electrode, while the potential barrier is transparent for the majority carriers from the source electrodes. The potential barrier can effectively inhibit reverse minority carrier tunneling from the drain electrode at large drain-source voltage. The transistor can be easily turned on at small drain-source voltage, without significantly decreasing the on-state current. The dual-gate transistor can significantly suppress ambipolar behavior with increased current on/off ratio and reduced power consumption, and maintain the high performance. Based on transistors, strengthened CMOS circuits can have high noise margin, low voltage loss, reduced logic errors, high performance and low power consumption.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: August 31, 2021
    Assignee: Peking University
    Inventors: Chenyi Zhao, Donglai Zhong, Zhiyong Zhang, Lianmao Peng
  • Publication number: 20200343353
    Abstract: A dual-gate transistor and its production method are disclosed. An auxiliary gate is connected to the power supply of the integrated circuits, to form thick and high square-shaped potential barrier of minority carriers adjacent to the drain electrode, while the potential barrier is transparent for the majority carriers from the source electrodes. The potential barrier can effectively inhibit reverse minority carrier tunneling from the drain electrode at large drain-source voltage. The transistor can be easily turned on at small drain-source voltage, without significantly decreasing the on-state current. The dual-gate transistor can significantly suppress ambipolar behavior with increased current on/off ratio and reduced power consumption, and maintain the high performance. Based on transistors, strengthened CMOS circuits can have high noise margin, low voltage loss, reduced logic errors, high performance and low power consumption.
    Type: Application
    Filed: April 21, 2020
    Publication date: October 29, 2020
    Inventors: Chenyi Zhao, Donglai Zhong, Zhiyong Zhang, Lianmao Peng
  • Patent number: 10490760
    Abstract: The present disclosure provides a thin-film transistor having a plurality of carbon nanotubes in its active layer, its manufacturing method, and an array substrate. The manufacturing method as such comprises: forming an insulating layer to at least substantially cover a channel region of the active layer between a source electrode and a drain electrode of the thin-film transistor, wherein the insulating layer is configured to substantially insulate from an environment, and have substantially little influence on, the plurality of carbon nanotubes in the active layer.
    Type: Grant
    Filed: November 7, 2016
    Date of Patent: November 26, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., PEKING UNIVERSITY
    Inventors: Xuelei Liang, Guanbao Hui, Jiye Xia, Fangzhen Zhang, Boyuan Tian, Qiuping Yan, Lianmao Peng
  • Patent number: 10381584
    Abstract: The present disclosure provides a carbon nanotube thin film transistor (CNT-TFT) and its manufacturing method. The carbon nanotube thin film transistor includes a source electrode, a drain electrode, a channel region, a plurality of protrusions, and a carbon nanotube layer. The channel region is between the source electrode and the drain electrode. The plurality of protrusions are at, and extend in a length direction of, the channel region. The carbon nanotube layer is disposed over the plurality of protrusions, and comprises a plurality of carbon nanotubes.
    Type: Grant
    Filed: August 17, 2016
    Date of Patent: August 13, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., PEKING UNIVERSITY
    Inventors: Xuelei Liang, Guanbao Hui, Boyuan Tian, Fangzhen Zhang, Haiyan Zhao, Jiye Xia, Qiuping Yan, Lianmao Peng
  • Publication number: 20180375045
    Abstract: The present disclosure provides a thin-film transistor having a plurality of carbon nanotubes in its active layer, its manufacturing method, and an array substrate. The manufacturing method as such comprises: forming an insulating layer to at least substantially cover a channel region of the active layer between a source electrode and a drain electrode of the thin-film transistor, wherein the insulating layer is configured to substantially insulate from an environment, and have substantially little influence on, the plurality of carbon nanotubes in the active layer.
    Type: Application
    Filed: November 7, 2016
    Publication date: December 27, 2018
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., PEKING UNIVERSITY
    Inventors: Xuelei LIANG, Guanbao HUI, Jiye XIA, Fangzhen ZHANG, Boyuan TIAN, Qiuping YAN, Lianmao PENG
  • Publication number: 20180358569
    Abstract: The present disclosure provides a carbon nanotube thin film transistor (CNT-TFT) and its manufacturing method. The carbon nanotube thin film transistor includes a source electrode, a drain electrode, a channel region, a plurality of protrusions, and a carbon nanotube layer. The channel region is between the source electrode and the drain electrode. The plurality of protrusions are at, and extend in a length direction of, the channel region. The carbon nanotube layer is disposed over the plurality of protrusions, and comprises a plurality of carbon nanotubes.
    Type: Application
    Filed: August 17, 2016
    Publication date: December 13, 2018
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., PEKING UNIVERSITY
    Inventors: Xuelei LIANG, Guanbao HUI, Boyuan TIAN, Fangzhen ZHANG, Haiyan ZHAO, Jiye XIA, Qiuping YAN, Lianmao PENG
  • Publication number: 20170294583
    Abstract: The present disclosure pertains to the field of carbon nanotube technologies, and provides a carbon nanotube semiconductor device and a manufacturing method thereof. The manufacturing method of a carbon nanotube semiconductor device provided in the present disclosure comprises: forming a carbon nanotube layer with a carbon nanotube solution; and treating the carbon nanotube layer with an acidic solution. The carbon nanotube semiconductor device manufactured by the method of the present disclosure has good performance uniformity.
    Type: Application
    Filed: September 5, 2016
    Publication date: October 12, 2017
    Inventors: Xuelei Liang, Guanbao Hui, Jiye Xia, Fangzhen Zhang, Haiyan Zhao, Boyuan Tian, Qiuping Yan, Lianmao Peng
  • Patent number: 9340428
    Abstract: The present application relates to a method of increasing density of aligned carbon nanotubes. Firstly, aligned carbon nanotubes grown on a substrate is transferred to a stretched retractable film. The retractable film is then shrunk along a direction which is perpendicular to the alignment direction of the carbon nanotubes to obtain high density carbon nanotubes. The array of aligned carbon nanotubes is finally transferred from the retractable film to a target substrate. The disclosed method can efficiently obtain high-density high-quality aligned carbon nanotubes at low cost.
    Type: Grant
    Filed: August 7, 2014
    Date of Patent: May 17, 2016
    Assignee: Peking University
    Inventors: Jia Si, Zhiyong Zhang, Lianmao Peng
  • Publication number: 20150298975
    Abstract: The present application relates to a method of increasing density of aligned carbon nanotubes. Firstly, aligned carbon nanotubes grown on a substrate is transferred to a stretched retractable film. The retractable film is then shrunk along a direction which is perpendicular to the alignment direction of the carbon nanotubes to obtain high density carbon nanotubes. The array of aligned carbon nanotubes is finally transferred from the retractable film to a target substrate. The disclosed method can efficiently obtain high-density high-quality aligned carbon nanotubes at low cost.
    Type: Application
    Filed: August 7, 2014
    Publication date: October 22, 2015
    Inventors: Jia Si, Zhiyong Zhang, Lianmao Peng
  • Patent number: 8120008
    Abstract: A carbon nano-tube based photoelectric device includes a substrate and a carbon nanotube (CNT) over the substrate. The CNT comprises a first end and a second end, wherein the CNT has a CNT work function. A high work-function electrode over the substrate is in electric contact with the first end of the CNT. The high work-function electrode has a first work function higher than the CNT work function. A low work-function electrode over the substrate is in electric contact with the second end of the CNT. The low work-function electrode has a second work function lower than the CNT work function. The CNT can form a conductive channel between the high work-function electrode and the low work-function electrode. The carbon nano-tube based photoelectric device also includes a dielectric material is in contact with a side surface of the CNT and a conductive material in contact with the dielectric material.
    Type: Grant
    Filed: April 10, 2009
    Date of Patent: February 21, 2012
    Assignee: Peking University
    Inventors: Lianmao Peng, Xuelei Liang, Zhiyong Zhang, Sheng Wang, Qing Chen
  • Patent number: 8063451
    Abstract: Our invention discloses a self-aligned-gate structure for nano FET and its fabrication method. One dimension semiconductor material is used as conductive channel, whose two terminals are source and drain electrodes. Gate dielectric grown by ALD covers the area between source electrode and drain electrode, opposite sidewalls of source electrode and drain electrode, and part of upper source electrode and drain electrode. Gate electrode is deposited on gate dielectric by evaporation or sputtering. Total thickness of gate dielectric and electrode must less than source electrode or drain electrode. Gate electrode between source electrode and drain electrode is electrically separated from source and drain electrode by gate dielectric. The fabrication process of this self-aligned structure is simple, stable, and has high degree of freedom.
    Type: Grant
    Filed: October 1, 2009
    Date of Patent: November 22, 2011
    Assignee: Peking University
    Inventors: Zhiyong Zhang, Lianmao Peng, Sheng Wang, Xuelei Liang, Qing Chen
  • Publication number: 20100090293
    Abstract: Our invention discloses a self-aligned-gate structure for nano FET and its fabrication method. One dimension semiconductor material is used as conductive channel, whose two terminals are source and drain electrodes. Gate dielectric grown by ALD covers the area between source electrode and drain electrode, opposite sidewalls of source electrode and drain electrode, and part of upper source electrode and drain electrode. Gate electrode is deposited on gate dielectric by evaporation or sputtering. Total thickness of gate dielectric and electrode must less than source electrode or drain electrode. Gate electrode between source electrode and drain electrode is electrically separated from source and drain electrode by gate dielectric. The fabrication process of this self-aligned structure is simple, stable, and has high degree of freedom.
    Type: Application
    Filed: October 1, 2009
    Publication date: April 15, 2010
    Applicant: PEKING UNIVERSITY
    Inventors: Zhiyong ZHANG, Lianmao PENG, Sheng WANG, Xuelei LIANG, Qing CHEN
  • Publication number: 20090267053
    Abstract: A carbon nano-tube based photoelectric device includes a substrate and a carbon nanotube (CNT) over the substrate. The CNT comprises a first end and a second end, wherein the CNT has a CNT work function. A high work-function electrode over the substrate is in electric contact with the first end of the CNT. The high work-function electrode has a first work function higher than the CNT work function. A low work-function electrode over the substrate is in electric contact with the second end of the CNT. The low work-function electrode has a second work function lower than the CNT work function. The CNT can form a conductive channel between the high work-function electrode and the low work-function electrode. The carbon nano-tube based photoelectric device also includes a dielectric material is in contact with a side surface of the CNT and a conductive material in contact with the dielectric material.
    Type: Application
    Filed: April 10, 2009
    Publication date: October 29, 2009
    Inventors: Lianmao Peng, Xuelei Liang, Zhiyong Zhang, Sheng Wang, Qing Chen