Patents by Inventor Lianmao Peng
Lianmao Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11107900Abstract: A dual-gate transistor and its production method are disclosed. An auxiliary gate is connected to the power supply of the integrated circuits, to form thick and high square-shaped potential barrier of minority carriers adjacent to the drain electrode, while the potential barrier is transparent for the majority carriers from the source electrodes. The potential barrier can effectively inhibit reverse minority carrier tunneling from the drain electrode at large drain-source voltage. The transistor can be easily turned on at small drain-source voltage, without significantly decreasing the on-state current. The dual-gate transistor can significantly suppress ambipolar behavior with increased current on/off ratio and reduced power consumption, and maintain the high performance. Based on transistors, strengthened CMOS circuits can have high noise margin, low voltage loss, reduced logic errors, high performance and low power consumption.Type: GrantFiled: April 21, 2020Date of Patent: August 31, 2021Assignee: Peking UniversityInventors: Chenyi Zhao, Donglai Zhong, Zhiyong Zhang, Lianmao Peng
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Publication number: 20200343353Abstract: A dual-gate transistor and its production method are disclosed. An auxiliary gate is connected to the power supply of the integrated circuits, to form thick and high square-shaped potential barrier of minority carriers adjacent to the drain electrode, while the potential barrier is transparent for the majority carriers from the source electrodes. The potential barrier can effectively inhibit reverse minority carrier tunneling from the drain electrode at large drain-source voltage. The transistor can be easily turned on at small drain-source voltage, without significantly decreasing the on-state current. The dual-gate transistor can significantly suppress ambipolar behavior with increased current on/off ratio and reduced power consumption, and maintain the high performance. Based on transistors, strengthened CMOS circuits can have high noise margin, low voltage loss, reduced logic errors, high performance and low power consumption.Type: ApplicationFiled: April 21, 2020Publication date: October 29, 2020Inventors: Chenyi Zhao, Donglai Zhong, Zhiyong Zhang, Lianmao Peng
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Patent number: 10490760Abstract: The present disclosure provides a thin-film transistor having a plurality of carbon nanotubes in its active layer, its manufacturing method, and an array substrate. The manufacturing method as such comprises: forming an insulating layer to at least substantially cover a channel region of the active layer between a source electrode and a drain electrode of the thin-film transistor, wherein the insulating layer is configured to substantially insulate from an environment, and have substantially little influence on, the plurality of carbon nanotubes in the active layer.Type: GrantFiled: November 7, 2016Date of Patent: November 26, 2019Assignees: BOE TECHNOLOGY GROUP CO., LTD., PEKING UNIVERSITYInventors: Xuelei Liang, Guanbao Hui, Jiye Xia, Fangzhen Zhang, Boyuan Tian, Qiuping Yan, Lianmao Peng
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Patent number: 10381584Abstract: The present disclosure provides a carbon nanotube thin film transistor (CNT-TFT) and its manufacturing method. The carbon nanotube thin film transistor includes a source electrode, a drain electrode, a channel region, a plurality of protrusions, and a carbon nanotube layer. The channel region is between the source electrode and the drain electrode. The plurality of protrusions are at, and extend in a length direction of, the channel region. The carbon nanotube layer is disposed over the plurality of protrusions, and comprises a plurality of carbon nanotubes.Type: GrantFiled: August 17, 2016Date of Patent: August 13, 2019Assignees: BOE TECHNOLOGY GROUP CO., LTD., PEKING UNIVERSITYInventors: Xuelei Liang, Guanbao Hui, Boyuan Tian, Fangzhen Zhang, Haiyan Zhao, Jiye Xia, Qiuping Yan, Lianmao Peng
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Publication number: 20180375045Abstract: The present disclosure provides a thin-film transistor having a plurality of carbon nanotubes in its active layer, its manufacturing method, and an array substrate. The manufacturing method as such comprises: forming an insulating layer to at least substantially cover a channel region of the active layer between a source electrode and a drain electrode of the thin-film transistor, wherein the insulating layer is configured to substantially insulate from an environment, and have substantially little influence on, the plurality of carbon nanotubes in the active layer.Type: ApplicationFiled: November 7, 2016Publication date: December 27, 2018Applicants: BOE TECHNOLOGY GROUP CO., LTD., PEKING UNIVERSITYInventors: Xuelei LIANG, Guanbao HUI, Jiye XIA, Fangzhen ZHANG, Boyuan TIAN, Qiuping YAN, Lianmao PENG
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Publication number: 20180358569Abstract: The present disclosure provides a carbon nanotube thin film transistor (CNT-TFT) and its manufacturing method. The carbon nanotube thin film transistor includes a source electrode, a drain electrode, a channel region, a plurality of protrusions, and a carbon nanotube layer. The channel region is between the source electrode and the drain electrode. The plurality of protrusions are at, and extend in a length direction of, the channel region. The carbon nanotube layer is disposed over the plurality of protrusions, and comprises a plurality of carbon nanotubes.Type: ApplicationFiled: August 17, 2016Publication date: December 13, 2018Applicants: BOE TECHNOLOGY GROUP CO., LTD., PEKING UNIVERSITYInventors: Xuelei LIANG, Guanbao HUI, Boyuan TIAN, Fangzhen ZHANG, Haiyan ZHAO, Jiye XIA, Qiuping YAN, Lianmao PENG
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Publication number: 20170294583Abstract: The present disclosure pertains to the field of carbon nanotube technologies, and provides a carbon nanotube semiconductor device and a manufacturing method thereof. The manufacturing method of a carbon nanotube semiconductor device provided in the present disclosure comprises: forming a carbon nanotube layer with a carbon nanotube solution; and treating the carbon nanotube layer with an acidic solution. The carbon nanotube semiconductor device manufactured by the method of the present disclosure has good performance uniformity.Type: ApplicationFiled: September 5, 2016Publication date: October 12, 2017Inventors: Xuelei Liang, Guanbao Hui, Jiye Xia, Fangzhen Zhang, Haiyan Zhao, Boyuan Tian, Qiuping Yan, Lianmao Peng
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Patent number: 9340428Abstract: The present application relates to a method of increasing density of aligned carbon nanotubes. Firstly, aligned carbon nanotubes grown on a substrate is transferred to a stretched retractable film. The retractable film is then shrunk along a direction which is perpendicular to the alignment direction of the carbon nanotubes to obtain high density carbon nanotubes. The array of aligned carbon nanotubes is finally transferred from the retractable film to a target substrate. The disclosed method can efficiently obtain high-density high-quality aligned carbon nanotubes at low cost.Type: GrantFiled: August 7, 2014Date of Patent: May 17, 2016Assignee: Peking UniversityInventors: Jia Si, Zhiyong Zhang, Lianmao Peng
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Publication number: 20150298975Abstract: The present application relates to a method of increasing density of aligned carbon nanotubes. Firstly, aligned carbon nanotubes grown on a substrate is transferred to a stretched retractable film. The retractable film is then shrunk along a direction which is perpendicular to the alignment direction of the carbon nanotubes to obtain high density carbon nanotubes. The array of aligned carbon nanotubes is finally transferred from the retractable film to a target substrate. The disclosed method can efficiently obtain high-density high-quality aligned carbon nanotubes at low cost.Type: ApplicationFiled: August 7, 2014Publication date: October 22, 2015Inventors: Jia Si, Zhiyong Zhang, Lianmao Peng
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Patent number: 8120008Abstract: A carbon nano-tube based photoelectric device includes a substrate and a carbon nanotube (CNT) over the substrate. The CNT comprises a first end and a second end, wherein the CNT has a CNT work function. A high work-function electrode over the substrate is in electric contact with the first end of the CNT. The high work-function electrode has a first work function higher than the CNT work function. A low work-function electrode over the substrate is in electric contact with the second end of the CNT. The low work-function electrode has a second work function lower than the CNT work function. The CNT can form a conductive channel between the high work-function electrode and the low work-function electrode. The carbon nano-tube based photoelectric device also includes a dielectric material is in contact with a side surface of the CNT and a conductive material in contact with the dielectric material.Type: GrantFiled: April 10, 2009Date of Patent: February 21, 2012Assignee: Peking UniversityInventors: Lianmao Peng, Xuelei Liang, Zhiyong Zhang, Sheng Wang, Qing Chen
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Patent number: 8063451Abstract: Our invention discloses a self-aligned-gate structure for nano FET and its fabrication method. One dimension semiconductor material is used as conductive channel, whose two terminals are source and drain electrodes. Gate dielectric grown by ALD covers the area between source electrode and drain electrode, opposite sidewalls of source electrode and drain electrode, and part of upper source electrode and drain electrode. Gate electrode is deposited on gate dielectric by evaporation or sputtering. Total thickness of gate dielectric and electrode must less than source electrode or drain electrode. Gate electrode between source electrode and drain electrode is electrically separated from source and drain electrode by gate dielectric. The fabrication process of this self-aligned structure is simple, stable, and has high degree of freedom.Type: GrantFiled: October 1, 2009Date of Patent: November 22, 2011Assignee: Peking UniversityInventors: Zhiyong Zhang, Lianmao Peng, Sheng Wang, Xuelei Liang, Qing Chen
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Publication number: 20100090293Abstract: Our invention discloses a self-aligned-gate structure for nano FET and its fabrication method. One dimension semiconductor material is used as conductive channel, whose two terminals are source and drain electrodes. Gate dielectric grown by ALD covers the area between source electrode and drain electrode, opposite sidewalls of source electrode and drain electrode, and part of upper source electrode and drain electrode. Gate electrode is deposited on gate dielectric by evaporation or sputtering. Total thickness of gate dielectric and electrode must less than source electrode or drain electrode. Gate electrode between source electrode and drain electrode is electrically separated from source and drain electrode by gate dielectric. The fabrication process of this self-aligned structure is simple, stable, and has high degree of freedom.Type: ApplicationFiled: October 1, 2009Publication date: April 15, 2010Applicant: PEKING UNIVERSITYInventors: Zhiyong ZHANG, Lianmao PENG, Sheng WANG, Xuelei LIANG, Qing CHEN
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Publication number: 20090267053Abstract: A carbon nano-tube based photoelectric device includes a substrate and a carbon nanotube (CNT) over the substrate. The CNT comprises a first end and a second end, wherein the CNT has a CNT work function. A high work-function electrode over the substrate is in electric contact with the first end of the CNT. The high work-function electrode has a first work function higher than the CNT work function. A low work-function electrode over the substrate is in electric contact with the second end of the CNT. The low work-function electrode has a second work function lower than the CNT work function. The CNT can form a conductive channel between the high work-function electrode and the low work-function electrode. The carbon nano-tube based photoelectric device also includes a dielectric material is in contact with a side surface of the CNT and a conductive material in contact with the dielectric material.Type: ApplicationFiled: April 10, 2009Publication date: October 29, 2009Inventors: Lianmao Peng, Xuelei Liang, Zhiyong Zhang, Sheng Wang, Qing Chen