Abstract: A display may have an array of pixels arranged in rows and columns. Each pixel may have a transistor for controlling the amount of output light associated with that pixel. The transistors may be thin-film transistors having active areas, first and second source-drain terminals, and gates. Gate lines may be used to distribute gate control signals to the gates of the transistors in each row. Data lines that run perpendicular to the gate lines may be used to distribute image data along columns of pixels. The gate lines may be connected to gate line extensions that run parallel to the data lines. The data lines may each overlap a respective one of the gate line extensions. Vias may be used to connect the gate line extensions to the gate lines. The gate line extensions may all have the same length.

Abstract: A motor control system includes a motor driving circuit and a motor. The motor driving circuit includes a control module, a PWM signal detecting module, a transient state detecting module and a driving module. The PWM signal detecting module is electrically connected to the control module to receive a PWM signal and to convert the PWM signal into a first digital PWM control signal. The transient state detecting module provides a second digital PWM control signal to the control module according to the first digital PWM control signal at a first time point and the first digital PWM control signal at a second time point. The driving module receives at least one driving signal from the control module. The control module determines whether to turn off a low side switch of the driving module according to the second digital PWM control signal.

Abstract: A motor driving circuit includes a first output switch, a second output switch, a first adjusting module, and a second adjusting module. A rising slew rate of the first output current along the first direction is adjusted according to the first adjusting parameter of the first adjusting module. A falling slew rate of the first output current along the first direction is adjusted according to the second adjusting parameter of the second adjusting module.

Abstract: A display device may include pixels and source lines that provide data line signals to the pixels. The display device may also include gate lines that provide gate signals to switches associated with the pixels. The display device may also include vertical gate lines disposed generally parallel to the source lines and coupled to the gate lines at cross point nodes. The display device may also include compensation lines, such that each compensation line is proximate to a respective vertical gate line. The compensation lines may transmit compensation signals having an opposite polarity as compared to respective gate signals to reduce or eliminate a kickback voltage on at least one of the plurality of pixels.

Abstract: A display may have a first stage such as a color liquid crystal display stage and a second stage such as a monochromatic liquid crystal display stage that are coupled in tandem so that light from a backlight passes through both stages. The pixel pitch of the second stage may be greater than the pixel pitch of the first stage to ease alignment tolerances and reduce image processing complexity. The first stage may be provided with straight black masking strips, whereas the second stage may be provided with angled zigzagging black masking strips. The angle of the zigzagging black masking strips and the ratio of the pixel pitch of the second stage to that of the first stage may be selected to maximize optical transmittance while minimizing Moire effects.

Abstract: A rotor mechanism includes a plurality of rotor bars and a rotor core. The rotor bars are disposed along the edge of the rotor core. The rotor core has a plurality of magnetic flux-barrier units and at least one flux channel. Each magnetic flux-barrier unit extends from one of the rotor bars to another rotor bar. The flux channel passes through the flux-barrier units and surrounds an axis of the rotor core, wherein each magnetic flux-barrier unit is a magnetic flux barrier, and the area between the adjacent magnetic flux-barrier units and the flux channel are pathways for magnetic flux.

Abstract: A motor control system includes a motor driving circuit and a motor. The motor driving circuit includes a control module, a PWM signal detecting module, a transient state detecting module and a driving module. The PWM signal detecting module is electrically connected to the control module to receive a PWM signal and to convert the PWM signal into a first digital PWM control signal. The transient state detecting module provides a second digital PWM control signal to the control module according to the first digital PWM control signal at a first time point and the first digital PWM control signal at a second time point. The driving module receives at least one driving signal from the control module. The control module determines whether to turn off a low side switch of the driving module according to the second digital PWM control signal.

Abstract: A motor driving circuit for receiving a control signal to output at least one output current for driving a motor is provided. The motor driving circuit includes an input module, a gain module, an output module, a first slew rate limiting module, and a second slew rate limiting module. The first slew rate limiting module has a first limiting parameter. The second slew rate includes a second limiting parameter. An output current is outputted by the output terminal. When a rising slew rate of the output current is less than a first slew rate value, the first slew rate limiting module does not operate. When the rising slew rate of the output current is greater than the first slew rate value, the motor driving circuit limits the rising slew rate of the output current based on the first limiting parameter of the first slew rate limiting module.

Abstract: A motor driving circuit includes a first output switch, a second output switch, a first adjusting module, and a second adjusting module. A rising slew rate of the first output current along the first direction is adjusted according to the first adjusting parameter of the first adjusting module. A falling slew rate of the first output current along the first direction is adjusted according to the second adjusting parameter of the second adjusting module.

Abstract: A wire fusing apparatus including a first body having a first surface, a second body having a second surface, and a heating unit is provided. The second body is pivoted to the first body to rotate relatively to the first body enabling the first and second bodies to be in an expanded or a closed state. When the first and second bodies are in the closed state, the first and second surfaces define a closed containing groove for containing two independent wires butt jointed with each other. The first surface, the second surface and the containing groove each has a heat-conducting region, and the heat-conducting regions contact each other when the first and second bodies are in the closed state. The heating unit disposed on the first or second body contacts one of the heat-conducting regions for heat-fusing a butt-jointing point of the wires to form a fused wire.

Abstract: A display device may include a plurality of pixels, a plurality of source lines that may provide a plurality of data line signals to the plurality of pixels, a plurality of gate lines that may provide a plurality of gate signals to a plurality of switches associated with the plurality of pixels, and a plurality of voltage gate lines disposed parallel to the plurality of source lines and coupled to the plurality of gate lines at a plurality of cross point nodes. The plurality of cross point nodes are positioned in a pseudo random order across the display device.

Abstract: An embodiment disclosed a system for collaborative positioning calibration, comprising at least one reference station and at least one client. The reference station uses a known position and a satellite signal transmitted by at least one satellite to compute a pseudo-range difference of the reference station position and the satellite position, and then broadcasts an area calibration data including at least one pseudo-range difference to at least one client. Based on the area calibration data, the client computes at least one pseudo-range calibration data and outputs a calibrated position of global positioning system.

Abstract: A touch sensor panel comprising a first touch node electrode of a plurality of touch node electrodes, the first touch node electrode coupled to a first sense connection comprising a first set of traces, the first sense connection configured to have a first resistance per unit length that varies along a length of the first sense connection, and a second touch node electrode of the plurality of touch node electrodes, the second touch node electrode coupled to a second sense connection comprising a second set of traces, the second sense connection configured to have a second resistance per unit length that varies along a length of the second sense connection differently than the first resistance per unit length varies along the length of the first sense connection. An effective resistance of the first sense connection and the second sense connection are equal.

Abstract: A display may have an array of pixels arranged in rows and columns. Each pixel may have a transistor for controlling the amount of output light associated with that pixel. The transistors may be thin-film transistors having active areas, first and second source-drain terminals, and gates. Gate lines may be used to distribute gate control signals to the gates of the transistors in each row. Data lines that run perpendicular to the gate lines may be used to distribute image data along columns of pixels. The gate lines may be connected to gate line extensions that run parallel to the data lines. The data lines may each overlap a respective one of the gate line extensions. Vias may be used to connect the gate line extensions to the gate lines. The gate line extensions may all have the same length.

Abstract: A display may have an array of pixels arranged in rows and columns. Each pixel may have a transistor for controlling the amount of output light associated with that pixel. The transistors may be thin-film transistors having active areas, first and second source-drain terminals, and gates. Gate lines may be used to distribute gate control signals to the gates of the transistors in each row. Data lines that run perpendicular to the gate lines may be used to distribute image data along columns of pixels. The gate lines may be connected to gate line extensions that run parallel to the data lines. The data lines may each overlap a respective one of the gate line extensions. Vias may be used to connect the gate line extensions to the gate lines. The gate line extensions may all have the same length.

Abstract: This invention relates to a triple immunostaining assay (ERG/TFF3/HMWCK) for sensitive and specific detection of prostate cancer. Positive staining for at least one of ERG or TFF3 combined with negative staining of HMWCK in a sample such as prostate tissue sample is indicative of cancer.

Abstract: A display has an array of pixels controlled by display driver circuitry. Gate driver circuitry supplies gate line signals to rows of the pixels. The pixels may be liquid crystal display pixels. Each pixel may have a common electrode voltage terminal. The display may have a transparent conductive film that forms a common electrode voltage layer that overlaps that array and that is shorted to the common electrode voltage terminals of the pixels. Metal common electrode voltage lines may run across the transparent conductive film to reduce resistance. Metal common electrode voltage paths that are coupled to the metal common electrode voltage lines may run along the left and right edge of the display. Common electrode voltage compensation circuits may receive feedback from the metal common electrode voltage paths. There may be two or more common electrode voltage compensation circuits for both the left and right edges of the display.

Abstract: A display may have an array of pixels arranged in rows and columns. Display driver circuitry may be provided along an edge of the display. Data lines that are associated with columns of the pixels may be used to distribute data from the display driver circuitry to the pixels. Gate lines in the display may each have a horizontal straight portion that extends along a respective row of the pixels and may each have one or more non-horizontal segments such as zigzag segments. The non-horizontal portion of each gate line may be connected to the horizontal straight portion of the gate line by a via. The non-horizontal portions may each have portions that are overlapped by portions of the data lines. Dummy gate line structures may be provided on the display that are not coupled to any of the pixels in the display.

Abstract: A display device may include pixels and source lines that provide data line signals to the pixels. The display device may also include gate lines that provide gate signals to switches associated with the pixels. The display device may also include vertical gate lines disposed generally parallel to the source lines and coupled to the gate lines at cross point nodes. The display device may also include compensation lines, such that each compensation line is proximate to a respective vertical gate line. The compensation lines may transmit compensation signals having an opposite polarity as compared to respective gate signals to reduce or eliminate a kickback voltage on at least one of the plurality of pixels.

Abstract: The present disclosure illustrates a motor speed curve control circuit. The motor speed curve control circuit is configured for adjusting a speed of a motor according to a motor speed curve. The motor speed curve control circuit comprises a divider resistor module, an analog-to-digital converter and an arithmetic unit. The resistor module is configured for generating at least one turning-point voltage. The turning-point voltage is used to adjust a slope of the motor speed curve. The analog-to-digital converter converts the turning-point voltage to digital form. The arithmetic unit sets a speed associated with the turning-point voltage corresponding to a first preset duty cycle in the motor speed curve, such that the motor speed curve becomes linear. The arithmetic unit generates a second pulse width modulation signal according to the adjusted motor speed curve and a first pulse width modulation signal to drive the motor.