Abstract: The present disclosure provides a display substrate, a manufacturing method thereof, and a display device. In the display substrate, the sub-pixel driving circuit includes a driving transistor and a first reset transistor, and a gate electrode of the first reset transistor is electrically connected to the reset signal line pattern, a first electrode of the first reset transistor is electrically connected to the initialization signal line pattern, and a second electrode of the first reset transistor is electrically connected to a gate electrode of the driving transistor; and the shielding pattern is electrically connected to the power signal line pattern, an orthographic projection of the shielding pattern on the substrate overlaps an orthographic projection of the first electrode of the first reset transistor on the substrate.

Abstract: A pixel driving circuit includes: a driving transistor connected to a first node, a second node and a third node; a first light-emitting control unit connected to the second node; a second light-emitting control unit connected to the third node and a fourth node; a first reset unit connected to the fourth node, and configured to load a second power supply voltage to the fourth node in response to a scan signal. One end of the light-emitting element is connected to the fourth node, and the other end of the light-emitting element is used for loading the second power supply voltage.

Abstract: The present disclosure provides a display panel, a manufacturing method thereof, and a display device. The display panel includes a first area and a second area. A pixel density of the first area is greater than that of the second area. In the second area, each pixel includes a first sub-pixel, a second sub-pixel, a third sub-pixel, and a fourth sub-pixel. The first sub-pixel, the third sub-pixel, and the fourth sub-pixel are in a same sub-pixel row. The first sub-pixel is between the third sub-pixel and the fourth sub-pixel. The first sub-pixel and the second sub-pixel are in a same sub-pixel column. The first sub-pixel and the second sub-pixel are respectively in adjacent sub-pixel rows. The first sub-pixel and the second sub-pixel has a same emission color. The first sub-pixel, the third sub-pixel, and the fourth sub-pixel have different emission colors.

Abstract: A display substrate and a display panel are provided.

Abstract: Provided is a pixel circuit. The pixel circuit includes a semiconductor layer on a side of a base substrate, wherein the semiconductor layer is configured to form an active layer of each of various transistors in the pixel circuit; a first metal layer on the side of the base substrate, wherein the first metal layer is configured to form a gate electrode of the transistor and a first capacitive electrode of a storage capacitor in the pixel circuit; and a second metal layer on the side of the base substrate, wherein the second metal layer is configured to form a second capacitive electrode of the storage capacitor.

Abstract: A method, a network device and a terminal device for transmitting information are provided. The method includes: a network device sends downlink control information to a terminal device through control resource areas in a time domain scheduling unit, wherein the control resource areas include multiple types of control resource areas, different types of control resource areas are used for sending different types downlink control information, and a first type of control resource area in the multiple types of control resource areas comprises partial frequency domain resources pre-configured or semi-statically configured on each Orthogonal Frequency Division Multiplexing (OFDM) symbol in the time domain scheduling unit.

Abstract: A display substrate and a display device are provided. In the display substrate, the driving transistor includes an active pattern and a gate electrode, the active pattern includes a channel region, and an orthographic projection of the channel region on the base substrate at least partially overlaps with an orthographic projection of the gate electrode on the base substrate; the storage capacitor includes a first electrode plate and a second electrode plate. The first electrode plate is electrically connected with the gate electrode of the driving transistor; an orthographic projection of the second electrode plate on the base substrate at least partially overlaps with an orthographic projection of the first electrode plate on the base substrate, and does not overlap with an orthographic projection of the channel region of the driving transistor on the base substrate.

Abstract: The display panel (100) includes an active area (R1) and a non-active area (R2), the non-active area (R2) includes a bending area (R211) and a controlling area (R212), the display panel (100) includes a substrate (1), a multilayer insulating layer (2) and a back-film component (3), the multilayer insulating layer (2) has a depression part (21), the thickness of the back-film component (3) that is located within the active area (R1) is less than the thickness of the back-film component (3) that is located within the controlling area (R212), and is greater than the thickness of the back-film component (3) that is located within the bending area (R211), the display panel (100) has a marker (5), the marker (5) is located within the non-active area (R2), and is separately disposed around the depression part, and the marker is suitable for serving as a correction reference of the bending area.

Abstract: A display substrate and manufacturing method thereof, and a display device are provided. The display substrate includes a base substrate, and a shift register unit and a first clock signal line that are on the base substrate, the first clock signal line extends along a first direction on the base substrate and is configured to provide a first clock signal to the shift register unit, the shift register unit includes an input circuit, an output circuit, a first control circuit and an output control circuit, and the first control circuit includes a first control switch and a second control switch, an active layer of the first control switch and an active layer of the second control switch are a continuous control semiconductor layer, the control semiconductor layer extends along the first direction.

Abstract: A display substrate and a display device are provided. In the display substrate, a first signal line transmitting a first scan signal extends along a first direction and a second signal line transmitting a data signal extends along a second direction; the data writing transistor transmits the data signal to the driving transistor under control of the first scan signal, the first scan signal is transmitted on the first signal line, and the data signal is transmitted on the second signal line; the driving transistor controls magnitude of a driving current according to the data signal; the channel region at least partially overlaps with the gate electrode; a planar shape of the channel region of the driving transistor is a strip shape extending along the second direction; the light emitting device receives the driving current and is driven by the driving current to emit light.

Abstract: The present disclosure provides a display panel, a display device, a test method, and a crack detection method. The display panel includes: a base substrate including a display area and a peripheral area; a plurality of sub-pixels in the display area; a plurality of data signal lines in the display area and electrically connected to the plurality of sub-pixels; a plurality of signal transmission lines in the peripheral area and electrically connected to the plurality of data signal lines; a plurality of multiplexers in the peripheral area; and a first test circuit on a side of the plurality of multiplexers away from the plurality of sub-pixels. The first test circuit includes a plurality of test components, each of at least a portion of the plurality of test components being electrically connected to at least two multiplexers.

Abstract: This application provides a shift register, a gate drive circuit, a display panel, and an electronic device. The shift register includes: a node control module, electrically connected to a first level signal receive end that receives a low level, a second level signal receive end that receives a high level, a first clock signal end, a second clock signal end, a first node, and a second node; an input module, electrically connected to the second clock signal end, a trigger signal input end, and the second node; a voltage regulator module, electrically connected to the second node, a third node, and the second clock signal end; and an output module, electrically connected to the first level signal receive end, the second level signal receive end, a drive signal output end, the first node, and the third node.

Abstract: Provided is a display substrate. In the display substrate, a base substrate includes a display region, a bending region and a pad region. A length of the display region in a first direction is greater than a length of the display region in a second direction. Since the pad region, the bending region and the display region are arranged along the second direction, the pad region is arranged on a side where a long boundary line of the display region is located, such that each signal line led into the display region from the pad region has a relatively short length in the display region.

Abstract: Disclosed are a display panel and a display apparatus. The display panel is divided into a display area and a non-display area surrounding the display area. The non-display area is provided with a fan-out area. The display panel includes: a substrate and a first power wire arranged on the substrate. The first power wire is located in the non-display area. At least part of an orthographic projection of the first power wire on the substrate is located in the fan-out area. The first power wire is provided with a plurality of first hollow parts in a direction perpendicular to the substrate.

Abstract: Disclosed a display panel comprising: a base substrate and a plurality of sub-pixels located on the base substrate; and each sub-pixel includes: a semiconductor layer located on the base substrate and including a first active layer of an initialization transistor, a second active layer of a reset transistor and a third active layer of a data writing transistor; a first conductive layer located on a side of the semiconductor layer and including a data signal line extending in a first direction; and a second conductive layer located on the base substrate and including a drive gate of a drive transistor; where the drive gate is electrically connected to a first conductive region of the first active layer; and an orthographic projection of the second active layer on the base substrate is located between an orthographic projection of the first active layer and an orthographic projection of the data signal line.

Abstract: This application provides a shift register, a gate drive circuit, a display panel, and an electronic device. The shift register includes a node control module, electrically connected to a first level signal receiving end, a second level signal receiving end, a first node, and a second node; an input module, electrically connected to a first clock signal end, a trigger signal input end, and the second node; an output module, electrically connected to the first level signal receiving end, the second level signal receiving end, the first node, a third node, and a drive signal output end; a first voltage stabilizing module, electrically connected to the first node, a fourth node, and the second level signal receiving end; and a second voltage stabilizing module, electrically connected to the second node, the third node, the fourth node, and a second clock signal end.

Abstract: A display substrate and a display device are provided. In the display substrate, a first signal line transmitting a first scan signal extends along a first direction and a second signal line transmitting a data signal extends along a second direction; the data writing transistor transmits the data signal to the driving transistor under control of the first scan signal, the first scan signal is transmitted on the first signal line, and the data signal is transmitted on the second signal line; the driving transistor controls magnitude of a driving current according to the data signal; the channel region at least partially overlaps with the gate electrode; a planar shape of the channel region of the driving transistor is a strip shape extending along the second direction; the light emitting device receives the driving current and is driven by the driving current to emit light.

Abstract: A display substrate and a display device are provided. In the display substrate, the driving transistor includes an active pattern and a gate electrode, the active pattern includes a channel region, and an orthographic projection of the channel region on the base substrate at least partially overlaps with an orthographic projection of the gate electrode on the base substrate; the storage capacitor includes a first electrode plate and a second electrode plate. The first electrode plate is electrically connected with the gate electrode of the driving transistor; an orthographic projection of the second electrode plate on the base substrate at least partially overlaps with an orthographic projection of the first electrode plate on the base substrate, and does not overlap with an orthographic projection of the channel region of the driving transistor on the base substrate.

Abstract: The disclosure relates to a display substrate, including: a base substrate including a display area and a peripheral area surrounding the display area; a first crack detection line located in the peripheral area and surrounding the display area; a second crack detection line located in the peripheral area and surrounding the display area; at least one first electrostatic discharge circuit located in the peripheral area, each including at least one first thin film transistor, the at least one first thin film transistor including a first gate; and at least one second electrostatic discharge circuit located in the peripheral area and electrically connected to the second crack detection line, each including at least one second thin film transistor, the at least one second thin film transistor including a second gate, wherein the second gate is electrically connected to the first gate.

Abstract: A display panel includes a pixel-driving circuit, wherein the display panel further includes: a base substrate, a second conductive layer and a third conductive layer. The second conductive layer is located on one side of the base substrate. The second conductive layer includes a first initial signal line, and the first initial signal line is configured to provide the first initial signal to the pixel-driving circuit. The third conductive layer is located on a side of the second conductive layer distal to the base substrate, the third conductive layer includes a second initial signal line, and the second initial signal line is configured to provide a second initial signal to the pixel-driving circuit, wherein sheet resistance of the first conductive layer is greater than that of the second conductive layer. The signal on the second initial signal line in the display panel has a smaller voltage drop.