Patents by Inventor Lonna Edwards

Lonna Edwards has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10734237
    Abstract: Methods and apparatus for subtractively fabricating three-dimensional structures relative to a surface of a substrate and for additively depositing metal and dopant atoms onto the surface and for diffusing them into the bulk. A chemical solution is applied to the surface of the semiconductor substrate, and a spatial pattern of electron-hole pairs is generated by projecting a spatial pattern of illumination characterized by a specified intensity, wavelength and duration at each pixel of a plurality of pixels on the surface. Charge carriers are driven away from the surface of the semiconductor on a timescale short compared to the carrier recombination lifetime. Such methods are applied to creating a spatially varying doping profile in the semiconductor substrate, a photonic integrated circuit and an integrated photonic microfluidic circuit.
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: August 4, 2020
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Lynford Goddard, Kaiyuan Wang, Chris Edwards, Lonna Edwards, Xin Yu, Gang Logan Liu, Samuel Washington, Shailendra Srivastava, Terry Koker, Julianne Lee, Catherine Britt Carlson
  • Patent number: 10115599
    Abstract: Methods and apparatus for subtractively fabricating three-dimensional structures relative to a surface of a substrate and for additively depositing metal and dopant atoms onto the surface and for diffusing them into the bulk. A chemical solution is applied to the surface of the semiconductor substrate, and a spatial pattern of electron-hole pairs is generated by projecting a spatial pattern of illumination characterized by a specified intensity, wavelength and duration at each pixel of a plurality of pixels on the surface. An electrical potential is applied across the interface of the semiconductor and the solution with a specified temporal profile relative to the temporal profile of the spatial pattern of illumination. Such methods are applied to the fabrication of a photodetector integral with a parabolic reflector, cell size sorting chips, a three-dimensional photonic bandgap chip, a photonic integrated circuit, and an integrated photonic microfluidic circuit.
    Type: Grant
    Filed: January 6, 2016
    Date of Patent: October 30, 2018
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Lynford Goddard, Kaiyuan Wang, Chris Edwards, Lonna Edwards, Xin Yu, Gang Logan Liu, Terry Koker
  • Publication number: 20180301344
    Abstract: Methods and apparatus for subtractively fabricating three-dimensional structures relative to a surface of a substrate and for additively depositing metal and dopant atoms onto the surface and for diffusing them into the bulk. A chemical solution is applied to the surface of the semiconductor substrate, and a spatial pattern of electron-hole pairs is generated by projecting a spatial pattern of illumination characterized by a specified intensity, wavelength and duration at each pixel of a plurality of pixels on the surface. Charge carriers are driven away from the surface of the semiconductor on a timescale short compared to the carrier recombination lifetime. Such methods are applied to creating a spatially varying doping profile in the semiconductor substrate, a photonic integrated circuit and an integrated photonic microfluidic circuit.
    Type: Application
    Filed: May 22, 2018
    Publication date: October 18, 2018
    Inventors: Lynford Goddard, Kaiyuan Wang, Chris Edwards, Lonna Edwards, Xin Yu, Gang Logan Liu, Samuel Washington, Shailendra Srivastava, Terry Koker, Julianne Lee, Catherine Britt Carlson
  • Publication number: 20160118265
    Abstract: Methods and apparatus for subtractively fabricating three-dimensional structures relative to a surface of a substrate and for additively depositing metal and dopant atoms onto the surface and for diffusing them into the bulk. A chemical solution is applied to the surface of the semiconductor substrate, and a spatial pattern of electron-hole pairs is generated by projecting a spatial pattern of illumination characterized by a specified intensity, wavelength and duration at each pixel of a plurality of pixels on the surface. An electrical potential is applied across the interface of the semiconductor and the solution with a specified temporal profile relative to the temporal profile of the spatial pattern of illumination. Such methods are applied to the fabrication of a photodetector integral with a parabolic reflector, cell size sorting chips, a three-dimensional photonic bandgap chip, a photonic integrated circuit, and an integrated photonic microfluidic circuit.
    Type: Application
    Filed: January 6, 2016
    Publication date: April 28, 2016
    Inventors: Lynford Goddard, Kaiyuan Wang, Chris Edwards, Lonna Edwards, Xin Yu, Gang Logan Liu, Samuel Washington, Shailendra Srivastava, Terry Koker, Julianne Lee, Catherine Britt Carlson