Patents by Inventor Louis A. Koszi
Louis A. Koszi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6642548Abstract: Light emitting diodes such as those formed from gallium nitride based semiconductors are provided with electrode and pad structures which facilitate current spreading. The LED may be formed as a die with a lower contact surface and a mesa projecting upwardly from the lower contact surface. An electrode on the lower contact surface may be in the form of a ring substantially encircling the mesa. In other arrangements, the pad and/or electrode on the lower contact surface is disposed in an indentation on one edge of the mesa whereas the pad on the top of the mesa is disposed adjacent the opposite edge of the mesa.Type: GrantFiled: October 20, 2000Date of Patent: November 4, 2003Assignee: Emcore CorporationInventors: Michael G. Brown, Ivan Eliashevich, Louis A. Koszi
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Patent number: 6420252Abstract: A method of forming a self-aligned contact on a semiconductor includes forming a layer of a dielectric material over a semiconductor, providing a photoresist layer over the dielectric layer and then exposing the photoresist layer with a desired pattern and developing an opening in the photoresist layer. The dielectric material exposed through the photoresist layer opening is then removed to form a contact opening extending through the dielectric material to the semiconductor. The photoresist layer is then eroded so as to enlarge the size of the opening in the photoresist layer, whereby the dielectric material adjacent the contact opening is exposed through the enlarged opening of the photoresist layer. A barrier metal is then deposited in the enlarged opening of the photoresist layer and in the contact opening of the dielectric material, whereby the barrier metal overlies the exposed portion of the dielectric material. A conductive metal is then deposited atop the barrier metal.Type: GrantFiled: May 10, 2000Date of Patent: July 16, 2002Assignee: Emcore CorporationInventors: Stephen Schwed, Louis A. Koszi, Edward W. Douglas, Michael G. Brown
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Patent number: 5111475Abstract: Lasers for use in multichannel analog optical fiber communication systems (e.g., of the type contemplated for CATV) have to meet very stringent requirements, including high linearity. DFB lasers are advantageously used in such communication systems. Typically only a relatively small percentage of the nominally identical DFB lasers on a wafer meet the specifications. It has now been discovered that the likelihood that a given DFB laser will meet the requirements is substantially increased if the laser comprises means that are adapted for producing a non-uniform photon density in the laser cavity, with the density of photons being larger in the rear portion of the cavity than in the front portion, such that during operation of the laser the gain in the back portion is substantially independent of the laser current, whereas the gain in the front portion is a function of the laser current.Type: GrantFiled: March 20, 1991Date of Patent: May 5, 1992Assignee: AT&T Bell LaboratoriesInventors: David A. Ackerman, Leonard J. Ketelsen, Louis A. Koszi
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Patent number: 5100836Abstract: Disclosed is a method of making a semiconductor device that exemplarily comprises depositing a Ti/Pt layer onto a AuBe intermediate layer on a p-doped region of a semiconductor body. It also comprises depositing a Ti/Pt layer onto a n-doped region of the semiconductor body, or onto a AuGe intermediate layer on the n-doped region, followed by rapid thermal processing. Exemplarily, the device is a semiconductor laser, the n-doped region is InP, the p-doped region is InGaAs or InGaAsP, and RTP involves heating in the range 425.degree.-500.degree. C. for 10-100 seconds. The method comprises fewer processing steps than typical prior art methods, reduces the danger of fabrication error and of wafer breakage and, significantly, results in contacts that can be relatively thermally stable and can have very low specific contact resistance (exemplarily as low as 10.sup.-7 .OMEGA..multidot.cm.sup.2).Type: GrantFiled: March 26, 1991Date of Patent: March 31, 1992Assignee: AT&T Bell LaboratoriesInventors: William C. Dautremont-Smith, Avishay Katz, Louis A. Koszi, Bryan P. Segner, Peter M. Thomas
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Patent number: 5036023Abstract: The inventive method of producing a device having non-alloyed ohmic contacts of common composition to both an n-doped and a p-doped region of a semiconductor body comprises deposition of a Ti/Pt layer on the p-doped as well as the n-doped region, followed by rapid thermal processing (RTP). Exemplarily, the device is a semiconductor laser, the n-doped region is InP, the p-doped region is InGaAs or InGaAsP, and RTP involves heating in the range 425.degree.-475.degree. C. for 10-100 seconds. The method comprises fewer processing steps than typical prior art methods, reduces the danger of fabrication error and of wafer breakage and, significantly, results in contacts that can be relatively thermally stable and can have very low specific contact resistance (exemplarily as low as 10.sup.-7 .OMEGA..multidot.cm.sup.2).Type: GrantFiled: August 16, 1989Date of Patent: July 30, 1991Assignee: AT&T Bell LaboratoriesInventors: William C. Dautremont-Smith, Avishay Katz, Louis A. Koszi, Bryan P. Segner, Peter M. Thomas
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Patent number: 4892374Abstract: A method for aligning an opto-electronic device such as a semiconductor laser to a waveguide on a substrate is disclosed. The method comprises placing the device onto the substrate such that it is in rough alignment with the waveguide, optically pumping the device such that the device emits electromagnetic radiation, with some of the emitted radiation being coupled into the waveguide and detected by appropriate means. If indicated by the detector signal, the position of the device is then adjusted until the desired degree of coupling is attained, whereupon the device is mechanically secured to the substrate and appropriate electrical connections made between device and substrate. Devices useful in the practice of the method typically comprise a window in their top metallization layer.Type: GrantFiled: March 3, 1988Date of Patent: January 9, 1990Assignee: American Telephone and Telegraph Company, AT&T Bell LaboratoriesInventors: David A. Ackerman, Louis A. Koszi
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Patent number: 4599791Abstract: The property of materials in the GaAs/AlGaAs system, whereby at certain doses proton bombarded n-type material becomes highly resistive but p-type material remains highly conductive, is utilized to fabrication of integrated circuits which include buried semiconductor interconnections or bus bars between devices.Type: GrantFiled: November 28, 1983Date of Patent: July 15, 1986Assignee: AT&T Bell LaboratoriesInventors: Marlin W. Focht, Louis A. Koszi, Bertram Schwartz
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Patent number: 4539743Abstract: The property of Group III-V compound materials, whereby ion bombarded material becomes highly resistive but recovers its original low resistivity by annealing at a temperature which is dopant and material dependant, is utilized to fabricate integrated circuits which include buried semiconductor interconnections or bus bars between devices.Type: GrantFiled: November 28, 1983Date of Patent: September 10, 1985Assignee: AT&T Bell LaboratoriesInventors: Philip J. Anthony, Robert L. Hartman, Louis A. Koszi, Bertram Schwartz
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Patent number: 4523961Abstract: A method of producing patternable resistive regions in III-V compound semiconductor devices and a resulting device structure having improved current characteristics. III-V semiconductor substrates are irradiated with inert ions to produce a resistive region therein. At least one epitaxial layer is grown over the substrate while maintaining the resistive characteristics within the substrate. A second resistive region is then formed in at least the top epitaxial layer. This second resistive region is aligned with the first one in order to minimize current spread through the device.Type: GrantFiled: November 12, 1982Date of Patent: June 18, 1985Assignee: AT&T Bell LaboratoriesInventors: Robert L. Hartman, Louis A. Koszi, Richard S. Williams, John L. Zilko
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Patent number: 4514896Abstract: Semiconductor light emitting devices, lasers and LEDs, are described in which the current flow channel is narrower near the top surface of the device and wider at its bottom near the active region. Also, described are several attenuation masks for fabricating the channels of these devices by particle bombardment.Type: GrantFiled: January 17, 1984Date of Patent: May 7, 1985Assignee: AT&T Bell LaboratoriesInventors: Richard W. Dixon, William B. Joyce, Louis A. Koszi, Richard C. Miller, Bertram Schwartz
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Patent number: 4504952Abstract: A TJS light emitting diode (laser or LED) comprises an isotype double heterostructure (DH) and a V-groove which penetrates the intermediate layer of the DH. The groove is filled with a region of semiconductor material which enables carrier injection to occur from the region into the intermediate layer, or conversely, depending on the relative bandgaps of the layer and region. Real-refractive index guiding by the groove is described.Type: GrantFiled: June 1, 1982Date of Patent: March 12, 1985Assignee: AT&T Bell LaboratoriesInventors: Robert L. Hartman, Louis A. Koszi, Bertram Schwartz
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Patent number: 4447905Abstract: Semiconductor light emitting devices, lasers and LEDs, are described in which the current flow channel is narrower near the top surface of the device and wider at its bottom near the active region. Also, described are several attenuation masks for fabricating the channels of these devices by particle bombardment.Type: GrantFiled: March 25, 1981Date of Patent: May 8, 1984Assignee: Bell Telephone Laboratories, IncorporatedInventors: Richard W. Dixon, Louis A. Koszi, Richard C. Miller, Bertram Schwartz
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Patent number: 4408331Abstract: Semiconductor lasers and LEDs are described in which the pumping current is constrained to flow from a relatively narrow upper channel formed by a V-groove, which extends to a depth short of the active region, through a relatively wider lower channel bounded by high resistivity regions, which extend from at least that depth into or through the active region. Also described are devices in which the V-groove is refilled with semiconductor material.Type: GrantFiled: March 25, 1981Date of Patent: October 4, 1983Assignee: Bell Telephone Laboratories, IncorporatedInventors: Robert L. Hartman, Louis A. Koszi, Bertram Schwartz
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Patent number: 4313125Abstract: A double heterostructure light emitting semiconductor device is described wherein a narrow bandgap active region is sandwiched between two wider bandgap cladding layers, one of which contains a p-n homojunction. The purpose is to separate the p-n junction from the active region and, thus, to have the active region bounded by two isotype (p-p or n-n) heterojunctions. This configuration significantly reduces nonradiative interface recombination current which occurs principally at the anisotype (p-n) heterojunction in a standard double heterostructure.Type: GrantFiled: June 21, 1979Date of Patent: January 26, 1982Assignee: Bell Telephone Laboratories, IncorporatedInventors: Robert L. Hartman, Louis A. Koszi, Norman E. Schumaker
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Patent number: 4230997Abstract: A buried double heterostructure laser device isdescribed. A wafer of double heterostructure material is formed into narrow mesa stripes. A native oxide coating is formed on the side walls of the mesa. Semiconductor material having an index of refraction which is closely matched to the index of the active region is deposited over the mesa structure. High resistivity polycrystalline material forms on the native oxide and monocrystalline material forms on the top of the mesa. Vertical carrier and optical confinement is achieved by the higher bandgap cladding layers of the double heterostructure configuration. The native oxide acts as an electrical insulator to confine pumping current to the mesa. The closely matched polycrystalline material confines light parallel to the junction plane and prevents excitation of higher order transverse modes. Devices have been fabricated which exhibit cw threshold currents at room temperature as low as 55 mA.Type: GrantFiled: January 29, 1979Date of Patent: October 28, 1980Assignee: Bell Telephone Laboratories, IncorporatedInventors: Robert L. Hartman, Marc Ilegems, Louis A. Koszi, Wilfried R. Wagner
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Patent number: 4227975Abstract: Plasma etching is described as a selective etch for dielectric masks such as SiO.sub.2, Si.sub.3 N.sub.4 and certain photoresists in the presence of native oxides of Group III-V compound semiconductors. This process can be used in the fabrication of mesa junction lasers and Burrus light emitting diodes.Type: GrantFiled: January 29, 1979Date of Patent: October 14, 1980Assignee: Bell Telephone Laboratories, IncorporatedInventors: Robert L. Hartman, Louis A. Koszi, Cyril J. Mogab, Bertram Schwartz
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Patent number: 4142662Abstract: Disclosed is a method of bonding microelectronic chips to bonding surfaces utilizing thin, soft bonding material preforms. The bonding material, such as indium, is formed on a carrier strip. A portion of the material is transferred from the strip by bringing it in contact with the bonding surface and supplying pressure to the strip. The chip may then be bonded to the coated surface.Type: GrantFiled: January 27, 1978Date of Patent: March 6, 1979Assignee: Bell Telephone Laboratories, IncorporatedInventors: Walter R. Holbrook, Louis A. Koszi
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Patent number: 4127862Abstract: A plurality n of double heterostructure photodiodes are coupled together by (n-1) interleaved n.sup.+ -p.sup.+ tunnel junctions to form a multi-layered integrated structure which has an open circuit photovoltage approaching the sum of the open circuit photovoltages of the individual photodiodes. In one embodiment, in which radiation to be detected is made incident normal to the layers, the absorbing layers of the photodiodes get progressively thicker away from the substrate. In a second embodiment, in which the radiation is made incident parallel to the layers, all of the absorbing layers have essentially the same thickness. In a third embodiment, in which radiation is made incident normal to the layers, the structure has a stepped configuration and all of the absorbing layers have essentially the same thickness.Type: GrantFiled: September 6, 1977Date of Patent: November 28, 1978Assignee: Bell Telephone Laboratories, IncorporatedInventors: Marc Ilegems, Louis A. Koszi, Bertram Schwartz
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Patent number: 4124826Abstract: Current confinement in semiconductor devices by means of buried high resistivity zones is described. For example, in a stripe geometry, semiconductor, junction laser the laterally separate, high resistivity zones, which confine current flow in a narrow channel between the upper and lower electrical contacts, are buried below the upper contact. This configuration permits current to flow from the upper contact into the body of the semiconductor over greatly increased area before it enters the channel. The current density at the interface between the upper contact and the semiconductor body is thereby reduced, making the quality of that interface less important. Several processes which employ proton bombardment for fabricating the laser are also described: (1) in one the normal sequence of Zn diffusion and proton bombardment is reversed, and (2) in the other the profiles of Zn doping and proton damage are suitably tailored.Type: GrantFiled: March 1, 1977Date of Patent: November 7, 1978Assignee: Bell Telephone Laboratories, IncorporatedInventors: Richard W. Dixon, Louis A. Koszi, Franklin R. Nash
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Patent number: H434Abstract: A contact structure and method of bonding III-V semiconductors which prevents shorting of the edges of the semiconductor chip and also allows the chip to be bonded with either major surface facing upward. Both surfaces include a gold pad surrounded by a material which is immiscible with the preform metal used to bond the chip to an outside surface. During fluxless bonding between the gold pad on one surface of the chip and the preform, the preform metal is prevented from wetting the edges of the chip. The opposite surface of the chip can be electrically contacted by wire bonding to the gold pad on that surface.Type: GrantFiled: February 15, 1985Date of Patent: February 2, 1988Assignee: American Telephone and Telegraph Company, AT&T Bell LaboratoriesInventor: Louis A. Koszi