Patents by Inventor Louis A. Sanchez

Louis A. Sanchez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10199376
    Abstract: A cell includes at least two semiconductor structures of the same nature, these two structures both employing voltages and currents that are unidirectional, each structure having an anode (10), a cathode (14) and optionally a gate (16). The structures are integrated into the volume of one and the same semiconductor substrate (4). The cathodes (14), and possibly the gates (16), are arranged on a first side of the semiconductor substrate (4). The anodes (10) are each arranged on a second side of the semiconductor substrate (4), which side is opposite the first side, facing the cathodes and possibly the corresponding gates. Two electrodes, anodes or cathodes, of two separate structures, are electrically connected to each other.
    Type: Grant
    Filed: October 9, 2012
    Date of Patent: February 5, 2019
    Assignees: Centre National de la Recherche Scientifique (CNRS), Institut National Polytechnique de Toulouse (I.N.P.T.)
    Inventors: Abdelhakim Bourennane, Marie Breil-Dupuy, Frederic Richardeau, Jean-Louis Sanchez
  • Publication number: 20140299916
    Abstract: A cell includes at least two semiconductor structures of the same nature, these two structures both employing voltages and currents that are unidirectional, each structure having an anode (10), a cathode (14) and optionally a gate (16). The structures are integrated into the volume of one and the same semiconductor substrate (4). The cathodes (14), and possibly the gates (16), are arranged on a first side of the semiconductor substrate (4). The anodes (10) are each arranged on a second side of the semiconductor substrate (4), which side is opposite the first side, facing the cathodes and possibly the corresponding gates. Two electrodes, anodes or cathodes, of two separate structures, are electrically connected to each other.
    Type: Application
    Filed: October 9, 2012
    Publication date: October 9, 2014
    Applicant: Centre National de la Recherche Scientifique (CNRS
    Inventors: Abdelhakim Bourennane, Marie Breil-Dupuy, Frederic Richardeau, Jean-Louis Sanchez
  • Patent number: 7109609
    Abstract: The invention concerns the control of thyristor-type semiconductor power components (Sw) powered by an alternating current network (VS). The control signal is a pulse (Ie). It is stored in the form of magnetic induction (B), positive or negative, in a core (T) made of ferromagnetic material. At each current alternation of the network, the interrogation of the magnetic state of the strand results in the presence, or not, of a control signal on the power device (Sw).
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: September 19, 2006
    Assignee: STMicroelectronics S.A.
    Inventors: Jean Jalade, Jean-Pierre Laur, Jean-Louis Sanchez, Patrick Austin, Marie Breil, Eric Bernier
  • Patent number: 6831328
    Abstract: The invention concerns an anode voltage sensor of a vertical power component selected from the group consisting of components called thyristor, MOS, IGBT, PMCT, EST, BRT transistor, MOS thyristor, turn-off MOS thyristor, formed by a lightly doped N-type substrate (1) whereof the rear surface (2) having a metallizing coat corresponds to the component anode. Said sensor comprises, on the front surface side, a substrate zone (12) surrounded at least partly by a P-type region with low potential in front of an anode potential, said zone (12) being coated with a metallizing coat (M) in ohmic contact with it, whereon is provided an image of the anode voltage.
    Type: Grant
    Filed: May 16, 2003
    Date of Patent: December 14, 2004
    Assignee: Centre National de la Recherche Scientifique
    Inventors: Patrick Austin, Jean-Pierre Laur, Olivier Causse, Marie Breil, Jean-Louis Sanchez, Jean Jalade
  • Patent number: 6703681
    Abstract: The invention concerns a variable capacitance capacitor comprising a periodic structure of raised zones (5) separated by recesses (6) formed in a type N semiconductor substrate (1). The walls of the raised zones and the base of the recesses are coated with a conductive layer (9, 10). The substrate is connected to a first terminal (A) of the capacitor and the conductive layer to a second terminal (B) of the capacitor. At least the base of the recesses or the side of the raised zones comprises type P regions (8), the pitch of the raised parts being selected so that the space charging zones linked to the type P regions are joined when the voltage difference between said terminals exceeds a predetermined threshold. The zones not comprising type P regions are coated with an insulant (7) and a highly doped N region (10) is formed beneath the insulant.
    Type: Grant
    Filed: May 16, 2003
    Date of Patent: March 9, 2004
    Assignee: Centre National de la Recherche Scientifique
    Inventors: Jean-Louis Sanchez, Jean-Pierre Laur, Hedi Hakim, Patrick Austin, Jean Jalade, Marie Breil
  • Publication number: 20040027005
    Abstract: The invention concerns the control of thyristor-type semiconductor power components (Sw) powered by an alternating current network (VS). The control signal is a pulse (Ie). It is stored in the form of magnetic induction (B), positive or negative, in a core (T) made of ferromagnetic material. At each current alternation of the network, the interrogation of the magnetic state of the strand results in the presence, or not, of a control signal on the power device (Sw).
    Type: Application
    Filed: April 29, 2003
    Publication date: February 12, 2004
    Inventors: Jean Jalade, Jean-Pierre Laur, Jean-Louis Sanchez, Patrick Austin, Marie Breil, Eric Bernier
  • Publication number: 20030183866
    Abstract: The invention concerns a variable capacitance capacitor comprising a periodic structure of raised zones (5) separated by recesses (6) formed in a type N semiconductor substrate (1). The walls of the raised zones and the base of the recesses are coated with a conductive layer (9, 10). The substrate is connected to a first terminal (A) of the capacitor and the conductive layer to a second terminal (B) of the capacitor. At least the base of the recesses or the side of the raised zones comprises type P regions (8), the pitch of the raised parts being selected so that the space charging zones linked to the type P regions are joined when the voltage difference between said terminals exceeds a predetermined threshold. The zones not comprising type P regions are coated with an insulant (7) and a highly doped N region (10) is formed beneath the insulant.
    Type: Application
    Filed: May 16, 2003
    Publication date: October 2, 2003
    Inventors: Jean-Louis Sanchez, Jean-Pierre Laur, Hedi Hakim, Patrick Austin, Jean Jalade, Marie Breil
  • Publication number: 20030174008
    Abstract: The invention concerns an anode voltage sensor of a vertical power component selected from the group consisting of components called thyristor, MOS, IGBT, PMCT, EST, BRT transistor, MOS thyristor, turn-off MOS thyristor, formed by a lightly doped N-type substrate (1) whereof the rear surface (2) having a metallizing coat corresponds to the component anode. Said sensor comprises, on the front surface side, a substrate zone (12) surrounded at least partly by a P-type region with low potential in front of an anode potential, said zone (12) being coated with a metallizing coat (M) in ohmic contact with it, whereon is provided an image of the anode voltage.
    Type: Application
    Filed: May 16, 2003
    Publication date: September 18, 2003
    Inventors: Patrick Austin, Jean-Pierre Laur, Olivier Causse, Marie Breil, Jean-Louis Sanchez, Jean Jalade
  • Patent number: 6459102
    Abstract: A peripheral structure for a monolithic power device, preferably planar, includes front and rear surfaces, connected respectively to a cathode and an anode, two junctions respectively reverse-biased and forward-biased when a direct and adjacent voltage is respectively applied to the two surfaces and at least an insulating box connecting the front and rear surfaces. The structure is such that when a direct voltage or a reverse voltage is applied, generating equipotential voltage lines, the insulating box enables to distribute the equipotential lines in the substrate.
    Type: Grant
    Filed: October 9, 2001
    Date of Patent: October 1, 2002
    Assignee: Centre National de la Recherche Scientifique
    Inventors: Patrick Austin, Jean-Louis Sanchez, Olivier Causse, Marie Breil, Jean-Pierre Laur, Jean Jalade
  • Patent number: 6373672
    Abstract: The present invention relates to a static and monolithic current limiter and circuit-breaker component including, between two terminals, a one-way conduction current limiter, a sensor of the voltage between the terminals, and a mechanism for inhibiting the conduction of the current limiter when the voltage sensed exceeds a given threshold.
    Type: Grant
    Filed: October 1, 1998
    Date of Patent: April 16, 2002
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventors: Jean-Baptiste Quoirin, Jean-Louis Sanchez, Jean Jallade
  • Patent number: 6326648
    Abstract: A monolithic power switch with a controlled di/dt including the parallel assembly of a MOS or IGBT type component with a thyristor type component, including means for inhibiting the thyristor type component during the closing phase of the switch, which is ensured by the IGBT type component. The IGBT type component has a vertical multicell structure and the component of thyristor type has a vertical monocell structure.
    Type: Grant
    Filed: December 20, 1999
    Date of Patent: December 4, 2001
    Assignee: STMicroelectronics S.A.
    Inventors: Jean Jalade, Jean-Louis Sanchez, Jean-Pierre Laur, Marie Breil, Patrick Austin, Eric Bernier, Mathieu Roy
  • Patent number: 6188267
    Abstract: The present invention relates to a component forming a normally on dual thyristor, which can be turned off by a voltage pulse on the control electrode, including a thyristor, a first depletion MOS transistor, the gate of which is connected to the source, connected between the anode gate and the cathode of the thyristor, and a second enhancement MOS transistor, the gate of which is connected to a control terminal.
    Type: Grant
    Filed: April 15, 1999
    Date of Patent: February 13, 2001
    Assignee: Centre National de la Recherche Scientifique
    Inventors: Jean-Louis Sanchez, Jean Jalade, Jean-Pierre Laur, Henri Foch
  • Patent number: 6107664
    Abstract: A static self-locking micro-circuit-breaker includes a first MOS depletion transistor of a first type connected by its drain to a first main terminal and by its gate to a second main terminal, a second MOS depletion transistor of second type connected by its drain to the second main terminal and by its source to the source of the first transistor, a third MOS depletion transistor of the first type connected by its drain to the first main terminal, by its gate to the second main terminal, and by its source to the gate of the second transistor.
    Type: Grant
    Filed: July 14, 1997
    Date of Patent: August 22, 2000
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventors: Jean-Baptiste Quoirin, Jean Jalade, Jean-Louis Sanchez, Jean-Pierre Laur
  • Patent number: 5956582
    Abstract: A two-terminal current limiting component, includes a substrate of a first conductivity type; separated wells of the second conductivity type; a first annular region of the first conductivity type in each well; a second annular region of the first conductivity type having a low doping level between the periphery of each first annular region and the periphery of each well; an insulating layer over the second annular region and the surface portions of the substrate; a first metallization coating the upper surface of the component; and a second metallization coating the lower surface of the component.
    Type: Grant
    Filed: June 13, 1997
    Date of Patent: September 21, 1999
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventors: Christophe Ayela, Philippe Leturcq, Jean Jalade, Jean-Louis Sanchez
  • Patent number: 5903028
    Abstract: The present invention relates to a static and monolithic current limiter and circuit-breaker component including, between two terminals, a one-way conduction current limiter, a sensor of the voltage between the terminals, and a mechanism for inhibiting the conduction of the current limiter when the voltage sensed exceeds a given threshold.
    Type: Grant
    Filed: December 18, 1996
    Date of Patent: May 11, 1999
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventors: Jean-Baptiste Quoirin, Jean-Louis Sanchez, Jean Jallade
  • Patent number: 4015211
    Abstract: A first and second channel coupled to a leading edge comparator and a trailing edge comparator is provided wherein pulses having widths to be determined are transmitted to the comparators, the pulses in one channel emanating therefrom being delayed with respect to pulses emanating from the other channel. Biasing circuitry produces an offset bias voltage to change the relative D.C. levels of the pulses, thereby to establish two leading edge crossover points which effect operation of the leading edge comparator and two trailing edge crossover points which effect operation of the trailing edge comparator so that the time differences between pulses produced by the comparators is a measure of the widths of the pulses, regardless of changes in pulse amplitude, D.C. input drift, and changes in duty cycle.
    Type: Grant
    Filed: April 9, 1976
    Date of Patent: March 29, 1977
    Assignee: Itek Corporation
    Inventor: Louis A. Sanchez