Abstract: Methods and structures for improving the performance of integrated semiconductor transistors operating at high frequency and/or high power are described. Two capacitors may be connected to an input of a semiconductor transistor and tuned to suppress second-harmonic generation and to transform and match the input impedance of the device. A two-stage tuning procedure is described. The transistor may comprise gallium nitride and may be configured as a power transistor capable of handling up to 1000 W of power. A tuned transistor may operate at frequencies up to 6 GHz with a peak drain efficiency greater than 60%.

Abstract: Methods and structures for improving the performance of integrated semiconductor transistors operating at high frequency and/or high power are described. Two capacitors may be connected to an input of a semiconductor transistor and tuned to suppress second-harmonic generation and to transform and match the input impedance of the device. A two-stage tuning procedure is described. The transistor may comprise gallium nitride and may be configured as a power transistor capable of handling up to 1000 W of power. A tuned transistor may operate at frequencies up to 6 GHz with a peak drain efficiency greater than 60%.

Abstract: Methods and structures for improving the performance of integrated semiconductor transistors operating at high frequency and/or high power are described. Two capacitors may be connected to an input of a semiconductor transistor and tuned to suppress second-harmonic generation and to transform and match the input impedance of the device. A two-stage tuning procedure is described. The transistor may comprise gallium nitride and may be configured as a power transistor capable of handling up to 1000 W of power. A tuned transistor may operate at frequencies up to 6 GHz with a peak drain efficiency greater than 60%.

Abstract: Methods and structures for improving the performance of integrated semiconductor transistors operating at high frequency and/or high power are described. Two capacitors may be connected to an input of a semiconductor transistor and tuned to suppress second-harmonic generation and to transform and match the input impedance of the device. A two-stage tuning procedure is described. The transistor may comprise gallium nitride and may be configured as a power transistor capable of handling up to 1000 W of power. A tuned transistor may operate at frequencies up to 6 GHz with a peak drain efficiency greater than 60%.

Abstract: Methods and structures for improving the performance of integrated semiconductor transistors operating at high frequency and/or high power are described. Two capacitors may be connected to an input of a semiconductor transistor and tuned to suppress second-harmonic generation and to transform and match the input impedance of the device. A two-stage tuning procedure is described. The transistor may comprise gallium nitride and may be configured as a power transistor capable of handling up to 1000 W of power. A tuned transistor may operate at frequencies up to 6 GHz with a peak drain efficiency greater than 60%.

Abstract: Methods and structures for improving the performance of integrated semiconductor transistors operating at high frequency and/or high power are described. Two capacitors may be connected to an input of a semiconductor transistor and tuned to suppress second-harmonic generation and to transform and match the input impedance of the device. A two-stage tuning procedure is described. The transistor may comprise gallium nitride and may be configured as a power transistor capable of handling up to 1000 W of power. A tuned transistor may operate at frequencies up to 6 GHz with a peak drain efficiency greater than 60%.

Abstract: An apparatus having an active device, a plurality of traces and one or more areas is disclosed. The active device may have a channel layer. A buffer layer is generally disposed between the channel layer and a substrate. A parasitic layer may be formed at an interface between the buffer layer and the substrate. The traces may be connected to the active device. The areas are generally proximate at least one of (i) the active device and (ii) at least two of the traces from which the parasitic layer is removed.