Patents by Inventor Maki Murazumi

Maki Murazumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5399233
    Abstract: In a process of manufacturing a semiconductor substrate having a SOI (silicon on insulator) structure, grooves are formed in a silicon layer reduced in thickness to several microns so that the silicon layer is separated into island-like regions corresponding to a chip size or device regions, and a stopper having a thickness corresponding to a desired final thickness of the silicon layer is formed in the grooves. The silicon layer is scanned with a piece of polishing cloth which has an area larger than that of each island-like region but sufficiently smaller than that of silicon layer and which is attached to a pressing surface of the polishing jig, thereby polishing the silicon layer until the stopper is exposed. The thickness of the silicon layer is measured at a position such that the thickness of a portion thereof is measured immediately before the same portion is polished.
    Type: Grant
    Filed: February 1, 1993
    Date of Patent: March 21, 1995
    Assignee: Fujitsu Limited
    Inventors: Maki Murazumi, Yoshihiro Arimoto, Atsushi Fukuroda