Patents by Inventor Maki Sugai

Maki Sugai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9601662
    Abstract: According to an embodiment, a semiconductor light emitting device includes a foundation layer, a first semiconductor layer, a light emitting layer, and a second semiconductor layer. The foundation layer has an unevenness having recesses, side portions, and protrusions. A first major surface of the foundation layer has an overlay-region. The foundation layer has a plurality of dislocations including first dislocations whose one ends reaching the recess and second dislocations whose one ends reaching the protrusion. A proportion of a number of the second dislocations reaching the first major surface to a number of all of the second dislocations is smaller than a proportion of a number of the first dislocations reaching the first major surface to a number of all of the first dislocations. A number of the dislocations reaching the overlay-region of the first major surface is smaller than a number of all of the first dislocations.
    Type: Grant
    Filed: October 15, 2015
    Date of Patent: March 21, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki Hikosaka, Yoshiyuki Harada, Maki Sugai, Shinya Nunoue
  • Publication number: 20160035938
    Abstract: According to an embodiment, a semiconductor light emitting device includes a foundation layer, a first semiconductor layer, a light emitting layer, and a second semiconductor layer. The foundation layer has an unevenness having recesses, side portions, and protrusions. A first major surface of the foundation layer has an overlay-region. The foundation layer has a plurality of dislocations including first dislocations whose one ends reaching the recess and second dislocations whose one ends reaching the protrusion. A proportion of a number of the second dislocations reaching the first major surface to a number of all of the second dislocations is smaller than a proportion of a number of the first dislocations reaching the first major surface to a number of all of the first dislocations. A number of the dislocations reaching the overlay-region of the first major surface is smaller than a number of all of the first dislocations.
    Type: Application
    Filed: October 15, 2015
    Publication date: February 4, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki HIKOSAKA, Yoshiyuki HARADA, Maki SUGAI, Shinya NUNOUE
  • Patent number: 9190559
    Abstract: According to an embodiment, a semiconductor light emitting device includes a foundation layer, a first semiconductor layer, a light emitting layer, and a second semiconductor layer. The foundation layer has an unevenness having recesses, side portions, and protrusions. A first major surface of the foundation layer has an overlay-region. The foundation layer has a plurality of dislocations including first dislocations whose one ends reaching the recess and second dislocations whose one ends reaching the protrusion. A proportion of a number of the second dislocations reaching the first major surface to a number of all of the second dislocations is smaller than a proportion of a number of the first dislocations reaching the first major surface to a number of all of the first dislocations. A number of the dislocations reaching the overlay-region of the first major surface is smaller than a number of all of the first dislocations.
    Type: Grant
    Filed: June 10, 2014
    Date of Patent: November 17, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki Hikosaka, Yoshiyuki Harada, Maki Sugai, Shinya Nunoue
  • Publication number: 20150236200
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer of a first conductivity type and having a major surface, a second semiconductor layer of a second conductivity type, and a light emitting layer provided between the first and second semiconductor layers. The major surface is opposite to the light emitting layer. The first semiconductor layer has structural bodies provided in the major surface. The structural bodies are recess or protrusion. A centroid of a first structural body aligns with a centroid of a second structural body nearest the first structural. hb, rb, and Rb satisfy rb/(2·hb)?0.7, and rb/Rb<1, where hb is a depth of the recess, rb is a width of a bottom portion of the recess, and Rb is a width of the protrusion.
    Type: Application
    Filed: May 1, 2015
    Publication date: August 20, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Toshiki HIKOSAKA, Yoshiyuki HARADA, Maki SUGAI, Shinya NUNOUE
  • Patent number: 9093588
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a well layer, a barrier layer, an Al-containing layer, and an intermediate layer. The p-type semiconductor layer is provided on a side of [0001] direction of the n-type semiconductor layer. The well layer, the barrier layer, the Al-containing layer and the intermediate layer are disposed between the n-type semiconductor layer and the p-type semiconductor layer subsequently. The Al-containing layer has a larger band gap energy than the barrier layer, a smaller lattice constant than the n-type semiconductor layer, and a composition of Alx1Ga1-x1-y1Iny1N. The intermediate layer has a larger band gap energy than the well layer, and has a first portion and a second portion provided between the first portion and the p-type semiconductor layer. A band gap energy of the first portion is smaller than that of the second portion.
    Type: Grant
    Filed: February 23, 2011
    Date of Patent: July 28, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jongil Hwang, Shinji Saito, Maki Sugai, Rei Hashimoto, Yasushi Hattori, Masaki Tohyama, Shinya Nunoue
  • Patent number: 9064997
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer of a first conductivity type and having a major surface, a second semiconductor layer of a second conductivity type, and a light emitting layer provided between the first and second semiconductor layers. The major surface is opposite to the light emitting layer. The first semiconductor layer has structural bodies provided in the major surface. The structural bodies are recess or protrusion. A centroid of a first structural body aligns with a centroid of a second structural body nearest the first structural. hb, rb, and Rb satisfy rb/(2·hb)?0.7, and rb/Rb<1, where hb is a depth of the recess, rb is a width of a bottom portion of the recess, and Rb is a width of the protrusion.
    Type: Grant
    Filed: July 14, 2014
    Date of Patent: June 23, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki Hikosaka, Yoshiyuki Harada, Maki Sugai, Shinya Nunoue
  • Publication number: 20140319460
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer of a first conductivity type and having a major surface, a second semiconductor layer of a second conductivity type, and a light emitting layer provided between the first and second semiconductor layers. The major surface is opposite to the light emitting layer. The first semiconductor layer has structural bodies provided in the major surface. The structural bodies are recess or protrusion. A centroid of a first structural body aligns with a centroid of a second structural body nearest the first structural. hb, rb, and Rb satisfy rb/(2·hb)?0.7, and rb/Rb<1, where hb is a depth of the recess, rb is a width of a bottom portion of the recess, and Rb is a width of the protrusion.
    Type: Application
    Filed: July 14, 2014
    Publication date: October 30, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Toshiki HIKOSAKA, Yoshiyuki HARADA, Maki SUGAI, Shinya NUNOUE
  • Publication number: 20140295602
    Abstract: According to an embodiment, a semiconductor light emitting device includes a foundation layer, a first semiconductor layer, a light emitting layer, and a second semiconductor layer. The foundation layer has an unevenness having recesses, side portions, and protrusions. A first major surface of the foundation layer has an overlay-region. The foundation layer has a plurality of dislocations including first dislocations whose one ends reaching the recess and second dislocations whose one ends reaching the protrusion. A proportion of a number of the second dislocations reaching the first major surface to a number of all of the second dislocations is smaller than a proportion of a number of the first dislocations reaching the first major surface to a number of all of the first dislocations. A number of the dislocations reaching the overlay-region of the first major surface is smaller than a number of all of the first dislocations.
    Type: Application
    Filed: June 10, 2014
    Publication date: October 2, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki Hikosawa, Yoshiyuki Harada, Maki Sugai, Shinya Nunoue
  • Patent number: 8829544
    Abstract: According to an embodiment, a semiconductor light emitting device includes a foundation layer, a first semiconductor layer, a light emitting layer, and a second semiconductor layer. The foundation layer has an unevenness having recesses, side portions, and protrusions. A first major surface of the foundation layer has an overlay-region. The foundation layer has a plurality of dislocations including first dislocations whose one ends reaching the recess and second dislocations whose one ends reaching the protrusion. A proportion of a number of the second dislocations reaching the first major surface to a number of all of the second dislocations is smaller than a proportion of a number of the first dislocations reaching the first major surface to a number of all of the first dislocations. A number of the dislocations reaching the overlay-region of the first major surface is smaller than a number of all of the first dislocations.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: September 9, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiki Hikosaka, Yoshiyuki Harada, Maki Sugai, Shinya Nunoue
  • Patent number: 8823016
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer of a first conductivity type and having a major surface, a second semiconductor layer of a second conductivity type, and a light emitting layer provided between the first and second semiconductor layers. The major surface is opposite to the light emitting layer. The first semiconductor layer has structural bodies provided in the major surface. The structural bodies are recess or protrusion. A centroid of a first structural body aligns with a centroid of a second structural body nearest the first structural. hb, rb, and Rb satisfy rb/(2·hb)?0.7, and rb/Rb<1, where hb is a depth of the recess, rb is a width of a bottom portion of the recess, and Rb is a width of the protrusion.
    Type: Grant
    Filed: February 24, 2012
    Date of Patent: September 2, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiki Hikosaka, Yoshiyuki Harada, Maki Sugai, Shinya Nunoue
  • Patent number: 8754528
    Abstract: A semiconductor device of an embodiment includes: a semiconductor layer made of p-type nitride semiconductor; an oxide layer formed on the semiconductor layer, the oxide layer being made of a crystalline nickel oxide, and the oxide layer having a thickness of 3 nm or less; and a metal layer formed on the oxide layer.
    Type: Grant
    Filed: April 26, 2013
    Date of Patent: June 17, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shinji Saito, Maki Sugai, Eiji Muramoto, Shinya Nunoue
  • Patent number: 8649408
    Abstract: According to one embodiment, a semiconductor laser device with high reliability and excellent heat dissipation is provided. The semiconductor laser device includes an active layer, a p-type semiconductor layer on the active layer, a pair of grooves formed by etching into the p-type semiconductor layer, a stripe sandwiched by the pair of grooves and having shape of ridge, and a pair of buried layers made of insulator to bury the grooves. The bottom surfaces of the grooves are shallower with an increase in distance from the stripe.
    Type: Grant
    Filed: September 2, 2010
    Date of Patent: February 11, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Rei Hashimoto, Maki Sugai, Jongil Hwang, Yasushi Hattori, Shinji Saito, Masaki Tohyama, Shinya Nunoue
  • Patent number: 8564006
    Abstract: According to one embodiment, a nitride semiconductor device includes a substrate and a semiconductor functional layer. The substrate is a single crystal. The semiconductor functional layer is provided on a major surface of the substrate and includes a nitride semiconductor. The substrate includes a plurality of structural bodies disposed in the major surface. Each of the plurality of structural bodies is a protrusion provided on the major surface or a recess provided on the major surface. An absolute value of an angle between a nearest direction of an arrangement of the plurality of structural bodies and a nearest direction of a crystal lattice of the substrate in a plane parallel to the major surface is not less than 1 degree and not more than 10 degrees.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: October 22, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Tachibana, Hisashi Yoshida, Hiroshi Ono, Hajime Nago, Yoshiyuki Harada, Toshiki Hikosaka, Maki Sugai, Toshiyuki Oka, Shinya Nunoue
  • Publication number: 20130234155
    Abstract: A semiconductor device of an embodiment includes: a semiconductor layer made of p-type nitride semiconductor; an oxide layer formed on the semiconductor layer, the oxide layer being made of a crystalline nickel oxide, and the oxide layer having a thickness of 3 nm or less; and a metal layer formed on the oxide layer.
    Type: Application
    Filed: April 26, 2013
    Publication date: September 12, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shinji Saito, Maki Sugai, Eiji Muramoto, Shinya Nunoue
  • Patent number: 8457167
    Abstract: Embodiments describe a semiconductor laser device driven at low voltage and which is excellent for cleavage and a method of manufacturing the device. In one embodiment, the semiconductor laser device includes a GaN substrate; a semiconductor layer formed on the GaN substrate; a ridge formed in the semiconductor layer; a recess formed in the bottom surface of the GaN substrate. The recess has a depth less than the thickness of the GaN substrate. The device also has a notch deeper than the recess formed on a side surface of the GaN substrate and separated from the recess. In the semiconductor laser device, the total thickness of the GaN substrate and the semiconductor layer is 100 ?m or more, and the distance between the top surface of the ridge and the bottom surface of the recess is 5 ?m or more and 50 ?m or less.
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: June 4, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Maki Sugai, Shinji Saito, Rei Hashimoto, Yasushi Hattori, Jongil Hwang, Masaki Tohyama, Shinya Nunoue
  • Patent number: 8456010
    Abstract: A semiconductor device of an embodiment includes: a semiconductor layer made of p-type nitride semiconductor; an oxide layer formed on the semiconductor layer, the oxide layer being made of a polycrystalline nickel oxide, and the oxide layer having a thickness of 3 nm or less; and a metal layer formed on the oxide layer.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: June 4, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shinji Saito, Maki Sugai, Eiji Muramoto, Shinya Nunoue
  • Patent number: 8432947
    Abstract: A semiconductor light emitting device includes: a stacked body including a first and a second semiconductor layers of a first and second conductivity types respectively, and a light emitting layer provided between thereof; a first and a second electrodes in contact with the first and second semiconductor layers respectively. Light emitted is resonated between first and second end surfaces of the stacked body opposed in a first direction. The second semiconductor layer includes a ridge portion and a wide portion. A width of the ridge portion along a second direction perpendicular to the first and the stacking directions is narrower on the second electrode side than on the light emitting layer side. A width of the wide portion along the second direction is wider than the ridge portion.
    Type: Grant
    Filed: March 8, 2010
    Date of Patent: April 30, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Maki Sugai, Shinji Saito, Rei Hashimoto, Yasushi Hattori, Shinya Nunoue
  • Patent number: 8369375
    Abstract: Disclosed is a semiconductor light-emitting device including a package having a light outlet, a semiconductor laser diode disposed in the package and radiating a light having a first wavelength falling within a range of ultraviolet ray to visible light, and a visible-light-emitter containing a phosphor which absorbs a light radiated from the semiconductor laser diode and emits a visible light having a second wavelength differing from the first wavelength, the visible-light-emitter being disposed on an optical path of the laser diode and a peripheral edge of the visible-light-emitter being in contact with the package.
    Type: Grant
    Filed: March 23, 2010
    Date of Patent: February 5, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasushi Hattori, Rei Hashimoto, Shinji Saito, Maki Sugai, Shinya Nunoue
  • Publication number: 20120299015
    Abstract: According to one embodiment, a nitride semiconductor device includes a substrate and a semiconductor functional layer. The substrate is a single crystal. The semiconductor functional layer is provided on a major surface of the substrate and includes a nitride semiconductor. The substrate includes a plurality of structural bodies disposed in the major surface. Each of the plurality of structural bodies is a protrusion provided on the major surface or a recess provided on the major surface. An absolute value of an angle between a nearest direction of an arrangement of the plurality of structural bodies and a nearest direction of a crystal lattice of the substrate in a plane parallel to the major surface is not less than 1 degree and not more than 10 degrees.
    Type: Application
    Filed: February 27, 2012
    Publication date: November 29, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Koichi TACHIBANA, Hisashi Yoshida, Hiroshi Ono, Hajime Nago, Yoshiyuki Harada, Toshiki Hikosaka, Maki Sugai, Toshiyuki Oka, Shinya Nunoue
  • Publication number: 20120298952
    Abstract: According to an embodiment, a semiconductor light emitting device includes a foundation layer, a first semiconductor layer, a light emitting layer, and a second semiconductor layer. The foundation layer has an unevenness having recesses, side portions, and protrusions. A first major surface of the foundation layer has an overlay-region. The foundation layer has a plurality of dislocations including first dislocations whose one ends reaching the recess and second dislocations whose one ends reaching the protrusion. A proportion of a number of the second dislocations reaching the first major surface to a number of all of the second dislocations is smaller than a proportion of a number of the first dislocations reaching the first major surface to a number of all of the first dislocations. A number of the dislocations reaching the overlay-region of the first major surface is smaller than a number of all of the first dislocations.
    Type: Application
    Filed: February 28, 2012
    Publication date: November 29, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Toshiki HIKOSAKA, Yoshiyuki HARADA, Maki SUGAI, Shinya NUNOUE