Patents by Inventor Makoto Ikuma

Makoto Ikuma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190289238
    Abstract: A solid-state imaging apparatus includes a pixel array, a column processor, and a test signal generating circuit that generates a first digital signal for testing purposes. The test signal generating circuit generates the first digital signal within one horizontal scanning period. The column processor converts a first analog signal, that is converted from the first digital signal, to a second digital signal within the one horizontal scanning period.
    Type: Application
    Filed: June 4, 2019
    Publication date: September 19, 2019
    Inventors: Makoto IKUMA, Hiroyuki Amikawa, Takayasu Kito, Shinichi Ogita, Junichi Matsuo, Yasuyuki Endoh, Katsumi Tokuyama, Tetsuya Abe
  • Publication number: 20190288020
    Abstract: A solid-state imaging apparatus includes a plurality of high-sensitivity pixels that are arranged in a matrix, and perform a photoelectric conversion at a predetermined sensitivity; a plurality of low-sensitivity pixels that are arranged in a matrix in gaps between the plurality of high-sensitivity pixels, and perform a photoelectric conversion at a lower sensitivity than the predetermined sensitivity; and a signal processor that generates a pixel signal by (i) detecting a difference signal between a signal from the plurality of high-sensitivity pixels and a signal from the plurality of low-sensitivity pixels, and (ii) correcting the signal from the plurality of high-sensitivity pixels using the difference signal.
    Type: Application
    Filed: June 4, 2019
    Publication date: September 19, 2019
    Inventors: Makoto IKUMA, Hiroyuki AMIKAWA, Takayasu KITO, Shinichi OGITA, Junichi MATSUO, Yasuyuki ENDOH, Katsumi TOKUYAMA, Tetsuya ABE
  • Patent number: 10194105
    Abstract: A solid-state imaging device includes: a pixel array including a plurality of pixel circuits arranged in rows and columns; a vertical signal line that is provided for each of the columns and transmits pixel signals; a column AD circuit that is provided for each of the columns and AD converts the pixel signals from the vertical signal line; a column-switching circuit that is interposed in the vertical signal line between the pixel array and the column AD circuit and switches connection between the vertical signal line and the column AD circuit; a controller that causes the column-switching circuit to switch the connection for every horizontal scan period; and a restoration circuit that restores ordering of the AD converted signals so as to correspond to ordering in which the vertical signal lines are arranged in the pixel array.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: January 29, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Makoto Ikuma, Manabu Tsunoda, Kenji Watanabe, Kenichi Haga, Masaru Kato
  • Publication number: 20180376083
    Abstract: A solid-state imaging device includes: a pixel including a photoelectric converter that generates a charge and a charge accumulator that converts the charge into a voltage; a controller that causes the pixel to perform exposure in a first exposure mode and convert the charge into the voltage with a first gain to output a first pixel signal, and causes the pixel to perform exposure in a second exposure mode and convert the charge into the voltage with a second gain to output a second pixel signal, the second exposure mode being shorter in exposure time than the first exposure mode, and the second gain being lower than the first gain; and a signal processor that synthesizes the second pixel signal after amplification and the first pixel signal.
    Type: Application
    Filed: August 9, 2018
    Publication date: December 27, 2018
    Inventors: Makoto IKUMA, Takahiro MUROSHIMA, Takayasu KITO, Hiroyuki AMIKAWA, Tetsuya ABE
  • Publication number: 20180376081
    Abstract: A solid-state imaging device includes: a pixel array unit in which a plurality of pixels are arranged in rows and columns; a plurality of column signal lines which are provided in one-to-one correspondence with pixel columns; a column processor including a plurality of column AD circuits provided in one-to-one correspondence with the plurality of column signal lines; a power supply variation detector which is connected to a power supply wire through which a power supply voltage is transmitted to each of the pixels, and which detects, in correspondence with pixel rows, power supply variation components attributed to variations in the power supply voltage; and a power supply variation corrector which corrects, for each of the pixel rows, a pixel signal detected by the column processor, using the power supply variation components detected by the power supply variation detector.
    Type: Application
    Filed: August 9, 2018
    Publication date: December 27, 2018
    Inventors: Makoto IKUMA, Takahiro MUROSHIMA, Takayasu KITO, Hiroyuki AMIKAWA, Tetsuya ABE
  • Patent number: 10116887
    Abstract: A solid-state imaging device includes: a plurality of pixel circuits arranged in rows and columns; a plurality of unit power supply circuits that generate a second power supply voltage from a first power supply voltage based on a reference voltage and supply the second power supply voltage to amplifier transistors provided in the plurality of pixel circuits; and a regulator circuit that generates the reference voltage that is constant. Each of the unit power supply circuits is provided for a corresponding one of the columns of the plurality of pixel circuits or for a corresponding one of the pixel circuits, and supplies the second power supply voltage to the amplifier transistors in the pixel circuits that belong to the corresponding one of the columns or to the amplifier transistor in the corresponding one of the pixel circuits.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: October 30, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Makoto Ikuma, Masaru Kato
  • Publication number: 20170302870
    Abstract: A solid-state imaging device includes: a plurality of pixel circuits arranged in rows and columns; a plurality of unit power supply circuits that generate a second power supply voltage from a first power supply voltage based on a reference voltage and supply the second power supply voltage to amplifier transistors provided in the plurality of pixel circuits; and a regulator circuit that generates the reference voltage that is constant. Each of the unit power supply circuits is provided for a corresponding one of the columns of the plurality of pixel circuits or for a corresponding one of the pixel circuits, and supplies the second power supply voltage to the amplifier transistors in the pixel circuits that belong to the corresponding one of the columns or to the amplifier transistor in the corresponding one of the pixel circuits.
    Type: Application
    Filed: June 28, 2017
    Publication date: October 19, 2017
    Inventors: Makoto IKUMA, Masaru KATO
  • Publication number: 20170302869
    Abstract: A solid-state imaging device includes: a pixel array including a plurality of pixel circuits arranged in rows and columns; a vertical signal line that is provided for each of the columns and transmits pixel signals; a column AD circuit that is provided for each of the columns and AD converts the pixel signals from the vertical signal line; a column-switching circuit that is interposed in the vertical signal line between the pixel array and the column AD circuit and switches connection between the vertical signal line and the column AD circuit; a controller that causes the column-switching circuit to switch the connection for every horizontal scan period; and a restoration circuit that restores ordering of the AD converted signals so as to correspond to ordering in which the vertical signal lines are arranged in the pixel array.
    Type: Application
    Filed: June 28, 2017
    Publication date: October 19, 2017
    Inventors: Makoto IKUMA, Manabu TSUNODA, Kenji WATANABE, Kenichi HAGA, Masaru KATO
  • Patent number: 9413993
    Abstract: A solid-state imaging device according to the present invention includes: a pixel block in which pixels are arranged in a matrix; vertical common signal lines each provided for a corresponding one of columns of the plurality of pixels, and reads signals of pixels in the corresponding column; and a column constant current source which supplies a current to the vertical common signal lines, wherein the column constant current source includes: load transistors each having a source terminal and a drain terminal one of which is connected to one of the vertical common signal lines and the other of which is grounded; a constant voltage supply unit which supplies a voltage to gate terminals of the load transistors; and a voltage holding circuit in which sample and hold circuits are connected in multiple stages, and which stabilizes the voltage which is supplied to the gate terminals of the load transistors.
    Type: Grant
    Filed: May 29, 2014
    Date of Patent: August 9, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Koji Hikosaka, Makoto Ikuma
  • Patent number: 9374070
    Abstract: A ramp generator circuit includes: a reference signal generator circuit which generates a ramp waveform having a slope obtained by multiplication using a power of 2 according to a value of a higher order bit of a gain control signal; a clock control circuit which selectively outputs 2^m kinds of fractional-N clocks according to one of 2^m (natural number) areas obtained by dividing a code range represented by a lower order bit, when a negative gain is set; and a variable gain circuit which sets a ramp waveform according to the value of the gain control signal, and sets a ramp signal amplitude in each area so that a period ratio between ramp driving clocks for adjacent areas and a ratio between an amplitude of a ramp signal when the standard gain is set and a largest amplitude of a ramp signal are equal.
    Type: Grant
    Filed: November 24, 2014
    Date of Patent: June 21, 2016
    Assignee: PAANSONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Masahiro Higuchi, Hiroshi Fujinaka, Makoto Ikuma
  • Patent number: 9232160
    Abstract: A voltage generation circuit includes a control circuit which outputs a first digital signal, a DAC which outputs a first analog signal corresponding to the first digital signal, and an attenuator which is connected to an output terminal of the DAC and is configured to output a voltage signal obtained by attenuating the first analog signal input from the DAC.
    Type: Grant
    Filed: October 14, 2013
    Date of Patent: January 5, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Makoto Ikuma, Hiroshi Fujinaka, Masahiro Higuchi, Yuusuke Yamaoka
  • Patent number: 9131177
    Abstract: A solid-state imaging device including: a plurality of pixels which are on a same semiconductor substrate and each of which generates a pixel signal; a comparison circuit that is connected to the pixels in each of columns; a D/A conversion circuit that generates a comparison potential and provide the generated comparison potential in common to the comparison circuit in each column; and a D/A conversion circuit output unit provided in a common line for providing the comparison potential to the comparison circuit in each column, wherein the D/A conversion circuit output unit includes: a source follower circuit that is provided to the line and includes a first current source having a transistor, and an amplification transistor having a gate oxide film that is thinner than a gate oxide film of the transistor; and a voltage control circuit that controls a drain-to-source voltage of the amplification transistor.
    Type: Grant
    Filed: June 2, 2014
    Date of Patent: September 8, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Sanshiro Shishido, Yutaka Abe, Masahiro Higuchi, Makoto Ikuma
  • Patent number: 9066031
    Abstract: A solid-state imaging device includes a plurality of pixel cells arranged in rows and columns, a plurality of vertical signal lines each of which is provided for a corresponding one of the columns, and a plurality of column circuits each of which is provided for a corresponding one or more of the columns and into each of which are input the signal voltages output to one or more of the vertical signal lines disposed in the corresponding one or more of the columns. Each of the plurality of column circuits includes an amplifier that includes a constant current source transistor, the solid-state imaging device further includes a reference current source circuit that supplies a first bias voltage to gates of a plurality of the constant current source transistors included in the column circuits, and each of the column circuits further includes a sample-and-hold circuit that holds the first bias voltage.
    Type: Grant
    Filed: February 18, 2014
    Date of Patent: June 23, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Masashi Murakami, Makoto Ikuma, Yutaka Abe
  • Publication number: 20150076325
    Abstract: A ramp generator circuit includes: a reference signal generator circuit which generates a ramp waveform having a slope obtained by multiplication using a power of 2 according to a value of a higher order bit of a gain control signal; a clock control circuit which selectively outputs 2?m kinds of fractional-N clocks according to one of 2?m (natural number) areas obtained by dividing a code range represented by a lower order bit, when a negative gain is set; and a variable gain circuit which sets a ramp waveform according to the value of the gain control signal, and sets a ramp signal amplitude in each area so that a period ratio between ramp driving clocks for adjacent areas and a ratio between an amplitude of a ramp signal when the standard gain is set and a largest amplitude of a ramp signal are equal.
    Type: Application
    Filed: November 24, 2014
    Publication date: March 19, 2015
    Inventors: Masahiro HIGUCHI, Hiroshi FUJINAKA, Makoto IKUMA
  • Publication number: 20140263966
    Abstract: A solid-state imaging device according to the present invention includes: a pixel block in which pixels are arranged in a matrix; vertical common signal lines each provided for a corresponding one of columns of the plurality of pixels, and reads signals of pixels in the corresponding column; and a column constant current source which supplies a current to the vertical common signal lines, wherein the column constant current source includes: load transistors each having a source terminal and a drain terminal one of which is connected to one of the vertical common signal lines and the other of which is grounded; a constant voltage supply unit which supplies a voltage to gate terminals of the load transistors; and a voltage holding circuit in which sample and hold circuits are connected in multiple stages, and which stabilizes the voltage which is supplied to the gate terminals of the load transistors.
    Type: Application
    Filed: May 29, 2014
    Publication date: September 18, 2014
    Applicant: Panasonic Corporation
    Inventors: Koji HIKOSAKA, Makoto IKUMA
  • Publication number: 20140267854
    Abstract: A solid-state imaging device including: a plurality of pixels which are on a same semiconductor substrate and each of which generates a pixel signal; a comparison circuit that is connected to the pixels in each of columns; a D/A conversion circuit that generates a comparison potential and provide the generated comparison potential in common to the comparison circuit in each column; and a D/A conversion circuit output unit provided in a common line for providing the comparison potential to the comparison circuit in each column, wherein the D/A conversion circuit output unit includes: a source follower circuit that is provided to the line and includes a first current source having a transistor, and an amplification transistor having a gate oxide film that is thinner than a gate oxide film of the transistor; and a voltage control circuit that controls a drain-to-source voltage of the amplification transistor.
    Type: Application
    Filed: June 2, 2014
    Publication date: September 18, 2014
    Applicant: Panasonic Corporation
    Inventors: Sanshiro SHISHIDO, Yutaka ABE, Masahiro HIGUCHI, Makoto IKUMA
  • Patent number: 8754973
    Abstract: A solid-state imaging device includes unit pixels arranged in rows and columns, and reads a pixel signal from the unit pixels selected for each of the rows. The device includes: column signal lines provided for the columns of the unit pixels; amplifying transistors included in the unit pixels and each outputting the pixel signal; correlated double sampling units provided for the columns of the unit pixels and each performing correlated double sampling on a reset component of the pixel signal and on a data component including the reset component and a signal component of the pixel signal so as to sample the signal component; and low-pass filters each (i) inserted in the column signal line between an output terminal of the amplifying transistor and the correlated double sampling unit or (ii) included in the correlated double sampling unit.
    Type: Grant
    Filed: August 22, 2012
    Date of Patent: June 17, 2014
    Assignee: Panasonic Corporation
    Inventors: Makoto Ikuma, Yutaka Abe
  • Publication number: 20140160331
    Abstract: A solid-state imaging device includes a plurality of pixel cells arranged in rows and columns, a plurality of vertical signal lines each of which is provided for a corresponding one of the columns, and a plurality of column circuits each of which is provided for a corresponding one or more of the columns and into each of which are input the signal voltages output to one or more of the vertical signal lines disposed in the corresponding one or more of the columns. Each of the plurality of column circuits includes an amplifier that includes a constant current source transistor, the solid-state imaging device further includes a reference current source circuit that supplies a first bias voltage to gates of a plurality of the constant current source transistors included in the column circuits, and each of the column circuits further includes a sample-and-hold circuit that holds the first bias voltage.
    Type: Application
    Filed: February 18, 2014
    Publication date: June 12, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Masashi MURAKAMI, Makoto IKUMA, Yutaka ABE
  • Publication number: 20140034812
    Abstract: A voltage generation circuit includes a control circuit which outputs a first digital signal, a DAC which outputs a first analog signal corresponding to the first digital signal, and an attenuator which is connected to an output terminal of the DAC and is configured to output a voltage signal obtained by attenuating the first analog signal input from the DAC.
    Type: Application
    Filed: October 14, 2013
    Publication date: February 6, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Makoto IKUMA, Hiroshi FUJINAKA, Masahiro HIGUCHI, Yuusuke YAMAOKA
  • Patent number: 8520107
    Abstract: An analog-digital converter includes n comparators arranged in a first direction with a predetermined cell pitch and corresponding respectively to n input voltages, each comparator comparing a voltage value of a reference signal whose voltage value increases or decreases over time with an input voltage corresponding to the comparator. Each of the n comparators includes differential transistors to which the reference signal and the input voltage are given respectively. A differential transistor is formed by p unit transistors connected in series whose gates are given the reference signal, and another differential transistor is formed by p unit transistors connected in series whose gates are given the input voltage.
    Type: Grant
    Filed: June 23, 2011
    Date of Patent: August 27, 2013
    Assignee: Panasonic Corporation
    Inventors: Kazuko Nishimura, Makoto Ikuma, Yutaka Abe