Patents by Inventor Makoto Imai

Makoto Imai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10964630
    Abstract: A semiconductor device may include a first conductor plate on which a first semiconductor element, a second semiconductor element and a first circuit board are disposed, and a plurality of first signal terminals. A size of the second semiconductor is smaller than a size of the first semiconductor element. In a plan view along a direction perpendicular to the first conductor plate, the plurality of first signal terminals is located in a first direction with respect to the first semiconductor element. The second semiconductor element and the first circuit board are located between the plurality of first signal terminals and the first semiconductor element and are arranged along a second direction that is perpendicular to the first direction. A signal pad of the first semiconductor element is connected to a corresponding one of the plurality of first signal terminals via a signal transmission path of the first circuit board.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: March 30, 2021
    Assignee: DENSO CORPORATION
    Inventors: Takanori Kawashima, Makoto Imai, Masaki Aoshima
  • Patent number: 10720402
    Abstract: A semiconductor chip includes a chip body and a plurality of solder-including electrodes provided on an element-formation surface of the chip body. A packaging substrate includes a substrate body, and one or more conductive layers and a solder resist layer that are provided on a front surface of the substrate body. The solder resist layer is provided as a continuous layer on the front surface of the substrate body and the one or more conductive layers, and has one or more apertures on each of the one or more conductive layers. The plurality of solder-including electrodes include two or more first electrodes having a same function other than a function of power supply. The one or more conductive layers include a continuous first conductive layer. The two or more first electrodes are connected to the continuous first conductive layer. The one or more apertures are confronted with the respective two or more first electrodes.
    Type: Grant
    Filed: June 5, 2015
    Date of Patent: July 21, 2020
    Assignee: SONY CORPORATION
    Inventors: Makoto Murai, Kazuki Sato, Hiroyuki Yamada, Yuji Takaoka, Makoto Imai, Shigeki Amano
  • Publication number: 20200098673
    Abstract: A semiconductor device may include a first conductor plate on which a first semiconductor element, a second semiconductor element and a first circuit board are disposed, and a plurality of first signal terminals. A size of the second semiconductor is smaller than a size of the first semiconductor element. In a plan view along a direction perpendicular to the first conductor plate, the plurality of first signal terminals is located in a first direction with respect to the first semiconductor element. The second semiconductor element and the first circuit board are located between the plurality of first signal terminals and the first semiconductor element and are arranged along a second direction that is perpendicular to the first direction. A signal pad of the first semiconductor element is connected to a corresponding one of the plurality of first signal terminals via a signal transmission path of the first circuit board.
    Type: Application
    Filed: July 31, 2019
    Publication date: March 26, 2020
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Takanori KAWASHIMA, Makoto IMAI, Masaki AOSHIMA
  • Publication number: 20190375927
    Abstract: Disclosed are: a polypropylene-based resin composition comprising 100 parts by mass of polypropylene-based resin (A) (provided that, when the polypropylene-based resin includes other resins and/or inorganic filler, the total amount of the polypropylene-based resin and other resins and/or inorganic filler is taken as 100 parts by mass), 0.80 to 5.0 parts by mass of on or more types of aluminum flakes (B) having an average particle size of 5 to 90 ?m, and 0.005 to 0.06 parts by mass of carbon black (C); and a molded article obtained by injection-molding this polypropylene-based resin composition. The polypropylene-based resin composition and the molded article obtained from this are excellent in a flip-flop metallic feeling, a heavy luxury feeling, light resistance and a feeling of luminance.
    Type: Application
    Filed: February 22, 2018
    Publication date: December 12, 2019
    Applicant: PRIME POLYMER CO., LTD.
    Inventors: Makoto IMAI, Takuya SHINOZUKA, Yukimasa TANAKA, Ichinosuke HIRANO
  • Publication number: 20190341362
    Abstract: A semiconductor device may include a semiconductor module, a busbar, and a connection member. The semiconductor module may include a semiconductor element and a power terminal connected to the semiconductor element. The power terminal of the semiconductor module may be connected to the busbar via the connection member. A fusing current of the connection member may be smaller than each of fusing currents of the power terminal and the busbar.
    Type: Application
    Filed: March 26, 2019
    Publication date: November 7, 2019
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Takanori KAWASHIMA, Makoto IMAI
  • Patent number: 10157815
    Abstract: A semiconductor device includes: a sealing body that seals a first semiconductor element and a second semiconductor element; first heat-radiating members exposed at a front surface of the sealing body; second heat-radiating members exposed at a back surface of the sealing body; first signal terminals electrically connected to the first semiconductor element, and projecting from a top surface of the sealing body in a first direction; and second signal terminals electrically connected to the second semiconductor elements, and projecting from the top surface of the sealing body in the first direction. The top surface of the sealing body includes a first inclined surface, a second inclined surface, and a boundary line or a boundary range located therebetween. The boundary line or the boundary range includes at least part of a minimum creepage path between the first signal terminals and the second signal terminals.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: December 18, 2018
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Keita Hatasa, Makoto Imai, Tomomi Okumura
  • Patent number: 10014248
    Abstract: Provided is a semiconductor device that includes a semiconductor chip, and a packaging substrate on which the semiconductor chip is mounted. The semiconductor chip includes a chip body and a plurality of solder-including electrodes that are provided on an element-formation surface of the chip body. The packaging substrate includes a substrate body, and a plurality of wirings and a solder resist layer that are provided on a front surface of the substrate body. The solder resist layer is provided as a continuous layer on the front surface of the substrate body and the plurality of wirings, and has an aperture on each of the plurality of wirings. The aperture has a planar shape elongated in a lengthwise direction of the wiring inside the aperture, with a length of the aperture adjusted in accordance with a thermal expansion coefficient of the packaging substrate.
    Type: Grant
    Filed: June 5, 2015
    Date of Patent: July 3, 2018
    Assignee: SONY CORPORATION
    Inventors: Makoto Murai, Yuji Takaoka, Hiroyuki Yamada, Kazuki Sato, Makoto Imai
  • Publication number: 20180182732
    Abstract: Provided is a semiconductor device comprising; a semiconductor chip, a first electrode pair, a first wire group that has a plurality of bonding wires connecting electrodes of the first electrode pair in parallel, and a sealing portion that mold-seals said elements, wherein the plurality of bonding wires belonging to the first wire group are wired such that length of each of the bonding wires on a far side in a first direction parallel with an in-plane direction of the semiconductor chip is longer than length of each of the bonding wires on a near side, and each height at respective positions of each of the bonding wires on the far side in the first direction is not lower than each height at respective positions, corresponding to the respective positions of each of the bonding wires on the far side, of each of the bonding wires on the near side.
    Type: Application
    Filed: November 30, 2017
    Publication date: June 28, 2018
    Inventor: Makoto IMAI
  • Patent number: 9962736
    Abstract: Low-gloss flexible clear coast can include a base formula that includes a base resin and a cross-linker, a silica-based flattener, wherein the silica-based flattener comprises from 5 parts by weight per 100 parts by weight of the base formula to 20 parts by weight per 100 parts by weight of the base formula, one or more flattener enhancing agents, wherein the one or more flattener enhancing agents comprise 0.25 parts by weight per 100 parts by weight of the base formula to 5 parts by weight per 100 parts by weight of the base formula, and possess 90° flexibility and a 60° gloss finish from 22 gloss units to 34 gloss units.
    Type: Grant
    Filed: September 8, 2010
    Date of Patent: May 8, 2018
    Assignees: Toyota Motor Engineering & Manufacturing North America, Inc., NB Coatings, Inc.
    Inventors: Yuko Nagata Gidcumb, Scott Dale Kubish, Joe Mecozzi, Makoto Imai
  • Patent number: 9966682
    Abstract: A female connection terminal includes a first female terminal having a substantially cylindrical shape with openings at one end and another end, a second female terminal having a substantially cylindrical shape with openings at one end and another end, and a coupling spring coupling together the first female terminal and the second female terminal at the other end of the first female terminal and the other end of the second female terminal. The coupling spring connects the first female terminal and the second female terminal to each other without, when viewed from an upper side, overlapping at least one of the openings of the first female terminal on the other end side and at least one of the openings of the second female terminal on the other end side.
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: May 8, 2018
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Keita Hatasa, Makoto Imai
  • Publication number: 20180063891
    Abstract: A resonant circuit in an inverter includes a first resonant circuit configured with a heating coil and a first resonant capacitor connected in series to the heating coil, a second resonant circuit configured with the first resonant circuit and a second resonant capacitor connected in parallel to the first resonant circuit, and a resonance choke coil connected in series to the second resonant circuit. The resonant circuit is configured so that impedance of the heating coil and the first resonant capacitor is set to be close to impedance of the second resonant capacitor, at a frequency of a current flowing through the heating coil. Thus, an object to be heated can be efficiently induction-heated without an increase in a current flowing through the switching element.
    Type: Application
    Filed: August 4, 2017
    Publication date: March 1, 2018
    Inventors: Makoto IMAI, Atsushi FUJITA, Takayuki HIROKAWA
  • Patent number: 9754863
    Abstract: The semiconductor device improves heat dissipation by loading a diode and a MOSFET or IGBT in a single package. A drain electrode disposed on a rear surface of a MOSFET chip is soldered to an upper surface of a first lead frame, and a cathode electrode disposed on a rear surface of a diode chip is soldered to an upper surface of a second lead frame. Rear surfaces of the first lead frame and second lead frame to which neither the diode chip nor the MOSFET chip is connected are disposed so as to be exposed from a sealing resin.
    Type: Grant
    Filed: June 9, 2016
    Date of Patent: September 5, 2017
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Sota Watanabe, Hiroaki Furihata, Makoto Imai
  • Publication number: 20170162462
    Abstract: A semiconductor device includes: a sealing body that seals a first semiconductor element and a second semiconductor element; first heat-radiating members exposed at a front surface of the sealing body; second heat-radiating members exposed at a back surface of the sealing body; first signal terminals electrically connected to the first semiconductor element, and projecting from a top surface of the sealing body in a first direction; and second signal terminals electrically connected to the second semiconductor elements, and projecting from the top surface of the sealing body in the first direction. The top surface of the sealing body includes a first inclined surface, a second inclined surface, and a boundary line or a boundary range located therebetween. The boundary line or the boundary range includes at least part of a minimum creepage path between the first signal terminals and the second signal terminals.
    Type: Application
    Filed: December 2, 2016
    Publication date: June 8, 2017
    Inventors: Keita Hatasa, Makoto Imai, Tomomi Okumura
  • Publication number: 20170162493
    Abstract: Provided is a semiconductor device that includes a semiconductor chip, and a packaging substrate on which the semiconductor chip is mounted. The semiconductor chip includes a chip body and a plurality of solder-including electrodes that are provided on an element-formation surface of the chip body. The packaging substrate includes a substrate body, and a plurality of wirings and a solder resist layer that are provided on a front surface of the substrate body. The solder resist layer is provided as a continuous layer on the front surface of the substrate body and the plurality of wirings, and has an aperture on each of the plurality of wirings. The aperture has a planar shape elongated in a lengthwise direction of the wiring inside the aperture, with a length of the aperture adjusted in accordance with a thermal expansion coefficient of the packaging substrate.
    Type: Application
    Filed: June 5, 2015
    Publication date: June 8, 2017
    Inventors: MAKOTO MURAI, YUJI TAKAOKA, HIROYUKI YAMADA, KAZUKI SATO, MAKOTO IMAI
  • Publication number: 20170162970
    Abstract: A female connection terminal includes a first female terminal having a substantially cylindrical shape with openings at one end and another end, a second female terminal having a substantially cylindrical shape with openings at one end and another end, and a coupling spring coupling together the first female terminal and the second female terminal at the other end of the first female terminal and the other end of the second female terminal. The coupling spring connects the first female terminal and the second female terminal to each other without, when viewed from an upper side, overlapping at least one of the openings of the first female terminal on the other end side and at least one of the openings of the second female terminal on the other end side.
    Type: Application
    Filed: November 22, 2016
    Publication date: June 8, 2017
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Keita HATASA, Makoto IMAI
  • Publication number: 20170148760
    Abstract: A semiconductor chip includes a chip body and a plurality of solder-including electrodes provided on an element-formation surface of the chip body. A packaging substrate includes a substrate body, and one or more conductive layers and a solder resist layer that are provided on a front surface of the substrate body. The solder resist layer is provided as a continuous layer on the front surface of the substrate body and the one or more conductive layers, and has one or more apertures on each of the one or more conductive layers. The plurality of solder-including electrodes include two or more first electrodes having a same function other than a function of power supply. The one or more conductive layers include a continuous first conductive layer. The two or more first electrodes are connected to the continuous first conductive layer. The one or more apertures are confronted with the respective two or more first electrodes.
    Type: Application
    Filed: June 5, 2015
    Publication date: May 25, 2017
    Inventors: MAKOTO MURAI, KAZUKI SATO, HIROYUKI YAMADA, YUJI TAKAOKA, MAKOTO IMAI, SHIGEKI AMANO
  • Publication number: 20160365303
    Abstract: The semiconductor device improves heat dissipation by loading a diode and a MOSFET or IGBT in a single package. A drain electrode disposed on a rear surface of a MOSFET chip is soldered to an upper surface of a first lead frame, and a cathode electrode disposed on a rear surface of a diode chip is soldered to an upper surface of a second lead frame. Rear surfaces of the first lead frame and second lead frame to which neither the diode chip nor the MOSFET chip is connected are disposed so as to be exposed from a sealing resin.
    Type: Application
    Filed: June 9, 2016
    Publication date: December 15, 2016
    Inventors: Sota WATANABE, Hiroaki FURUHATA, Makoto IMAI
  • Patent number: 9469623
    Abstract: An object of the present invention is to provide an optically active bicyclic ?-amino acid derivative in a high purity.
    Type: Grant
    Filed: February 6, 2015
    Date of Patent: October 18, 2016
    Assignee: Daiichi Sankyo Company, Limited
    Inventors: Yoshitaka Nakamura, Kazutoshi Ukai, Takafumi Kitawaki, Takumi Nakajima, Yutaka Kitagawa, Yukito Furuya, Makoto Imai, Eiji Numagami, Masakazu Wakayama, Ayako Saito
  • Patent number: 9437520
    Abstract: A semiconductor device includes a semiconductor element having a rectangular shape in a plan view, and a fixed member to which the semiconductor element is fixed. The semiconductor element is disposed so that a rectangular face of the semiconductor element is faced toward a surface of the fixed member. A part of the rectangular face of the semiconductor element is fixed to the surface of the fixed member. At least corner parts of the rectangular face of the semiconductor element are not fixed to the surface of the fixed member.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: September 6, 2016
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Norimune Orimoto, Makoto Imai
  • Publication number: 20160027714
    Abstract: A semiconductor device includes a semiconductor element having a rectangular shape in a plan view, and a fixed member to which the semiconductor element is fixed. The semiconductor element is disposed so that a rectangular face of the semiconductor element is faced toward a surface of the fixed member. A part of the rectangular face of the semiconductor element is fixed to the surface of the fixed member. At least corner parts of the rectangular face of the semiconductor element are not fixed to the surface of the fixed member.
    Type: Application
    Filed: March 13, 2013
    Publication date: January 28, 2016
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Norimune ORIMOTO, Makoto IMAI