Patents by Inventor Makoto Miura
Makoto Miura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11931974Abstract: A filament winding apparatus includes a rail extending in a first direction, a core material support device that supports a core material, and a winding device that winds a fiber bundle onto an outer peripheral surface of the core material, the winding device including: a guide unit having an opening through which the core material passes, and guiding the fiber bundle; and a main frame on which the guide unit is mounted; wherein the main frame is movable relative to the core material in the first direction, the main frame is movable in a second direction orthogonal to the first direction, and the main frame is rotatable around a first rotational axis extending in a third direction orthogonal to each of the first direction and the second direction.Type: GrantFiled: November 12, 2019Date of Patent: March 19, 2024Assignee: Murata Machinery, Ltd.Inventors: Shu Ikezaki, Motohiro Tanigawa, Tadashi Uozumi, Hirotaka Wada, Masatsugu Goyude, Shota Miyaji, Takahiro Miura, Makoto Tanaka, Daigoro Nakamura, Tetsuya Matsuura
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Patent number: 11931949Abstract: A filament winding device includes a fiber bundle retainer that temporarily retains fiber bundles. The fiber bundle retainer includes: a reel member including an outer peripheral portion having pins movable in the axial direction relative to the fiber bundles supplied through fiber bundle guides and rotatable about the axis of the liner, the reel member capable of winding the fiber bundles onto the outer peripheral portion; a first cutting unit configured to cut a part of each of the fiber bundles in the circumferential direction, the part being between a part of the fiber bundle wound on the outer peripheral portion and a part of the fiber bundle wound on the liner; and a second cutting unit different from the first cutting unit and configured to cut a part of each of the fiber bundles in the axial direction, the part being wound on the outer peripheral portion.Type: GrantFiled: December 17, 2019Date of Patent: March 19, 2024Assignee: Murata Machinery, Ltd.Inventors: Shu Ikezaki, Motohiro Tanigawa, Tadashi Uozumi, Hirotaka Wada, Takahiro Miura, Makoto Tanaka, Masatsugu Goyude, Shota Miyaji, Daigoro Nakamura, Tetsuya Matsuura
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Publication number: 20230411167Abstract: A semiconductor device manufacturing method for manufacturing a semiconductor device including Gate All Around type Field effect transistors includes a step of removing an organic film on an n-type channel; a step of removing a work function control metal film on a bottom surface between channels; a step of forming a protective film onto an organic film on a p-type channel; and a step of removing a work function control metal film on the n-type channel.Type: ApplicationFiled: March 4, 2021Publication date: December 21, 2023Inventors: Mamoru Yakushiji, Kenichi Kuwahara, Makoto Miura
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Publication number: 20230296291Abstract: The present invention provides: a heat generation method that makes the first use of the ionic vacancies that are a by-product of an electrochemical reaction and have conventionally been left unreacted; and a device for implementing the same. The present invention pertains to: a heat generation method characterized by comprising colliding, in an electrochemical reaction that proceeds in an electrolysis cell, ionic vacancies having a positive charge generated at an anode and ionic vacancies having a negative charge generated at a cathode; and a heat generation device characterized by being equipped with an electrolysis cell provided with an anode and a cathode and an electrolyte solution accommodated within the electrolysis cell, and by generating heat by colliding ionic vacancies of opposite signs generated by causing the electrochemical reaction to proceed in the electrolysis cell via the anode and the cathode.Type: ApplicationFiled: May 22, 2023Publication date: September 21, 2023Inventors: Ryoichi Aogaki, Makoto Miura, Atsushi Sugiyama
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Patent number: 11692741Abstract: The present invention provides: a heat generation method that makes the first use of the ionic vacancies that are a by-product of an electrochemical reaction and have conventionally been left unreacted; and a device for implementing the same. The present invention pertains to: a heat generation method characterized by comprising colliding, in an electrochemical reaction that proceeds in an electrolysis cell, ionic vacancies having a positive charge generated at an anode and ionic vacancies having a negative charge generated at a cathode; and a heat generation device characterized by being equipped with an electrolysis cell provided with an anode and a cathode and an electrolyte solution accommodated within the electrolysis cell, and by generating heat by colliding ionic vacancies of opposite signs generated by causing the electrochemical reaction to proceed in the electrolysis cell via the anode and the cathode.Type: GrantFiled: July 31, 2019Date of Patent: July 4, 2023Assignee: NETECH, INC.Inventors: Ryoichi Aogaki, Makoto Miura, Atsushi Sugiyama
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Publication number: 20210372669Abstract: The present invention provides: a heat generation method that makes the first use of the ionic vacancies that are a by-product of an electrochemical reaction and have conventionally been left unreacted; and a device for implementing the same. The present invention pertains to: a heat generation method characterized by comprising colliding, in an electrochemical reaction that proceeds in an electrolysis cell, ionic vacancies having a positive charge generated at an anode and ionic vacancies having a negative charge generated at a cathode; and a heat generation device characterized by being equipped with an electrolysis cell provided with an anode and a cathode and an electrolyte solution accommodated within the electrolysis cell, and by generating heat by colliding ionic vacancies of opposite signs generated by causing the electrochemical reaction to proceed in the electrolysis cell via the anode and the cathode.Type: ApplicationFiled: July 31, 2019Publication date: December 2, 2021Inventors: Ryoichi Aogaki, Makoto Miura, Atsushi Sugiyama
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Publication number: 20210082766Abstract: In a manufacturing process of a three-dimensional structure device such as a GAA type FET or a nanosheet fork type FET having stacked channels in which channels having a shape of a wire or a sheet are stacked in a direction vertical to a substrate, a work function control metal is separately formed without expanding a space between FETs having different threshold voltages. Therefore, a first step S10 of performing anisotropic etching to open the mask material 23 until the work function control metal film 22 is exposed; a second step S11 of depositing a protective film 26; a third step S12 of performing anisotropic etching to remove the protective film while remaining the protective film deposited on sidewalls of the mask material opened in the first step; and a fourth step S13 of performing isotropic etching to selectively remove the mask material between the channels relative to the protective film and the work function control metal film are executed.Type: ApplicationFiled: September 13, 2019Publication date: March 18, 2021Applicant: Hitachi High-Tech CorporationInventors: Makoto Miura, Kiyohiko Sato, Yasushi Sonoda, Satoshi Sakai
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Patent number: 10892158Abstract: A manufacturing process of a semiconductor device including a SiGe channel can form a Si segregation layer for protecting the SiGe channel without damaging the SiGe channel. A manufacturing method of a semiconductor device includes: a first step for performing plasma processing on a semiconductor substrate having a silicon layer and a silicon germanium layer formed on the silicon layer under a first condition to expose the silicon germanium layer; and a second step for performing plasma processing on the semiconductor substrate under a second condition to segregate silicon on the surface of the exposed silicon germanium layer. The silicon germanium layer or layers lying adjacent to the silicon germanium layer can be etched under the first condition, hydrogen plasma processing is performed under the second condition, and the first step and the second step are executed in series in the same processing chamber of a plasma processing apparatus.Type: GrantFiled: April 1, 2019Date of Patent: January 12, 2021Assignee: HITACHI HIGH-TECH CORPORATIONInventors: Makoto Miura, Yohei Ishii, Satoshi Sakai, Kenji Maeda
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Publication number: 20200312658Abstract: A manufacturing process of a semiconductor device including a SiGe channel can form a Si segregation layer for protecting the SiGe channel without damaging the SiGe channel. A manufacturing method of a semiconductor device includes: a first step for performing plasma processing on a semiconductor substrate having a silicon layer and a silicon germanium layer formed on the silicon layer under a first condition to expose the silicon germanium layer; and a second step for performing plasma processing on the semiconductor substrate under a second condition to segregate silicon on the surface of the exposed silicon germanium layer. The silicon germanium layer or layers lying adjacent to the silicon germanium layer can be etched under the first condition, hydrogen plasma processing is performed under the second condition, and the first step and the second step are executed in series in the same processing chamber of a plasma processing apparatus.Type: ApplicationFiled: April 1, 2019Publication date: October 1, 2020Inventors: Makoto MIURA, Yohei ISHII, Satoshi SAKAI, Kenji MAEDA
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Patent number: 10627160Abstract: A vacuum drying apparatus includes a chamber, a steam supply line, an evacuation line, a circulation line, and a pressurizing and heating unit. The chamber includes an inlet, an outlet, and a treatment space capable of accommodating food. The steam supply line is connected to the inlet and is configured to be capable of supplying steam into the treatment space. The evacuation line is connected to the outlet and is configured to be capable of evacuating the treatment space. The circulation line is provided outside the chamber and causes steam to circulate from the outlet to the inlet. The pressurizing and heating unit is provided in the circulation line.Type: GrantFiled: August 9, 2019Date of Patent: April 21, 2020Assignees: ULVAC, INC., NATIONAL UNIVERSITY CORPORATION, IWATE UNIVERSITYInventors: Makoto Miura, Takuya Morikawa, Norihisa Takada, Tsuyoshi Yoshimoto, Takashi Hanamoto, Yoichi Ohinata
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Publication number: 20190360748Abstract: A vacuum drying apparatus includes a chamber, a steam supply line, an evacuation line, a circulation line, and a pressurizing and heating unit. The chamber includes an inlet, an outlet, and a treatment space capable of accommodating food. The steam supply line is connected to the inlet and is configured to be capable of supplying steam into the treatment space. The evacuation line is connected to the outlet and is configured to be capable of evacuating the treatment space. The circulation line is provided outside the chamber and causes steam to circulate from the outlet to the inlet. The pressurizing and heating unit is provided in the circulation line.Type: ApplicationFiled: August 9, 2019Publication date: November 28, 2019Inventors: Makoto MIURA, Takuya MORIKAWA, Norihisa TAKADA, Tsuyoshi YOSHIMOTO, Takashi HANAMOTO, Yoichi OHINATA
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Patent number: 8350301Abstract: A semiconductor photodiode includes a semiconductor substrate; a first conduction type first semiconductor layer formed above the semiconductor substrate; a high resistance second semiconductor layer formed above the first semiconductor layer; a first conduction type third semiconductor layer formed above the second semiconductor layer; and a second conduction type fourth semiconductor layer buried in the second semiconductor layer, in which the fourth semiconductor layer is separated at a predetermined distance in a direction horizontal to the surface of the semiconductor substrate.Type: GrantFiled: July 17, 2010Date of Patent: January 8, 2013Assignee: Hitachi, Ltd.Inventors: Makoto Miura, Shinichi Saito, Youngkun Lee, Katsuya Oda
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Publication number: 20120287959Abstract: A germanium light-emitting device emitting light at high efficiency is provided by using germanium of small threading dislocation density. A germanium laser diode having a high quality germanium light-emitting layer is attained by using germanium formed over silicon dioxide. A germanium laser diode having a carrier density higher than the carrier density limit that can be injected by existent n-type germanium can be provided using silicon as an n-type electrode.Type: ApplicationFiled: January 28, 2011Publication date: November 15, 2012Inventors: Kazuki Tani, Shinichi Saito, Toshiki Sugawara, Youngkun Lee, Digh Hisamoto, Makoto Miura, Katsuya Oda
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Patent number: 8294213Abstract: A semiconductor photodiode device includes a semiconductor substrate, a first buffer layer containing a material different from that of the semiconductor substrate in a portion thereof, a first semiconductor layer formed above the buffer layer and having a lattice constant different from that of the semiconductor substrate, a second buffer layer formed above the first semiconductor layer and containing an element identical with that of the first semiconductor layer in a portion thereof, and a second semiconductor layer formed above the buffer layer in which a portion of the first semiconductor layer is formed of a plurality of island shape portions each surrounded with an insulating film, and the second buffer layer allows adjacent islands of the first semiconductor layer to coalesce with each other and is in contact with the insulating film.Type: GrantFiled: July 17, 2010Date of Patent: October 23, 2012Assignee: Hitachi, Ltd.Inventors: Makoto Miura, Shinichi Saito, Youngkun Lee, Katsuya Oda
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Publication number: 20110123671Abstract: The invention provides an additive for livestock feed and ingredients for a feed composition for livestock to improve the feed conversion ratio and the body weight gain efficiency by increasing the feed intake of livestock. The feed intake of livestock can be increased by providing the additive in the livestock feed, which includes monosodium L-glutamate and L-tryptophan, and wherein the mass ratio of free monosodium L-glutamate (provided that all converted into monosodium L-glutamate monohydrate) and free L-tryptophan (GLU/TRP ratio) is from 0.5 to 30.Type: ApplicationFiled: February 4, 2011Publication date: May 26, 2011Inventors: Makoto Miura, Kazuki Nakagawa, Shigeyuki Takeuchi, Kazumasa Watanabe
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Publication number: 20110031529Abstract: A semiconductor photodiode device includes a semiconductor substrate, a first buffer layer containing a material different from that of the semiconductor substrate in a portion thereof, a first semiconductor layer formed above the buffer layer and having a lattice constant different from that of the semiconductor substrate, a second buffer layer formed above the first semiconductor layer and containing an element identical with that of the first semiconductor layer in a portion thereof, and a second semiconductor layer formed above the buffer layer in which a portion of the first semiconductor layer is formed of a plurality of island shape portions each surrounded with an insulating film, and the second buffer layer allows adjacent islands of the first semiconductor layer to coalesce with each other and is in contact with the insulating film.Type: ApplicationFiled: July 17, 2010Publication date: February 10, 2011Inventors: Makoto MIURA, Shinichi Saito, Youngkun Lee, Katsuya Oda
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Publication number: 20110031578Abstract: A semiconductor photodiode includes a semiconductor substrate; a first conduction type first semiconductor layer formed above the semiconductor substrate; a high resistance second semiconductor layer formed above the first semiconductor layer; a first conduction type third semiconductor layer formed above the second semiconductor layer; and a second conduction type fourth semiconductor layer buried in the second semiconductor layer, in which the fourth semiconductor layer is separated at a predetermined distance in a direction horizontal to the surface of the semiconductor substrate.Type: ApplicationFiled: July 17, 2010Publication date: February 10, 2011Inventors: Makoto MIURA, Shinichi Saito, Youngkun Lee, Katsuya Oda
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Publication number: 20100315407Abstract: A display control circuit for a display includes a plurality of amplifiers connected to data lines of a display panel, the plurality of amplifiers being configured to apply a gray-scale voltage to the data lines when a bias current is supplied, and a control circuit that supplies a bias current to the amplifiers, wherein the control circuit detects an operating state of at least one amplifier among the plurality of amplifiers that operates by the bias current in a first time region, and causes the plurality of amplifiers to operate by supplying the bias current for a predetermined period according to the detection result in a second time region after the first time region.Type: ApplicationFiled: May 3, 2010Publication date: December 16, 2010Applicant: NEC ELECTRONICS CORPORATIONInventor: Makoto Miura
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Patent number: 7842973Abstract: A semiconductor device capable of avoiding generation of a barrier in a conduction band while maintaining high withstanding voltage and enabling high speed transistor operation at high current in a double hetero bipolar transistor, as well as a manufacturing method thereof, wherein a portion of the base and the collector is formed of a material with a forbidden band width narrower than that of a semiconductor substrate, a region where the forbidden band increases stepwise and continuously from the emitter side to the collector side is disposed in the inside of the base and the forbidden band width at the base-collector interface is designed so as to be larger than the minimum forbidden band width in the base, whereby the forbidden band width at the base layer edge on the collector side can be made closer to the forbidden band width of the semiconductor substrate than usual while sufficiently maintaining the hetero effect near the emitter-base thereby capable of decreasing the height of the energy barrier geneType: GrantFiled: July 13, 2006Date of Patent: November 30, 2010Assignee: Hitachi, Ltd.Inventors: Makoto Miura, Katsuyoshi Washio, Hiromi Shimamoto
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Patent number: 7812805Abstract: To provide a driver circuit that enables reduction in the number of elements formed through a high-voltage process and in chip size. An embodiment of the present invention relates to a driver circuit for inversion-driving a liquid crystal display panel, including: a positive-polarity line transmitting a positive display signal relative to a common electrode signal; a negative-polarity line transmitting a negative display signal relative to the common electrode signal; a dot inversion switch circuit switching the positive-polarity line and the negative-polarity line from each other to be connected with a source line; a charge recovery circuit connected with the positive-polarity line through a positive charge recovery switch and connected with the negative-polarity line through a negative charge recovery switch; and a common short circuit connecting the positive-polarity line and the negative-polarity line with a common electrode.Type: GrantFiled: October 18, 2005Date of Patent: October 12, 2010Assignee: NEC Electronics CorporationInventor: Makoto Miura