Patents by Inventor Makoto Nishizawa

Makoto Nishizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240066417
    Abstract: A top launching device for launching a top includes a device body and an operating belt. The device body includes first and second input rotors to rotate, an output rotor configured to hold the top in a state with a central axis of the output rotor aligned with a central axis of the top and configured to rotate and impart the rotational force to the top, and a coupling rotor configured to transmit the rotational force from the input rotor to the output rotor. The operating belt is configured to be inserted in the device body, and to be engaged with either the first or the second input rotor. The output rotor is configured to rotate the top, impart the rotational force to the top, and release the top. The operating belt is configured to be selectively engaged with one of the first and second input rotors.
    Type: Application
    Filed: January 31, 2023
    Publication date: February 29, 2024
    Applicant: TOMY COMPANY, LTD.
    Inventors: Makoto MURAKI, Kei NISHIZAWA, Takeaki MAEDA
  • Patent number: 11302880
    Abstract: An organic thin-film transistor includes an insulating substrate, a capacitor electrode formed on the insulating substrate, a first insulating layer covering the capacitor electrode, a gate electrode formed on the first insulating layer, a second insulating layer covering the gate electrode and the capacitor electrode, a source electrode formed on the second insulating layer, a drain electrode formed on the second insulating layer, and a semiconductor layer formed on the second insulating layer in a portion between the source electrode and the drain electrode and including an organic semiconductor material.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: April 12, 2022
    Assignee: TOPPAN PRINTING CO., LTD.
    Inventors: Noriaki Ikeda, Makoto Nishizawa
  • Patent number: 10847549
    Abstract: A thin film transistor array including thin film transistor elements including an insulating substrate, a gate electrode, a gate insulating film, a source electrode, a drain electrode, and a channel region formed between the source electrode and the drain electrode, the thin film transistor elements being arrayed in a matrix, a disconnection pattern including an insulating material and formed in stripes extending over the thin film transistor elements, the disconnection pattern having a maximum film thickness of 200 nm-3000 nm, and a semiconductor pattern formed in stripes perpendicular to the disconnection pattern and extending over the channel region of the thin film transistor elements, the semiconductor pattern being disconnected at an intersection with the disconnection pattern.
    Type: Grant
    Filed: August 1, 2019
    Date of Patent: November 24, 2020
    Assignee: TOPPAN PRINTING CO., LTD.
    Inventor: Makoto Nishizawa
  • Publication number: 20190360112
    Abstract: An electrode for electrolysis including a conductive substrate formed of a porous metal plate, and at least one catalyst layer formed on a surface of the conductive substrate, wherein the electrode for electrolysis has a thickness of more than 0.5 mm and 1.2 mm or less; and value C, which is obtained by dividing sum B of perimeters of openings of the electrode for electrolysis by opening ratio A of the electrode for electrolysis, is more than 2 and 5 or less.
    Type: Application
    Filed: December 28, 2017
    Publication date: November 28, 2019
    Applicant: ASAHI KASEI KABUSHIKI KAISHA
    Inventors: Makoto NISHIZAWA, Yoshifumi KADO, Toshinori HACHIYA
  • Publication number: 20190363105
    Abstract: A thin film transistor array including thin film transistor elements including an insulating substrate, a gate electrode, a gate insulating film, a source electrode, a drain electrode, and a channel region formed between the source electrode and the drain electrode, the thin film transistor elements being arrayed in a matrix, a disconnection pattern including an insulating material and formed in stripes extending over the thin film transistor elements, the disconnection pattern having a maximum film thickness of 200 nm-3000 nm, and a semiconductor pattern formed in stripes perpendicular to the disconnection pattern and extending over the channel region of the thin film transistor elements, the semiconductor pattern being disconnected at an intersection with the disconnection pattern.
    Type: Application
    Filed: August 1, 2019
    Publication date: November 28, 2019
    Applicant: TOPPAN PRINTING CO., LTD.
    Inventor: Makoto NISHIZAWA
  • Publication number: 20190338429
    Abstract: An electrode for electrolysis according to the present invention is an electrode for electrolysis including a conductive substrate; and a catalyst layer formed on a surface of the conductive substrate, wherein the catalyst layer comprises ruthenium element, iridium element, titanium element, and at least one first transition metal element selected from the group consisting of Sc, V, Cr, Fe, Co, Ni, Cu, and Zn, a content ratio of the first transition metal element contained in the catalyst layer based on 1 mol of the titanium element is 0.25 mol % or more and less than 3.4 mol %, and a D value being an indicator of an electric double layer capacitance of the electrode for electrolysis is 120 C/m2 or more and 420 C/m2 or less.
    Type: Application
    Filed: November 17, 2017
    Publication date: November 7, 2019
    Applicant: ASAHI KASEI KABUSHIKI KAISHA
    Inventors: Toyomitsu MIYASAKA, Makoto NISHIZAWA, Yoshifumi KADO
  • Publication number: 20190189942
    Abstract: An organic thin-film transistor includes an insulating substrate, a capacitor electrode formed on the insulating substrate, a first insulating layer covering the capacitor electrode, a gate electrode formed on the first insulating layer, a second insulating layer covering the gate electrode and the capacitor electrode, a source electrode formed on the second insulating layer, a drain electrode formed on the second insulating layer, and a semiconductor layer formed on the second insulating layer in a portion between the source electrode and the drain electrode and including an organic semiconductor material.
    Type: Application
    Filed: February 22, 2019
    Publication date: June 20, 2019
    Applicant: TOPPAN PRINTING CO., LTD.
    Inventors: Noriaki IKEDA, Makoto NISHIZAWA
  • Patent number: 10312375
    Abstract: A thin-film transistor including an insulative substrate, a gate electrode formed on the insulative substrate, a gate insulating layer formed on the substrate and the gate electrode, a source electrode and a drain electrode forming on the gate insulating layer and spaced from each other, a semiconductor layer formed on the gate insulating layer and connected to the source electrode and the drain electrode, a semiconductor protective layer formed on the semiconductor layer, an interlayer insulating film formed on the source electrode, the drain electrode and the semiconductor protective layer, the interlayer insulating film including a fluorine compound, and an upper electrode formed on the interlayer insulating film.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: June 4, 2019
    Assignee: TOPPAN PRINTING CO., LTD.
    Inventors: Noriaki Ikeda, Makoto Nishizawa
  • Publication number: 20180026141
    Abstract: A thin-film transistor including an insulative substrate, a gate electrode formed on the insulative substrate, a gate insulating layer formed on the substrate and the gate electrode, a source electrode and a drain electrode forming on the gate insulating layer and spaced from each other, a semiconductor layer formed on the gate insulating layer and connected to the source electrode and the drain electrode, a semiconductor protective layer formed on the semiconductor layer, an interlayer insulating film formed on the source electrode, the drain electrode and the semiconductor protective layer, the interlayer insulating film including a fluorine compound, and an upper electrode formed on the interlayer insulating film.
    Type: Application
    Filed: September 25, 2017
    Publication date: January 25, 2018
    Applicant: TOPPAN PRINTING CO., LTD.
    Inventors: Noriaki IKEDA, Makoto NISHIZAWA
  • Publication number: 20170221968
    Abstract: A thin-film transistor array includes a substrate and thin-film transistors positioned in matrix on the substrate. The thin-film transistors each include source and drain electrodes formed on a gate insulation layer, and a semiconductor layer formed on the gate insulation layer and positioned between the source and drain electrodes. The semiconductor layer is formed in stripes over the plurality of thin-film transistors such that one of the stripes has a long axis direction coinciding with a channel width direction of one of the thin-film transistors. The semiconductor layer has a cross section in a short axis direction of the stripe such that a thickness of the semiconductor layer gradually decreases outwardly from a center portion of the stripe.
    Type: Application
    Filed: April 14, 2017
    Publication date: August 3, 2017
    Applicant: TOPPAN PRINTING CO., LTD.
    Inventors: Ryohei MATSUBARA, Mamoru ISHIZAKI, Makoto NISHIZAWA
  • Patent number: 8932098
    Abstract: A method is provided for forming a uniform light emitting medium layer by a relief printing method without occurrence of printing defects. The method includes producing an organic EL device containing a substrate having thereon a pixel electrode, pixel regions that are demarcated with a partition wall on the pixel electrode, a light emitting medium layer having a light emitting layer containing at least an organic light emitting material on the pixel regions, and a counter electrode facing the pixel electrode. The method can have a step of forming at least one layer constituting the light emitting medium layer by a relief printing method, and the ink used in the relief printing method being transferred from two or more adjacent relief patterns within one of the pixel regions and being integrated by flow thereof to form the light emitting medium layer.
    Type: Grant
    Filed: February 8, 2013
    Date of Patent: January 13, 2015
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Makoto Nishizawa, Hiroyuki Chinone
  • Patent number: 8866635
    Abstract: [Task] To provide a smart meter evaluation device and a smart meter evaluation method capable of evaluating the operating state of a smart meter. [Means for Resolution] A smart meter evaluation device includes a demodulating unit that converts a baseband signal into digital data and outputs demodulated data, a communication information acquiring unit that acquires communication information included in the demodulated data, a signal waveform acquiring unit that acquires the waveform of the baseband signal, a signal level measuring unit that measures the level of the baseband signal, a smart meter management unit that specifies a smart meter, which is a transmission source of the demodulated data, a signal type specifying unit that specifies the signal type of the demodulated data, and a display unit that displays data, such as the communication information, the signal waveform, the signal level, smart meter specification information, and the signal type.
    Type: Grant
    Filed: December 5, 2011
    Date of Patent: October 21, 2014
    Assignee: Anritsu Corporation
    Inventors: Makoto Nishizawa, Taku Hasegawa
  • Publication number: 20120200424
    Abstract: [Task] To provide a smart meter evaluation device and a smart meter evaluation method capable of evaluating the operating state of a smart meter. [Means for Resolution] A smart meter evaluation device includes a demodulating unit that converts a baseband signal into digital data and outputs demodulated data, a communication information acquiring unit that acquires communication information included in the demodulated data, a signal waveform acquiring unit that acquires the waveform of the baseband signal, a signal level measuring unit that measures the level of the baseband signal, a smart meter management unit that specifies a smart meter, which is a transmission source of the demodulated data, a signal type specifying unit that specifies the signal type of the demodulated data, and a display unit that displays data, such as the communication information, the signal waveform, the signal level, smart meter specification information, and the signal type.
    Type: Application
    Filed: December 5, 2011
    Publication date: August 9, 2012
    Applicant: ANRITSU CORPORATION
    Inventors: Makoto Nishizawa, Taku Hasegawa
  • Patent number: 7867415
    Abstract: Used in a method of this invention is a die clamping unit, which comprises a tie bar movably attached to a stationary platen, a halfnut positioning servomotor which advances and retreats to the tie bar, a halfnut which is provided on a movable platen and fixes the movable platen and the tie bar together by engaging the tie bar, an engaging mechanism which engages the halfnut with the tie bar, a hydraulic die clamping cylinder which presses the stationary platen and the movable platen, and a control device which controls the halfnut positioning servomotor and the hydraulic cylinder. The control device drives the halfnut positioning servomotor to remove a clearance between the halfnut and an engaging groove of the tie bar before a die clamping process carried out by the hydraulic cylinder.
    Type: Grant
    Filed: June 17, 2009
    Date of Patent: January 11, 2011
    Assignee: Toshiba Kikai Kabushiki Kaisha
    Inventors: Jun Koike, Takaki Miyauchi, Makoto Nishizawa, Nobuyuki Muroi, Haruyuki Matsubayashi
  • Publication number: 20090261496
    Abstract: Used in a method of this invention is a die clamping unit, which comprises a tie bar movably attached to a stationary platen, a halfnut positioning servomotor which advances and retreats to the tie bar, a halfnut which is provided on a movable platen and fixes the movable platen and the tie bar together by engaging the tie bar, an engaging mechanism which engages the halfnut with the tie bar, a hydraulic die clamping cylinder which presses the stationary platen and the movable platen, and a control device which controls the halfnut positioning servomotor and the hydraulic cylinder. The control device drives the halfnut positioning servomotor to remove a clearance between the halfnut and an engaging groove of the tie bar before a die clamping process carried out by the hydraulic cylinder.
    Type: Application
    Filed: June 17, 2009
    Publication date: October 22, 2009
    Applicant: TOSHIBA KIKAI KABUSHIKI KAISHA
    Inventors: Jun Koike, Takaki Miyauchi, Makoto Nishizawa, Nobuyuki Muroi, Haruyuki Matsubayashi
  • Patent number: 7566214
    Abstract: Used in a method of this invention is a die clamping unit, which comprises a tie bar movably attached to a stationary platen, a halfnut positioning servomotor which advances and retreats the tie bar, a halfnut which is provided on a movable platen and fixes the movable platen and the tie bar together by engaging the tie bar, an engaging mechanism which engages the halfnut with the tie bar, a hydraulic die clamping cylinder which presses the stationary platen and the movable platen, and a control device which controls the halfnut positioning servomotor and the hydraulic cylinder. The control device drives the halfnut positioning servomotor to remove a clearance between the halfnut and an engaging groove of the tie bar before a die clamping process carried out by the hydraulic cylinder.
    Type: Grant
    Filed: January 28, 2005
    Date of Patent: July 28, 2009
    Assignee: Toshiba Kikai Kabushiki Kaisha
    Inventors: Jun Koike, Takaki Miyauchi, Makoto Nishizawa, Nobuyuki Muroi, Haruyuki Matsubayashi
  • Patent number: 7517206
    Abstract: There is disclosed a control system of an injection molding machine in which a controller mounted on a main body side of an injection molding machine comprises a data memory having a memory area to always reflect information regarding a plurality of operation conditions and operation situations corresponding to peripheral devices, and a program to give a desired command to the peripheral devices, and a control section of the peripheral devices and the controller on the injection molding machine main body side comprise a data transmission line to always reflect information regarding the operation conditions and the operation situations, and a transmission control section equipped with a protocol regarding a signal transmitted through the transmission line.
    Type: Grant
    Filed: September 21, 2005
    Date of Patent: April 14, 2009
    Assignee: Toshiba Kikai Kabushiki Kaisha
    Inventor: Makoto Nishizawa
  • Patent number: 7421309
    Abstract: A plurality of condition setting screens necessary to set various operation conditions of an injection molding machine is switched and displayed on a touch-panel-equipped display unit of a human-machine interface.
    Type: Grant
    Filed: April 26, 2006
    Date of Patent: September 2, 2008
    Assignee: Toshiba Kikai Kabushiki Kaisha
    Inventors: Makoto Nishizawa, Yutaka Yamaguchi
  • Patent number: 7416403
    Abstract: A die clamping unit includes a stationary platen, a tie bar which is attached to the stationary platen, a movable platen which is movable forwards and backwards along the tie bar with respect to the stationary platen, a first servomotor which moves the movable platen away from the stationary platen in a core-back operation, a second servomotor which moves the movable platen forwards and backwards to perform die-opening and -closing, and a control device which drives the first servomotor to move the movable platen away from the stationary platen and which drives the second servomotor to apply a force to the movable platen in the direction toward the stationary platen in the core-back operation.
    Type: Grant
    Filed: April 11, 2006
    Date of Patent: August 26, 2008
    Assignee: Toshiba Kikai Kabushiki Kaisha
    Inventors: Jun Koike, Takaki Miyauchi, Makoto Nishizawa, Nobuyuki Muroi
  • Patent number: 7369964
    Abstract: White noise is applied to a servocontrol system of a servomotor in order to measure a frequency characteristic of a mechanical component in an electric injection molding machine, and a signal from an encoder is applied to a fast Fourier converter. Data from the fast Fourier converter is applied to a memory unit, and the content of the memory unit is displayed on a display unit in the form of a board diagram. Repair announcement is issued when a deviation of the resonant frequency of each mechanical component with respect to data at an initial setting time exceeds a predetermined value.
    Type: Grant
    Filed: September 26, 2006
    Date of Patent: May 6, 2008
    Assignee: Toshiba Kikai Kabushiki Kaisha
    Inventors: Makoto Nishizawa, Harumichi Tokuyama, Tomonori Morita