Patents by Inventor Makoto Shibusawa

Makoto Shibusawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060082284
    Abstract: A display includes an insulating substrate, an auxiliary line placed on a main surface of the insulating substrate, an insulating underlayer covering the auxiliary line and the main surface of the insulating substrate and provided with a through-hole which communicates with the auxiliary line, pixel electrodes arranged on the insulating underlayer and surrounding an opening of the through-hole, photo-active layers each covering the pixel electrode and each including a light-emission layer, and a light-transmissive common electrode covering the photo-active layers and electrically connected to the auxiliary line via the through-hole.
    Type: Application
    Filed: September 1, 2005
    Publication date: April 20, 2006
    Inventor: Makoto Shibusawa
  • Publication number: 20060060853
    Abstract: Each pixel of a display includes first and second thin film transistors different in conduction type from each other and connected in series between a first power supply terminal and an input/output terminal in this order, a first capacitor connected between a gate of the first thin film transistor and a constant potential terminal, a first diode-connecting switch connected between the gate and drain of the first thin film transistor, a second capacitor connected between gate and source of the second thin film transistor, a second diode-connecting switch connected between the gate and drain of the second thin film transistor, a display element, an output control switch, the output control switch and the display element being connected in series between the input/output terminal and a second power supply terminal in this order, and a video signal supply control switch connected between the input/output terminal and a video signal line.
    Type: Application
    Filed: August 23, 2005
    Publication date: March 23, 2006
    Inventor: Makoto Shibusawa
  • Patent number: 7009591
    Abstract: A plurality of display pixels PX arranged in a matrix form respectively have a driving transistor which controls an electric current amount made to flow in a self-luminescent element, in accordance with an image signal, a first switch formed of a transistor and connected between a gate and a drain of the driving transistor, and a second switch formed of a transistor and connected between the driving transistor and the self-luminescent element. A first capacitance Cs is provided between the gate and a source of the driving transistor, and a second capacitance Cx is provided between the second switch and the gate of the driving transistor.
    Type: Grant
    Filed: September 16, 2004
    Date of Patent: March 7, 2006
    Assignee: Toshiba Matsushita Display Technology Co., Ltd.
    Inventor: Makoto Shibusawa
  • Publication number: 20050269961
    Abstract: In an active matrix organic EL display including a drive control element which has a first terminal connected to a first power supply terminal, a control terminal, and a second terminal which outputs a driving current having a magnitude corresponding to the voltage between the first terminal and the control terminal, a capacitor which has one electrode connected to the control terminal and can maintain the voltage between the first terminal and the control terminal constant, and an organic EL element connected between the second terminal and a second power supply terminal, a plurality of switches connected in series are used as switches between the second terminal and the control terminal to obtain a perfect nonconductive state, and the switch on the control terminal side is set in the nonconductive state earlier than the remaining switch, thereby decreasing the potential shift amount generated by the capacitance of the switches themselves.
    Type: Application
    Filed: July 22, 2005
    Publication date: December 8, 2005
    Inventors: Makoto Shibusawa, Yoshiro Aoki, Hirondo Nakatogawa
  • Publication number: 20050212448
    Abstract: There is provided an active matrix organic EL display including a drive control element which includes a first terminal connected to a power supply terminal, a control terminal, and a second terminal, an organic EL element connected between the second terminal and a power supply terminal, a capacitor connected to the control terminal, a first switch which executes switching in accordance with a scan signal to set the video signal input terminal and the second terminal in a connected state during a signal write period and set them in a disconnected state during a light emission period, and a second switch which executes switching to set the control terminal and the second terminal in the connected state during the signal write period and set them in the disconnected state before the first switch changes to the disconnected state.
    Type: Application
    Filed: May 20, 2005
    Publication date: September 29, 2005
    Inventor: Makoto Shibusawa
  • Publication number: 20050057182
    Abstract: A plurality of display pixels PX arranged in a matrix form respectively have a driving transistor which controls an electric current amount made to flow in a self-luminescent element, in accordance with an image signal, a first switch formed of a transistor and connected between a gate and a drain of the driving transistor, and a second switch formed of a transistor and connected between the driving transistor and the self-luminescent element. A first capacitance Cs is provided between the gate and a source of the driving transistor, and a second capacitance Cx is provided between the second switch and the gate of the driving transistor.
    Type: Application
    Filed: September 16, 2004
    Publication date: March 17, 2005
    Inventor: Makoto Shibusawa
  • Patent number: 6130654
    Abstract: In an active-matrix type liquid crystal display device, a dummy scanning line is provided at a higher position than the top of ordinary scanning liens in the case that a scanning operation is performed from the top of a display region to the bottom thereof. Alternatively, such a dummy scanning line is disposed at a lower position than the bottom of ordinary scanning lines where the scanning operation is performed from the bottom of the display region to the top thereof. Scanning pulses to turn on switching elements as well as compensation pulses are applied to the dummy scanning line as to the ordinary scanning lines to obtain a uniform brightness display on a screen of the active-matrix type liquid crystal display device.
    Type: Grant
    Filed: February 24, 1998
    Date of Patent: October 10, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hisaaki Hayashi, Makoto Shibusawa
  • Patent number: 6078366
    Abstract: An array substrate includes plural scanning lines (111); a thin film transistor (112) having a first dielectric film (115), (117), a semiconductor film (120) thereon, and a source electrode (126b) electrically coupled to the semiconductor film (120) and a drain electrode (126a); a signal line (110) as taken out of the drain electrode (126a) to extend at substantially right angles to the scanning lines (111); and a pixel electrode (131) electrically connected to the source electrode (126b), wherein the pixel electrode (131) is electrically connected to the source electrode (126b) through a second dielectric film (127) as disposed on at least the signal line (110) while the pixel electrode (131) overlaps an elongate region (113) from its neighboring scanning line (111) through the first and second dielectric films (115), (117), (127).
    Type: Grant
    Filed: November 6, 1998
    Date of Patent: June 20, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masayuki Dohjo, Hideo Kawano, Akira Kubo, Makoto Shibusawa, Tetsuya Iizuka, Tamio Nakai, Kazushige Mori
  • Patent number: 6028652
    Abstract: An array substrate includes plural scanning lines (111); a thin film transistor (112) having a first dielectric film (115), (117), a semiconductor film (120) thereon, and a source electrode (126b) electrically coupled to the semiconductor film (120) and a drain electrode (126a); a signal line (110) as taken out of the drain electrode (126a) to extend at substantially right angles to the scanning lines (111); and a pixel electrode (131) electrically connected to the source electrode (126b), wherein the pixel electrode (131) is electrically connected to the source electrode (126b) through a second dielectric film (127) as disposed on at least the signal line (110) while the pixel electrode (131) overlaps an elongate region (113) from its neighboring scanning line (111) through the first and second dielectric films (115), (117), (127).
    Type: Grant
    Filed: November 6, 1998
    Date of Patent: February 22, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masayuki Dohjo, Hideo Kawano, Akira Kubo, Makoto Shibusawa, Tetsuya Iizuka, Tamio Nakai, Kazushige Mori
  • Patent number: 5966190
    Abstract: An array substrate includes plural scanning lines (111); a thin film transistor (112) having a first dielectric film (115), (117), a semiconductor film (120) thereon, and a source electrode (126b) electrically coupled to the semiconductor film (120) and a drain electrode (126a); a signal line (110) as taken out of the drain electrode (126a) to extend at substantially right angles to the scanning lines (111); and a pixel electrode (131) electrically connected to the source electrode (126b), wherein the pixel electrode (131) is electrically connected to the source electrode (126b) through a second dielectric film (127) as disposed on at least the signal line (110) while the pixel electrode (131) overlaps an elongate region (113) from its neighboring scanning line (111) through the first and second dielectric films (115), (117), (127).
    Type: Grant
    Filed: November 6, 1998
    Date of Patent: October 12, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masayuki Dohjo, Hideo Kawano, Akira Kubo, Makoto Shibusawa, Tetsuya Iizuka, Tamio Nakai, Kazushige Mori
  • Patent number: 5835177
    Abstract: An array substrate includes plural scanning lines (111); a thin film transistor (112) having a first dielectric film (115), (117), a semiconductor film (120) thereon, and a source electrode (126b) electrically coupled to the semiconductor film (120) and a drain electrode (126a); a signal line (110) as taken out of the drain electrode (126a) to extend at substantially right angles to the scanning lines (111); and a pixel electrode (131) electrically connected to the source electrode (126b), wherein the pixel electrode (131) is electrically connected to the source electrode (126b) through a second dielectric film (127) as disposed on at least the signal line (110) while the pixel electrode (131) overlaps an elongate region (113) from its neighboring scanning line (111) through the first and second dielectric films (115), (117), (127).
    Type: Grant
    Filed: October 4, 1996
    Date of Patent: November 10, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masayuki Dohjo, Hideo Kawano, Akira Kubo, Makoto Shibusawa, Tetsuya Iizuka, Tamio Nakai, Kazushige Mori
  • Patent number: 5811846
    Abstract: In a thin-film transistor 171, in order to sufficiently suppress an optical leakage current Ioff, thereby achieving a high ON/OFF current ratio, at least one of shortest distances between an arbitrary intersection of an outline of a gate electrode 131 and an outline of a drain electrode 141 and an intersection of the outline of the gate electrode 131 and an outline of a source electrode 151 is formed to be larger than the shortest distance between a portion of the outline of the gate electrode 131 overlapping the drain electrode 141 and another portion thereof overlapping the source electrode 151.
    Type: Grant
    Filed: July 3, 1996
    Date of Patent: September 22, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasunori Miura, Makoto Shibusawa, Atsushi Sugahara, Masahiro Seiki
  • Patent number: 5646705
    Abstract: In a liquid crystal display device according to the invention, one of electrodes holding a liquid crystal composition therebetween is formed by a shading conductor having light-transmitting holes or slits. The display device of the invention can reduce a required amount of indium (In), a rare metal, and can have a high light transmittance.
    Type: Grant
    Filed: October 31, 1995
    Date of Patent: July 8, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toyoki Higuchi, Hideo Kawano, Makoto Shibusawa
  • Patent number: 5600461
    Abstract: An active matrix type liquid crystal display device having an array substrate for allowing parasitic capacitances formed between a pixel electrode and scan and signal lines disposed in the vicinity thereof to be remarkably decreased.
    Type: Grant
    Filed: June 14, 1995
    Date of Patent: February 4, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomomasa Ueda, Masahiko Akiyama, Atsushi Sugahara, Makoto Shibusawa, Mitsushi Ikeda, Yoshiko Tsuji, Hisao Toeda
  • Patent number: 5563432
    Abstract: In a thin-film transistor 171, in order to sufficiently suppress an optical leakage current Ioff, thereby achieving a high ON/OFF current ratio, at least one of shortest distances between an arbitrary intersection of an outline of a gate electrode 131 and an outline of a drain electrode 141 and an intersection of the outline of the gate electrode 131 and an outline of a source electrode 151 is formed to be larger than the shortest distance between a portion of the outline of the gate electrode 131 overlapping the drain electrode 141 and another portion thereof overlapping the source electrode 151.
    Type: Grant
    Filed: December 23, 1994
    Date of Patent: October 8, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasunori Miura, Makoto Shibusawa, Atsushi Sugahara, Masahiro Seiki
  • Patent number: 5459596
    Abstract: An active matrix type liquid crystal display device having a plurality of scan lines, a plurality of signal lines intersected with the plurality of scan lines, the plurality of scan lines being insulated from the plurality of signal lines, a thin film transistor element having a gate portion and a drain portion and disposed at each intersection of the plurality of scan lines and the plurality of signal lines, the gate portion being connected to a scan line at the intersection, the drain portion being connected to a signal line at the intersection, an array substrate formed in the intersection and having a pixel electrode, the pixel electrode being electrically connected to the source portion of the thin film transistor element, an opposite substrate having an opposite electrode opposed to the array substrate, a liquid crystal layer disposed between the array substrate and the opposite substrate, and a shield electrode disposed on the array substrate, the shield electrode being overlaid through an insulation l
    Type: Grant
    Filed: March 29, 1993
    Date of Patent: October 17, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomomasa Ueda, Masahiko Akiyama, Atsushi Sugahara, Makoto Shibusawa, Mitsushi Ikeda, Yoshiko Tsuji, Hisao Toeda