Abstract: Mitigating effects of delamination of components in the data processing system is provided. A signal is received from one or more sensors in the data processing system. A determination is made as to whether the signal indicates that one threshold in a plurality of thresholds has been reached or exceeded. Responsive to the signal indicating that one threshold in the plurality of thresholds has been reached or exceeded, a determination is made as to whether the one threshold is a low temperature threshold or a high temperature threshold. Responsive to the one threshold being a low temperature threshold, one of a plurality of actions is initiated to increase a temperature of the data processing system thereby mitigating effects of delamination of the components in the data processing system.

Abstract: A method, computer program product, and apparatus for managing power in a data processing system are presented. A core is activated in the data processing system and configured to operate at a frequency in response to receiving a request to increase a processing capacity of a set of resources in the data processing system. A determination whether a use of power resulting from activating the core configured to operate at the frequency meets a policy for the use of the power in the data processing system is made. A set of parameters associated with devices in the set of resources are adjusted to meet the policy for the use of power in the data processing system in response to a determination that the use of power does not meet the policy. A determination whether a number of operations performed per unit of time by a set of cores associated with the set of resources increased after activating the core is made.

Abstract: A mechanism is provided for allocating energy budgets to a plurality of logical partitions. An overall energy budget for the data processing system and a total of a set of requested initial energy budgets for the plurality of partitions are determined. A determination is made as to whether the total of the set of requested initial energy budgets for the plurality of partitions is greater than the overall energy budget for the data processing system. Responsive to the total of the set of requested initial energy budgets exceeding the overall energy budget, an initial energy budget is allocated to each partition in the plurality of partitions based on at least one of priority or proportionality of each partition in the plurality of partitions such that a total of the initial energy budgets for the plurality of partitions does not exceed the overall energy budget of the data processing system.

Abstract: Disclosed are systems, methods, and computer program products for managing power states in processors of a data processing system. In one embodiment, the invention is directed to a data processing system having dynamically configurable power-performance states (“pstates”). The data processing system includes a processor configured to operate at multiple states of frequency and voltage. The data processing system also has a power manager module configured to monitor operation of the data processing system. The data processing system further includes a pstates table having a plurality of pstate definitions, wherein each pstate definition includes a voltage value, a frequency value, and at least one unique pointer that indicates a transition from a given pstate to a different pstate.

Abstract: A mechanism is provided for directed resource folding for power management. The mechanism receives a set of static platform characteristics and a set of dynamic platform characteristics for a set of resources associated with the data processing system thereby forming characteristic information. The mechanism determines whether one or more conditions have been met for each resource in the set of resources using the characteristic information. Responsive to the one or more conditions being met, the mechanism performs a resource optimization to determine at least one of a first subset of resources in the set of resources to keep active and a second subset of resources in the set of resources to dynamically fold. Based on the resource optimization, the mechanism performs either a virtual resource optimization to optimally schedule the first subset of resources or a physical resource optimization to dynamically fold the second subset of resources.

Abstract: Dynamic frequency and voltage scaling for a computer processor, including retrieving information specifying a nominal operating point of frequency and voltage and an operating range of frequency and voltage for the processor; creating, by the power management module dynamically at run time in dependence upon the retrieved information, a table of frequency, voltage pairs, each pair specifying an operating point of frequency and voltage for the processor, each pair disposed upon a line drawn in frequency-voltage space through the nominal operating point between the minimum operating point and the maximum operating point, the distance between each pair defined in dependence upon a minimum change in power supply voltage supported by the power supply; and selecting and applying, by the power management module from the table, an operating voltage and frequency for the processor in dependence upon current operating conditions of the processor.

Abstract: Semiconductor device circuits and methods are provided for adjusting core processor performance and energy-efficiency based on usage metrics. Metric detection, performance state selection, and adjustment are done in digital logic hardware without intervening input from system software or firmware, thus greatly speeding the processor performance adjustment. Mapping usage and state information to desired processor power-performance states is also provided in circuitry rather than firmware or power control software. The mapping values may be programmable software or firmware, but detection, selection, and adjustment occur automatically in hardware without intervening input from firmware or software.

Abstract: Methods and products for managing power consumption of a computer and computers for which power consumption is managed. The computer includes the computer including a computer processor and embodiments of the present invention include providing, by an in-band power manger to an out-of-band power manager, a proposed performance state (‘p-state’) for the computer processor; determining, by the out-of-band power manager, in dependence upon a power setpoint and currently-measured operating metrics of the computer processor, whether to approve the proposed p-state; and if the out-of-band power manager approves the proposed p-state, setting operating parameters of the computer processor according to the approved p-state.

Abstract: A performance control technique for a processing system that includes one or more adaptively-clocked processor cores provides improved performance/power characteristics. An outer feedback loop adjusts the power supply voltage(s) provided to the power supply voltage domain(s) powering the core(s), which may be on a per-core basis or include multiple cores per voltage domain. The outer feedback loop operates to ensure that each core is meeting specified performance, while the cores also include an inner feedback loop that adjusts their processor clock or other performance control mechanism to maximize performance under present operating conditions and within a margin of safety. The performance of each core is measured and compared to a target performance. If the target performance is not met for each core in a voltage domain, the voltage is raised for the voltage domain until all cores meet the target performance.

Abstract: A mechanism is provided for scheduling application tasks. A scheduler receives a task that identifies a desired frequency and a desired maximum number of competing hardware threads. The scheduler determines whether a user preference designates either maximization of performance or minimization of energy consumption. Responsive to the user preference designating the performance, the scheduler determines whether there is an idle processor core in a plurality of processor cores available. Responsive to no idle processor being available, the scheduler identifies a subset of processor cores having a smallest load coefficient. From the subset of processor cores, the scheduler determines whether there is at least one processor core that matches desired parameters of the task. Responsive to at least one processor core matching the desired parameters of the task, the scheduler assigns the task to one of the at least one processor core that matches the desired parameters.

Abstract: A system for identifying a subset of sensors to sample to reduce the frequency of sensor access. The system determines rise times and records values for the sensors in the system. A time criticality of the sensors is determined based on the rise times. The system processes the sensors by first creating sensor subsets based on one or more constraints on the sensors. The system monitors the values of the sensors in a sensor subset and flags a sensor when it makes a determination that, prior to a next scheduled sampling of the sensor subset, the value of a sensor in the monitored sensor subset will exceed a threshold constraint. The system moves those flagged sensors to a second sensor subset which complies with the sensor's constraints.

Abstract: Disclosed is a computer implemented method, computer program product, and apparatus for determining a safe lower bound for a commonly powered data processing system. A power management module operates the data processing system using at least one nominal operating parameter during an exploration periodicity, with the at least one nominal operating parameter being clock speed. The power management module determines whether a calibration period is occurring. The power management module calibrates the data processing system up to a measurement interval duration expiration. The power management module may repeat operating the data processing system using the at least one nominal operating parameter.

Abstract: A mechanism is provided for minimizing system power in a data processing system. A management control unit determines whether a convergence has been reached in the data processing system. If convergence fails to be reached, the management control unit determines whether a maximum fan flag is set to indicate that a fan is operating at a maximum speed. Responsive to the maximum fan flag failing to be set, a thermal threshold of the data processing system is either increased or decreased and thereby a fan speed of the data processing system is either increased or decreased based on whether the system power of the data processing system has either increased or decreased and based on whether a temperature of the data processing system has either increased or decreased. Thus, a new thermal threshold and a new fan speed are formed. The process is then repeated until convergence has been met.

Abstract: A mechanism is provided for dynamically power capping one or more units. A power capping mechanism sets a counter value corresponding to an initial energy budget assigned to a unit for a given interval. Responsive to the unit receiving an operation to perform during the given interval, the power capping mechanism decrements the counter value by a decrement value. Responsive to the given interval expiring, the power capping mechanism sends the counter value to a power control loop in the data processing system, receives a new energy budget from the power control loop, and resets the counter value to a value corresponding to the new energy budget assigned to the unit for a next interval.

Abstract: A mechanism is provided for oversubscribing branch circuits. An active energy management mechanism determines a cumulative wattage rating using power consumption information for a powered element, the power consumption information is for a primary and a redundant portion of the powered element. The active energy management mechanism determines a power reduction power cap to be used by the powered element in the event of a loss of either a primary or a redundant power source supplied to the powered element using the cumulative wattage rating, a branch circuit rating, and a circuit breaker rating for the powered element. The active energy management mechanism sends the power reduction power cap to the powered element in order that the powered element reduces power to the power reduction power cap in the event of the loss of either the primary power source or the redundant power source supplied to the powered element.

Abstract: A mechanism is provided for temporarily allocating dedicated processors to a shared processor pool. A virtual machine monitor determines whether a temporary allocation associated with an identified dedicated processor is long-term or short-term. Responsive to the temporary allocation being long-term, the virtual machine monitor determines whether an operating frequency of the identified dedicated processor is within a predetermined threshold of an operating frequency of one or more operating systems utilizing the shared processor pool. Responsive to the operating frequency of the identified dedicated processor failing to be within the predetermined threshold, the virtual machine monitor either increases or decreases the frequency of the identified dedicated processor to be within the predetermined threshold of the operating frequency of the one or more operating systems utilizing the shared processor pool and temporarily allocates the identified dedicated processor to the shared processor pool.

Abstract: A method, system, and computer program product for reducing power and energy consumption in a server system with multiple processor cores is disclosed. The system may include an operating system for scheduling user workloads among a processor pool. The processor pool may include active licensed processor cores and inactive unlicensed processor cores. The method and computer program product may reduce power and energy consumption by including steps and sets of instructions activating spare cores and adjusting the operating frequency of processor cores, including the newly activated spare cores to provide equivalent computing resources as the original licensed cores operating at a specified clock frequency.

Abstract: A mechanism is provided for controlling operational parameters associated with a plurality of processors. A control system in the data processing system determines a utilization slack value of the data processing system. The utilization slack value is determined using one or more active core count values and one or more slack core count values. The control system computes a new utilization metric to be a difference between a full utilization value and the utilization slack value. The control system determines whether the new utilization metric is below a predetermined utilization threshold. Responsive to the new utilization metric being below the predetermined utilization threshold, the control system decreases a frequency of the plurality of processors.

Abstract: Managing operations associated with one or more voltage changes and one or more frequency changes. A voltage change request and a frequency change request are associated with dynamic voltage and frequency scaling (DVFS) operations. The DVFS operations are transmitted by the processors to be executed by one or more direct current assemblies. A sequence associated with the one or more voltage changes and a sequence associated with the one or more frequency changes are detected by the system. The sequences are dynamically modified to enable insertion of an additional voltage change, whereby the additional voltage change indicates completion of one or more previous voltage change requests. Completion of the voltage change request enables one or more subsequent voltage change requests to be processed. When a voltage change request is not successfully completed one or more future voltage changes are suspended.

Abstract: A mechanism is provided for unified management of power, performance, and thermals in computer systems. This mechanism incorporates elements to effectively address all aspects of managing computing systems in an integrated manner, instead of independently. The mechanism employs an infrastructure for real-time measurements feedback, an infrastructure for regulating system activity, component operating levels, and environmental control, a dedicated control structure for guaranteed response/preemptive action, and interaction and integration components. The mechanism provides interfaces for user-level interaction. The mechanism also employs methods to address power/thermal concerns at multiple timescales. In addition, the mechanism improves efficiency by adopting an integrated approach, rather than treating different aspects of the power/thermal problem as individual issues to be addressed in a piecemeal fashion.