Abstract: It is an object to provide a technique capable of suppressing a reduction in a visual quality. A display device includes a display panel and a parallax harrier panel in which a plurality of openings capable of being switched into a light transmitting state and a light shielding state with respect to light of the display panel are arrayed. A display control method performs a control of bringing a predetermined number of openings adjacent to each other into a first state which is one state of the light transmitting state and the light shielding state to form a plurality of first state parts and bringing remaining openings out of the plurality of openings into a second state which is another state of the light transmitting state and the light shielding state, and a control of moving the first state parts at a pitch corresponding to two or more openings.

Abstract: First and second gate lines respectively extend in first and second directions in a display area. The second gate line is electrically connected to the first gate line and extends in the second direction in the display area. The second gate line is electrically connected to the first gate line outside the display area. A conductive layer may be disposed between the second gate line and a source line, and the second gate line may be electrically connected to the first gate line in the display area. To the conductive layer, a potential identical to a common potential or a ground potential is applied. An arrangement where two or more second gate lines overlap the source line may be employed. Transition of a potential of a gate signal from an on potential to an off potential may be made in two or more stages.

Abstract: A liquid crystal display includes scanning lines and signal lines arranged in a matrix pattern on a TFT substrate, a pixel being formed at a crossing portion of each scanning line and each signal line, and including a TFT that is connected to each scanning line and each signal line, first nonlinear resistance elements formed respectively in the scanning lines, each of which being connected to one scanning line at one end thereof and to a short ring power-supply line for a scanning line at another end thereof, and second nonlinear resistance elements formed respectively in the signal lines, each of which being connected to one signal line at one end thereof and to a short ring power-supply line for a signal line at another end thereof. A voltage is applied to the first and second nonlinear resistance elements independently of each scanning line and each signal line.

Abstract: Provided is a liquid crystal display panel including a first pixel that is brought into abutment against a photospacer, second pixels having opening regions of the same color as a color of an opening region of the first pixel, and third pixels being other pixels and having the largest area of opening regions. A distance between a photospacer set position and a through-hole in each pixel is larger in the first pixel and in the second pixels than in the third pixels.

Abstract: In a display period, a display device applies a voltage of a level for turning a state of an inspection switching element to an OFF state to a gate electrode of the inspection switching element. Moreover, in a vertical blanking period while a state of a switching element is the OFF state, the display device performs voltage application processing for applying a voltage, which indicates an ON level, or a voltage, which indicates a level between the ON level and an OFF level, to the gate electrode of the switching element.

Abstract: A liquid crystal display includes scanning lines and signal lines arranged in a matrix pattern on a TFT substrate, a pixel being formed at a crossing portion of each scanning line and each signal line, and including a TFT that is connected to each scanning line and each signal line, first nonlinear resistance elements formed respectively in the scanning lines, each of which being connected to one scanning line at one end thereof and to a short ring power-supply line for a scanning line at another end thereof, and second nonlinear resistance elements formed respectively in the signal lines, each of which being connected to one signal line at one end thereof and to a short ring power-supply line for a signal line at another end thereof. A voltage is applied to the first and second nonlinear resistance elements independently of each scanning line and each signal line.

Abstract: First and second gate lines respectively extend in first and second directions in a display area. The second gate line is electrically connected to the first gate line and extends in the second direction in the display area. The second gate line is electrically connected to the first gate line outside the display area. A conductive layer may be disposed between the second gate line and a source line, and the second gate line may be electrically connected to the first gate line in the display area. To the conductive layer, a potential identical to a common potential or a ground potential is applied. An arrangement where two or more second gate lines overlap the source line may be employed. Transition of a potential of a gate signal from an on potential to an off potential may be made in two or more stages.

Abstract: A liquid crystal display includes scanning lines and signal lines arranged in a matrix pattern on a TFT substrate, a pixel being formed at a crossing portion of each scanning line and each signal line, and including a TFT that is connected to each scanning line and each signal line, first nonlinear resistance elements formed respectively in the scanning lines, each of which being connected to one scanning line at one end thereof and to a short ring power-supply line for a scanning line at another end thereof, and second nonlinear resistance elements formed respectively in the signal lines, each of which being connected to one signal line at one end thereof and to a short ring power-supply line for a signal line at another end thereof. A voltage is applied to the first and second nonlinear resistance elements independently of each scanning line and each signal line.

Abstract: A liquid crystal display device is equipped with: a TFT array substrate having a thin film transistor in each of pixel areas; and a counter substrate having a black matrix in which an opening part is formed in each of areas corresponding to the pixel areas. The TFT array substrate includes: a protective film formed on a drain electrode of the thin film transistor; a contact hole formed in the protective film so as to reach the drain electrode; and a pixel electrode formed on the protective film and connected to the drain electrode through the contact hole. An inner wall of the contact hole includes a first sloped part and a second sloped part which are arranged in line in a circumferential direction of the contact hole and have slope angles different from each other.

Abstract: According to the present invention, a display device includes a display panel, and a parallax barrier shutter panel. The parallax barrier shutter panel is provided to be opposed to the display panel. The parallax barrier shutter panel includes a plurality of first transparent electrodes, a drive IC, and an FPC. The plurality of first transparent electrodes are provided at regular intervals. The drive IC is configured to control a voltage to be applied to each of the plurality of first transparent electrodes. The FPC includes an FPC terminal electrically connected to an input terminal of the drive IC. At least one of each of the plurality of first transparent electrodes, an output terminal of the drive IC, and the FPC terminal is electrically connected to a short ring.

Abstract: Although each drain electrode extension portion which is a connection region between a drain electrode and a pixel electrode does not transmit visible light, making an end side of the drain electrode extension portion coincide with an end side of the pixel electrode can improve an aperture ratio. In addition, making each semiconductor layer with high resistance protrude from the end side of the drain electrode extension portion can restrict an increase in parasitic capacitance and bring the drain electrode extension portion closer to the gate wiring.

Abstract: Although each drain electrode extension portion which is a connection region between a drain electrode and a pixel electrode does not transmit visible light, making an end side of the drain electrode extension portion coincide with an end side of the pixel electrode can improve an aperture ratio. In addition, making each semiconductor layer with high resistance protrude from the end side of the drain electrode extension portion can restrict an increase in parasitic capacitance and bring the drain electrode extension portion closer to the gate wiring.

Abstract: Gate connection lines connected to gate wires in a display region are formed so as to have a region overlapped with source wires. According to such a structure, both of frame-width reduction and display performance of a liquid crystal display panel may be realized.

Abstract: Provided is a liquid crystal display panel including a first pixel that is brought into abutment against a photospacer, second pixels having opening regions of the same color as a color of an opening region of the first pixel, and third pixels being other pixels and having the largest area of opening regions. A distance between a photospacer set position and a through-hole in each pixel is larger in the first pixel and in the second pixels than in the third pixels.

Abstract: Gate connection lines connected to gate wires in a display region are formed so as to have a region overlapped with source wires. According to such a structure, both of frame-width reduction and display performance of a liquid crystal display panel may be realized.

Abstract: A liquid crystal display device is equipped with: a TFT array substrate having a thin film transistor in each of pixel areas; and a counter substrate having a black matrix in which an opening part is formed in each of areas corresponding to the pixel areas. The TFT array substrate includes: a protective film formed on a drain electrode of the thin film transistor; a contact hole formed in the protective film so as to reach the drain electrode; and a pixel electrode formed on the protective film and connected to the drain electrode through the contact hole. An inner wall of the contact hole includes a first sloped part and a second sloped part which are arranged in line in a circumferential direction of the contact hole and have slope angles different from each other.

Abstract: A liquid crystal display includes scanning lines and signal lines arranged in a matrix pattern on a TFT substrate, a pixel being formed at a crossing portion of each scanning line and each signal line, and including a TFT that is connected to each scanning line and each signal line, first nonlinear resistance elements formed respectively in the scanning lines, each of which being connected to one scanning line at one end thereof and to a short ring power-supply line for a scanning line at another end thereof, and second nonlinear resistance elements formed respectively in the signal lines, each of which being connected to one signal line at one end thereof and to a short ring power-supply line for a signal line at another end thereof. A voltage is applied to the first and second nonlinear resistance elements independently of each scanning line and each signal line.

Abstract: In a display period, a display device applies a voltage of a level for turning a state of an inspection switching element to an OFF state to a gate electrode of the inspection switching element. Moreover, in a vertical blanking period while a state of a switching element is the OFF state, the display device performs voltage application processing for applying a voltage, which indicates an ON level, or a voltage, which indicates a level between the ON level and an OFF level, to the gate electrode of the switching element.

Abstract: An array substrate includes a first electrode located above a switching element through a first insulating film, a second electrode located above the first electrode through a second insulating film, and a connection portion that is located to pass through the first insulating film, first electrode, and second insulating film and electrically connects a drain electrode of the switching element and the second electrode. The connection portion is disposed in an avoidance region provided by carving out a gate line connected to the switching element.

Abstract: An array substrate includes a first electrode located above a switching element through a first insulating film, a second electrode located above the first electrode through a second insulating film, and a connection portion that is located to pass through the first insulating film, first electrode, and second insulating film and electrically connects a drain electrode of the switching element and the second electrode. The connection portion is disposed in an avoidance region provided by carving out a gate line connected to the switching element.