Patents by Inventor Manfred Schneegans

Manfred Schneegans has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070114662
    Abstract: One aspect of the invention relates to an interconnecting element between a semiconductor chip of a semiconductor wafer and a circuit support and to a method for producing and using the interconnecting element. Such interconnecting elements are arranged between contact areas of a semiconductor chip of a semiconductor wafer and contact terminal areas of a circuit support. The contact areas on the semiconductor chip or the semiconductor wafer, respectively, are arranged in depressions of a top of an insulating cover layer and are freely accessible. The interconnecting elements have a mushroom shape with a mushroom cap in a first metal area. On the mushroom cap of the first metal area, a second metal area is arranged which has high-melting intermetallic phases of metals of a solder material and the metal of the contact terminal areas of the circuit support.
    Type: Application
    Filed: November 16, 2006
    Publication date: May 24, 2007
    Inventors: Johann Helneder, Manfred Schneegans, Holger Torwesten
  • Patent number: 7212019
    Abstract: A probe needle for testing semiconductor chips includes one end that is fixed in a holding element and a free end that includes a contact tip. The probe needle is provided—at least on the surface of the contact tip—with a layer consisting of a chemically inert, electroconductive material which is hard in relation to the material of contact surfaces of the semiconductor chips. For example, the layer can be titanium nitride.
    Type: Grant
    Filed: April 15, 2004
    Date of Patent: May 1, 2007
    Assignee: Infineon Technologies AG
    Inventors: Manfred Schneegans, Frank Pietzschmann
  • Publication number: 20060292849
    Abstract: The invention relates to an ultrathin semiconductor circuit having contact bumps and to a corresponding production method. The semiconductor circuit includes a bump supporting layer having a supporting layer thickness and having a supporting layer opening for uncovering a contact layer element being formed on the surface of a semiconductor circuit. An electrode layer is situated on the surface of the contact layer element within the opening of the bump supporting layer, on which electrode layer is formed a bump metallization for realizing the contact bump. On account of the bump supporting layer, a thickness of the semiconductor circuit can be thinned to well below 300 micrometers, with the wafer reliably being prevented from breaking. Furthermore, the moisture barrier properties of the semiconductor circuit are thereby improved.
    Type: Application
    Filed: May 26, 2006
    Publication date: December 28, 2006
    Inventors: Dirk Mueller, Manfred Schneegans, Sokratis Sgouridis
  • Publication number: 20060035458
    Abstract: The invention relates to a semiconductor component having a semiconductor body (1), to which a metallization (10), which is formed from metallization layers (11, 13, 15, 17) and separating layers (12, 14, 16, 18) arranged alternately in succession, a dielectric (2) and a molding compound (3) joined to the dielectric (2) are applied alternately in succession.
    Type: Application
    Filed: July 26, 2005
    Publication date: February 16, 2006
    Applicant: Infineon Technologies AG
    Inventors: Peter Nelle, Renate Hofmann, Jorg Busch, Alfred Edtmair, Manfred Schneegans, Matthias Stecher
  • Publication number: 20050266353
    Abstract: A method in which a resist layer is applied to a base layer is disclosed. The resist layer includes an adhesive material, and the adhesive force of the adhesive material decreases or increases during an irradiation process. Residues of the resist layer may be stripped using the disclosed method.
    Type: Application
    Filed: June 20, 2005
    Publication date: December 1, 2005
    Inventors: Werner Kroninger, Manfred Schneegans
  • Patent number: 6958256
    Abstract: The present invention relates to a process for the back-surface grinding of wafers using films which have a support layer, which is known per se, and an adhesion layer which can be polymerized in steps, and to films which include such an adhesion layer which can be polymerized in steps, and to the use thereof.
    Type: Grant
    Filed: October 30, 2003
    Date of Patent: October 25, 2005
    Assignee: Infineon Technologies AG
    Inventors: Michael Rogalli, Manfred Schneegans
  • Patent number: 6919269
    Abstract: A method for fabricating a semiconductor component includes: deposition of a polysilicon layer on a substrate, deposition of a precursor layer on the polysilicon layer, and deposition of a protective layer on the precursor layer. A crystalline transformation occurs in the precursor layer at a first temperature to form an electrode layer. The layers are patterned to form an electrode stack, and the polysilicon layer is oxidized at a second temperature such that no crystalline transformation occurs in the electrode layer.
    Type: Grant
    Filed: April 11, 2002
    Date of Patent: July 19, 2005
    Assignee: Infineon Technologies AG
    Inventors: Manfred Schneegans, Wolfgang Jäger, Ulrike Bewersdorff-Sarlette, Stephan Wege
  • Patent number: 6903009
    Abstract: According to one embodiment, a method for fabricating a contact is provided. The method can include a step of depositing a Ti layer in order to completely fill a contact hole and on a surrounding surface of an insulation layer. The method can also include a step of partially converting the Ti layer into a TiN layer in such a manner that a TiN layer is provided on the top side in the contact hole. Further, the method can include a step of polishing back the Ti layer and any remaining TiN layer on the surrounding surface of the insulation layer in a single-stage polishing step.
    Type: Grant
    Filed: February 11, 2003
    Date of Patent: June 7, 2005
    Assignee: Infineon Technologies AG
    Inventors: Alexander Ruf, Manfred Schneegans
  • Publication number: 20040239921
    Abstract: A probe needle for testing semiconductor chips includes one end that is fixed in a holding element and a free end that includes a contact tip. The probe needle is provided—at least on the surface of the contact tip—with a layer consisting of a chemically inert, electroconductive material which is hard in relation to the material of contact surfaces of the semiconductor chips. For example, the layer can be titanium nitride.
    Type: Application
    Filed: April 15, 2004
    Publication date: December 2, 2004
    Inventors: Manfred Schneegans, Frank Pietzschmann
  • Patent number: 6790737
    Abstract: A method for producing metal layers on surfaces of semiconductor substrates includes the step of providing a semiconductor substrate having a surface. In this case, a precursor compound of a metal to be deposited is condensed out on the semiconductor surface and subsequently decomposed thermally. The method makes it possible to fill trenches with a high aspect ratio, it being possible to effectively suppress the formation of voids.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: September 14, 2004
    Assignee: Infineon Technologies AG
    Inventors: Manfred Schneegans, Wolfgang Jaeger, Michael Rogalli
  • Publication number: 20040147102
    Abstract: The invention relates to a production method for a semiconductor component, with a substrate (1) and an electrode stack (7, 9′, 11′, 13), comprising a polysilicon electrode layer (7) and a tungsten-containing electrode layer (9′) arranged thereon.
    Type: Application
    Filed: November 14, 2003
    Publication date: July 29, 2004
    Inventors: Manfred Schneegans, Wolfgang Jager, Ulrike Bewersdorff-Sarlette, Stephan Wege
  • Publication number: 20040147120
    Abstract: The present invention relates to a process for the back-surface grinding of wafers using films which have a support layer, which is known per se, and an adhesion layer which can be polymerized in steps, and to films which include such an adhesion layer which can be polymerized in steps, and to the use thereof.
    Type: Application
    Filed: October 30, 2003
    Publication date: July 29, 2004
    Inventors: Michael Rogalli, Manfred Schneegans
  • Patent number: 6752694
    Abstract: An apparatus (10) for wafer grinding includes sensors (38) and a spectral analyzer to perform a spectral analysis of light received by the sensors (38) during grinding of a semiconductor wafer (12). Based on the spectral analysis, the grinding process is stopped or the force applied to the semiconductor wafer is modified. This in situ monitoring decreases breakage and overheating of the semiconductor wafer (12).
    Type: Grant
    Filed: November 8, 2002
    Date of Patent: June 22, 2004
    Assignees: Motorola, Inc., Semiconductor 300 GmbH & Co.KG, Infineon Technologies AG
    Inventors: Manfred Schneegans, Michael Roesner, David Wallis
  • Publication number: 20040092209
    Abstract: An apparatus (10) for wafer grinding includes sensors (38) and a spectral analyzer to perform a spectral analysis of light received by the sensors (38) during grinding of a semiconductor wafer (12). Based on the spectral analysis, the grinding process is stopped or the force applied to the semiconductor wafer is modified. This in situ monitoring decreases breakage and overheating of the semiconductor wafer (12).
    Type: Application
    Filed: November 8, 2002
    Publication date: May 13, 2004
    Inventors: Manfred Schneegans, Michael Roesner, David Wallis
  • Patent number: 6633379
    Abstract: A machining apparatus (10) comprises a material removing tool (12) movably mounted for removing material from a workpiece (14); means for illuminating (42, 54) a sample area upon a tool surface (34) with excitation radiation; means for receiving (42, 54) sample light emitted from the sample area; a spectral analyzer (54) for performing a spectral analysis of the sample light received; and means for determining (60) the condition of the tool at the sample area from the spectral analysis of the sample light. The wear of the tool (12) is determined as such a condition. Operation parameters of the machining apparatus (10) are adjusted according to the determined wear. An example application is a wafer dicing tool.
    Type: Grant
    Filed: June 8, 2001
    Date of Patent: October 14, 2003
    Assignees: Semiconductor 300 GmbH & Co. KG, Infineon Technologies AG
    Inventors: Michael Roesner, Manfred Schneegans, David Wallis
  • Publication number: 20030181037
    Abstract: A method for producing metal layers on surfaces of semiconductor substrates includes the step of providing a semiconductor substrate having a surface. In this case, a precursor compound of a metal to be deposited is condensed out on the semiconductor surface and subsequently decomposed thermally. The method makes it possible to fill trenches with a high aspect ratio, it being possible to effectively suppress the formation of voids.
    Type: Application
    Filed: March 17, 2003
    Publication date: September 25, 2003
    Inventors: Manfred Schneegans, Wolfgang Jaeger, Michael Rogalli
  • Publication number: 20030173589
    Abstract: The present invention provides a contact for an integrated circuit which, in order to connect a first line plane to a second line plane, runs through a contact hole in an insulation layer located between these planes, which contact consists entirely of Ti and/or TiN. The invention also provides a corresponding fabrication method.
    Type: Application
    Filed: February 11, 2003
    Publication date: September 18, 2003
    Inventors: Alexander Ruf, Manfred Schneegans
  • Publication number: 20020186370
    Abstract: A machining apparatus (10) comprises a material removing tool (12) movably mounted for removing material from a workpiece (14); means for illuminating (42, 54) a sample area upon a tool surface (34) with excitation radiation; means for receiving (42, 54) sample light emitted from the sample area; a spectral analyzer (54) for performing a spectral analysis of the sample light received; and means for determining (60) the condition of the tool at the sample area from the spectral analysis of the sample light. The wear of the tool (12) is determined as such a condition. Operation parameters of the machining apparatus (10) are adjusted according to the determined wear. An example application is a wafer dicing tool.
    Type: Application
    Filed: June 8, 2001
    Publication date: December 12, 2002
    Applicant: Motorola, Inc., Semiconductor 300 GmbH & Co.KG and Infineon Technologies AG.
    Inventors: Michael Roesner, Manfred Schneegans, David Wallis
  • Publication number: 20020022342
    Abstract: Metal/metal contacts are formed as part of a multilayer metallization in an integrated circuit on a semiconductor wafer. The application of an insulation layer on a metal level is followed by a lithography step using a photoresist mask to define contact holes on the insulation layer, followed by anisotropic etching of the insulation layer in order to produce the contact holes. Then, a chemical dry etch that removes the photoresist mask and a chemical-physical dry etch that removes organic impurities which accumulate during the chemical dry etch are successively carried out in a vacuum. Subsequently, a metal deposition step is carried out in order to fill the contact holes.
    Type: Application
    Filed: August 20, 2001
    Publication date: February 21, 2002
    Inventors: Manfred Schneegans, Stephan Wege
  • Patent number: 6268659
    Abstract: A semiconductor body with a layer of solder material and a method for soldering the semiconductor body include a chromium layer applied to a rear side of the semiconductor body, and a tin layer applied to the chromium layer. The semiconductor is subsequently soldered directly to the metal substrate, that is without further additives, by being heated to temperatures above 250° C. This metal layer system for soldering power semiconductors to cooling bodies enables two metal layers to be dispensed with as compared with known four metal layer systems.
    Type: Grant
    Filed: September 25, 1997
    Date of Patent: July 31, 2001
    Assignee: Infineon Technologies AG
    Inventors: Holger Huebner, Manfred Schneegans