Patents by Inventor Mansour Keramat

Mansour Keramat has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240313793
    Abstract: The present disclosure describes a system with an antenna, a signal generator, data converters, and an aggregator circuit. The antenna is configured to provide an input signal to the data converters. The signal generator is configured to generate a random binary sequence received by the data converters. The data converters include an analog circuit and a digital circuit configured to sample positive and negative polarities of the input signal based on the random binary sequence, reducing an offset tone in an output spectrum produced by the aggregator circuit.
    Type: Application
    Filed: March 16, 2023
    Publication date: September 19, 2024
    Applicant: Apple Inc.
    Inventors: Albert H. CHANG, Ahmad AL MARASHLI, George P. REITSMA, Sudharsan KANAGARAJ, Hamid NEJATI, Dusan STEPANOVIC, Vahid Majidzadeh BAFAR, Mansour KERAMAT, Mahdi KHOSHGARD
  • Patent number: 12079022
    Abstract: A power detect circuit is disclosed. A power detect circuit includes a voltage multiplier that receives an external supply voltage and generates a second supply voltage that is greater than the former. A voltage regulator is coupled to receive the second supply voltage and outputs a regulated supply voltage. A bandgap circuit is coupled to receive the second supply voltage when a first switch is closed, and the regulated supply voltage when a second switch is closed. The bandgap circuit generates a reference voltage for the voltage regulator, as well as one or more output voltages. A comparator circuit is coupled to receive the one or more output voltages from the bandgap circuit, and may compare these one or more output voltages to the regulated supply voltage.
    Type: Grant
    Filed: October 24, 2023
    Date of Patent: September 3, 2024
    Assignee: Apple Inc.
    Inventors: Seyedeh Sedigheh Hashemi, Vahid Majidzadeh Bafar, Ali Mesgarani, Mansour Keramat
  • Patent number: 12055962
    Abstract: A reference generator circuit included in a computer system may employ multiple field-effect transistors to generate a reference voltage whose value is based on the threshold voltages of the multiple field-effect transistors. The reference generator circuit can include a current source that generates a bias current. One of more stages included in the reference generator circuit can generate, using the bias current, respective output voltages whose values are based on differences in threshold voltages of field-effect transistors included in the stages. The output voltages can be combined to generate different reference voltage values.
    Type: Grant
    Filed: October 22, 2021
    Date of Patent: August 6, 2024
    Assignee: Apple Inc.
    Inventors: Soheil Golara, Seyedeh Sedigheh Hashemi, Mansour Keramat
  • Patent number: 12013713
    Abstract: The present disclosure is directed to a system implementing a sensor. A sensing system is implemented in a functional circuit block that is coupled to a global supply voltage node. The sensing system includes a power converter circuit configured to generate a regulated voltage level on a local supply node using the voltage present on the global supply voltage node. The system also includes a sensor circuit coupled to receive the regulated voltage node, wherein the sensor is configured to compare corresponding parameters of different ones of a number of subset of device at a plurality of different time points and generate a plurality of comparison results. The comparisons generate an analog signal that is proportional to the operating parameter. An analog-to-digital converter (ADC) is coupled to receive the analog signal and generate a plurality of bits corresponding thereto.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: June 18, 2024
    Assignee: Apple Inc.
    Inventors: Ali Mesgarani, Ke Yun, Seyedeh Sedigheh Hashemi, Jasdeep S. Dhaliwal, Mansour Keramat, Jafar Savoj, Bruno W. Garlepp, Vahid Majidzadeh Bafar, Emerson S. Fang
  • Publication number: 20240168508
    Abstract: A power detect circuit is disclosed. A power detect circuit includes a voltage multiplier that receives an external supply voltage and generates a second supply voltage that is greater than the former. A voltage regulator is coupled to receive the second supply voltage and outputs a regulated supply voltage. A bandgap circuit is coupled to receive the second supply voltage when a first switch is closed, and the regulated supply voltage when a second switch is closed. The bandgap circuit generates a reference voltage for the voltage regulator, as well as one or more output voltages. A comparator circuit is coupled to receive the one or more output voltages from the bandgap circuit, and may compare these one or more output voltages to the regulated supply voltage.
    Type: Application
    Filed: October 24, 2023
    Publication date: May 23, 2024
    Inventors: Seyedeh Sedigheh Hashemi, Vahid Majidzadeh Bafar, Ali Mesgarani, Mansour Keramat
  • Patent number: 11988565
    Abstract: A sensor system included in an integrated circuit includes multiple sensor circuits and a control circuit. Using characterization data, a model may be generated that defines a relationship between measurable parameters of the integrated circuit and an operating characteristic of the integrated circuit. The control circuit can combine, using a function included in the model, data from the multiple sensor circuits to determine a value of the operating characteristic that is more accurate than a sensor circuit configured to measure a single parameter of the integrated circuit that varies with the operating characteristic.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: May 21, 2024
    Assignee: Apple Inc.
    Inventors: Ali Mesgarani, Farzan Farbiz, Ke Yun, Dusan Stepanovic, Seyedeh Sedigheh Hashemi, Mansour Keramat
  • Patent number: 11899061
    Abstract: A voltage monitoring circuit is disclosed. An apparatus includes a first physical interface circuit and a real-time oscilloscope circuit configured to monitor a first voltage provided to the first physical interface circuit. The real-time oscilloscope is configured to receive an indication that an error was detected in data transmitted from the first physical interface to a second physical interface circuit. The real-time oscilloscope is further configured to provide for debug, to a host computer external to the first interface, information indicating a state of the first voltage at a time at which the error was detected.
    Type: Grant
    Filed: June 14, 2021
    Date of Patent: February 13, 2024
    Assignee: Apple Inc.
    Inventors: Fabien S. Faure, Si Chen, Mansour Keramat, Arnaud J. Forestier
  • Publication number: 20240044717
    Abstract: The present disclosure describes embodiments of a compact low voltage CMOS-based temperature sensor. The CMOS-based temperature sensor can include a reference voltage generator, a temperature front-end circuit, and an analog-to-digital converter (ADC). The reference voltage generator can be configured to generate a reference voltage independent of temperature. The temperature front-end circuit can include first and second transistors configured to generate a temperature signal proportional to temperature. The first MOS transistor can include first and second terminals. The first terminal can be electrically coupled to the reference voltage. The second terminal can be electrically coupled to the second MOS transistor. The second terminal can provide the temperature signal. The ADC can be electrically coupled to the reference voltage and configured to convert the temperature signal to a digital signal.
    Type: Application
    Filed: August 5, 2022
    Publication date: February 8, 2024
    Inventors: Soheil GOLARA, Mansour KERAMAT, Seyedeh Sedigheh HASHEMI
  • Patent number: 11841726
    Abstract: A power detect circuit is disclosed. A power detect circuit includes a voltage multiplier that receives an external supply voltage and generates a second supply voltage that is greater than the former. A voltage regulator is coupled to receive the second supply voltage and outputs a regulated supply voltage. A bandgap circuit is coupled to receive the second supply voltage when a first switch is closed, and the regulated supply voltage when a second switch is closed. The bandgap circuit generates a reference voltage for the voltage regulator, as well as one or more output voltages. A comparator circuit is coupled to receive the one or more output voltages from the bandgap circuit, and may compare these one or more output voltages to the regulated supply voltage.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: December 12, 2023
    Assignee: Apple Inc.
    Inventors: Seyedeh Sedigheh Hashemi, Vahid Majidzadeh Bafar, Ali Mesgarani, Mansour Keramat
  • Publication number: 20230083084
    Abstract: A reference generator circuit included in a computer system may employ multiple field-effect transistors to generate a reference voltage whose value is based on the threshold voltages of the multiple field-effect transistors. The reference generator circuit can include a current source that generates a bias current. One of more stages included in the reference generator circuit can generate, using the bias current, respective output voltages whose values are based on differences in threshold voltages of field-effect transistors included in the stages. The output voltages can be combined to generate different reference voltage values.
    Type: Application
    Filed: October 22, 2021
    Publication date: March 16, 2023
    Inventors: Soheil Golara, Seyedeh Sedigheh Hashemi, Mansour Keramat
  • Patent number: 11581901
    Abstract: Systems, apparatuses, and methods for performing digital pre-distortion compensation of digital-to-analog converter non-linearity are described. A correction circuit receives a digital input word and couples a portion of the most significant bits (MSB's) of the digital input word to a correction lookup table (LUT). A correction value is retrieved from a correction LUT entry that matches the MSB's of the digital input word. Next, the correction value is added to the original digital input word in the digital domain. Then, the sum generated by adding the correction value to the original digital input word is optionally clipped if the sum exceeds the DAC core's input range. Next, the DAC core converts the sum into an analog value that is representative of the digital input word. The above approach helps to reduce non-linearities introduced by the DAC core in an energy-efficient manner by performing a correction in the digital domain.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: February 14, 2023
    Assignee: Apple Inc.
    Inventors: Dusan Stepanovic, Mansour Keramat
  • Publication number: 20230022492
    Abstract: Acoustic touch detection (touch sensing) system architectures and methods can be used to detect an object touching a surface. Position of an object touching a surface can be determined using time-of-flight (TOF) bounding box techniques, or acoustic image reconstruction techniques. Acoustic touch sensing can utilize transducers, such as piezoelectric transducers, to transmit ultrasonic waves along a surface and/or through the thickness of an electronic device. Location of the object can be determined, for example, based on the amount of time elapsing between the transmission of the wave and the detection of the reflected wave. An object in contact with the surface can interact with the transmitted wave causing attenuation, redirection and/or reflection of at least a portion of the transmitted wave. Portions of the transmitted wave energy after interaction with the object can be measured to determine the touch location of the object on the surface of the device.
    Type: Application
    Filed: August 1, 2022
    Publication date: January 26, 2023
    Inventors: Mohammad YEKE YAZDANDOOST, Brian M. KING, Ehsan KHAJEH, Giovanni GOZZINI, Marcus C. YIP, Mansour KERAMAT, Vahid MAJIDZADEH BAFAR, Aaron S. TUCKER
  • Publication number: 20220397604
    Abstract: A voltage monitoring circuit is disclosed. An apparatus includes a first physical interface circuit and a real-time oscilloscope circuit configured to monitor a first voltage provided to the first physical interface circuit. The real-time oscilloscope is configured to receive an indication that an error was detected in data transmitted from the first physical interface to a second physical interface circuit. The real-time oscilloscope is further configured to provide for debug, to a host computer external to the first interface, information indicating a state of the first voltage at a time at which the error was detected.
    Type: Application
    Filed: June 14, 2021
    Publication date: December 15, 2022
    Inventors: Fabien S. Faure, Si Chen, Mansour Keramat, Arnaud J. Forestier
  • Publication number: 20220357212
    Abstract: A sensor system included in an integrated circuit includes multiple sensor circuits and a control circuit. Using characterization data, a model may be generated that defines a relationship between measurable parameters of the integrated circuit and an operating characteristic of the integrated circuit. The control circuit can combine, using a function included in the model, data from the multiple sensor circuits to determine a value of the operating characteristic that is more accurate than a sensor circuit configured to measure a single parameter of the integrated circuit that varies with the operating characteristic.
    Type: Application
    Filed: May 6, 2021
    Publication date: November 10, 2022
    Inventors: Ali Mesgarani, Farzan Farbiz, Ke Yun, Dusan Stepanovic, Seyedeh Sedigheh Hashemi, Mansour Keramat
  • Patent number: 11296599
    Abstract: A power supply circuit included in a computer system regulates a power supply voltage using an input power supply. During startup, the power supply circuit uses a first reference voltage that is generated using the input power supply to regulated the power supply voltage. After a period of time has elapsed, the power supply circuit switches to using a more accurate second reference voltage that is generated using the regulated power supply voltage.
    Type: Grant
    Filed: April 20, 2021
    Date of Patent: April 5, 2022
    Assignee: Apple Inc.
    Inventors: Soheil Golara, Ali Mesgarani, Seyedeh Sedigheh Hashemi, Mansour Keramat
  • Publication number: 20220100220
    Abstract: The present disclosure is directed to a system implementing a sensor. A sensing system is implemented in a functional circuit block that is coupled to a global supply voltage node. The sensing system includes a power converter circuit configured to generate a regulated voltage level on a local supply node using the voltage present on the global supply voltage node. The system also includes a sensor circuit coupled to receive the regulated voltage node, wherein the sensor is configured to compare corresponding parameters of different ones of a number of subset of device at a plurality of different time points and generate a plurality of comparison results. The comparisons generate an analog signal that is proportional to the operating parameter. An analog-to-digital converter (ADC) is coupled to receive the analog signal and generate a plurality of bits corresponding thereto.
    Type: Application
    Filed: September 25, 2020
    Publication date: March 31, 2022
    Inventors: Ali Mesgarani, Ke Yun, Seyedeh Sedigheh Hashemi, Jasdeep S. Dhaliwal, Mansour Keramat, Jafar Savoj, Bruno W. Garlepp, Vahid Majidzadeh Bafar, Emerson S. Fang
  • Publication number: 20220094369
    Abstract: Systems, apparatuses, and methods for performing digital pre-distortion compensation of digital-to-analog converter non-linearity are described. A correction circuit receives a digital input word and couples a portion of the most significant bits (MSB's) of the digital input word to a correction lookup table (LUT). A correction value is retrieved from a correction LUT entry that matches the MSB's of the digital input word. Next, the correction value is added to the original digital input word in the digital domain. Then, the sum generated by adding the correction value to the original digital input word is optionally clipped if the sum exceeds the DAC core's input range. Next, the DAC core converts the sum into an analog value that is representative of the digital input word. The above approach helps to reduce non-linearities introduced by the DAC core in an energy-efficient manner by performing a correction in the digital domain.
    Type: Application
    Filed: September 21, 2020
    Publication date: March 24, 2022
    Inventors: Dusan Stepanovic, Mansour Keramat
  • Patent number: 11196436
    Abstract: Systems, apparatuses, and methods for performing hybrid non-linearity correction for a digital-to-analog converter (DAC) are described. A circuit includes two correction LUTs, an edge-trim DAC, and a DAC core. A lookup of a first correction LUT is performed using a portion of the most significant bits (MSBs) of a received digital input value. A first correction value, retrieved from the first correction LUT, is applied to the digital input value to generate a corrected value. The corrected value is provided to the DAC core and to a second correction LUT. A second correction value, retrieved from the second correction LUT, is compared to the first correction value. If the second correction value is different from the first correction value, the difference is provided to the edge-trim DAC to generate an analog correction which is applied to an analog output of the DAC core.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: December 7, 2021
    Assignee: Apple Inc.
    Inventors: Dusan Stepanovic, KiYoung Nam, Mansour Keramat
  • Patent number: 11137787
    Abstract: A comparator circuit included in a computer system employs an inverter circuit as a high-speed comparison circuit. To allow the inverter circuit to compare an input signal to a particular threshold value, a trip point of the inverter circuit is adjusted to match the threshold value by modifying a voltage level of a power supply node coupled to the inverter. To modify the voltage level of the power supply node, a replica of the inverter circuit is biased to generate a bias signal that corresponds to the trip point of the inverter circuit. A comparator circuit compares the bias signal to the threshold value, and adjusts the voltage level of the power supply node using results of the comparison. An output circuit adjusts an output of the inverter circuit to generate a full-rail output signal.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: October 5, 2021
    Assignee: Apple Inc.
    Inventors: Soheil Golara, Mansour Keramat, Seyedeh Sedigheh Hashemi
  • Patent number: 11114938
    Abstract: A power supply circuit included in a computer system is configured to generate a particular voltage level on a regulated power supply node using multiple charge pump circuits coupled together via a regulation device to provide regulation. A first charge pump circuit is configured to, using a voltage of an input power supply node, generate an intermediate voltage level, which is regulated by the regulation device. The second charge pump is configured to generate a voltage level on the regulated power supply node using a regulated version of intermediate voltage level. An impedance of the regulation device is adjusted using results of comparing the voltage level of the regulated power supply node to a reference voltage.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: September 7, 2021
    Assignee: Apple Inc.
    Inventors: Soheil Golara, Ali Mesgarani, Mansour Keramat, Seyedeh Sedigheh Hashemi