Patents by Inventor Manu Jamndas Tejwani

Manu Jamndas Tejwani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5759898
    Abstract: A process and method for producing strained and defect free semiconductor layers. In a preferred embodiment, silicon on insulator may be used as a substrate for the growth of fully relaxed SiGe buffer layers. A new strain relief mechanism operates, whereby the SiGe layer relaxes without the generation of threading dislocations within the SiGe layer. This is achieved by depositing SiGe on an SOI substrate with a superficial silicon thickness. Initially the strain in the SiGe layer becomes equalized with the thin Si layer by creating tensile strain in the Si layer. Then the strain created in the thin Si layer is relaxed by plastic deformation during an anneal. Since dislocations are formed, and glide in the thin Si layer, threading dislocations are not introduced into the upper SiGe material. A strained silicon layer for heterostructures may then be formed on the SiGe material.
    Type: Grant
    Filed: December 19, 1996
    Date of Patent: June 2, 1998
    Assignee: International Business Machines Corporation
    Inventors: Bruce A. Ek, Subramanian Srikanteswara Iyer, Philip Michael Pitner, Adrian R. Powell, Manu Jamndas Tejwani