Patents by Inventor Manuel Antonio D'Abreu

Manuel Antonio D'Abreu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11036404
    Abstract: Devices, systems, and methods are provided for dynamically reconfiguring storage devices with applications in real-time to meet user needs, such as running different applications. The devices, systems, and methods relate to a storage device that includes memory for data storage and a controller for storing data in the memory. The controller includes a processor configured to receive an indication to reconfigure the controller with an application that is user-selected; receive the application; reconfigure the controller with the application such that the controller is enabled to run the application; receive an indication to run the application with a set of data as input; receive the set of data; run the application with the set of data as input; and generate resulting data from running the application with the set of data as input.
    Type: Grant
    Filed: July 11, 2019
    Date of Patent: June 15, 2021
    Assignee: SMART IOPS, INC.
    Inventors: Manuel Antonio d'Abreu, Ashutosh Kumar Das
  • Publication number: 20210049104
    Abstract: Devices, systems, and methods are provided that cause a controller to receive a first command to read or write first data from or to a first logical address; and determine a first mapped logical address that the first logical address is mapped to. A first plurality of logical addresses is mapped to the first mapped logical address and includes the first logical address. The controller reads a first data structure at the first mapped logical address. The first data structure includes a pointer to a first intermediate physical address. The controller reads a second data structure at the first intermediate physical address. The second data structure includes a plurality of pointers to target physical addresses. The plurality of pointers includes a pointer to a first target physical address for the first logical address. The controller reads or writes the first data from or to the first target physical address.
    Type: Application
    Filed: August 18, 2020
    Publication date: February 18, 2021
    Applicant: SMART IOPS, INC.
    Inventors: Ashutosh Kumar Das, Manuel Antonio D'Abreu
  • Publication number: 20210049094
    Abstract: In certain aspects, dynamic remapping of memory addresses is provided and includes initiating a remapping of a logical block from a “mapped block” to a “remapped block.” Logical address locations for the logical block are mapped to physical address locations in the mapped block. The mapped and remapped blocks include non-volatile memory. A read command is received and determined to be for reading from a logical address location of the logical block, and the logical address location is determined to be mapped to a physical address location. Data is read from the physical address location of the mapped block. A write command is received and determined to be for writing data to the logical address location. Data is written to the physical address location of the remapped block. The read command is received after the initiation of the remapping and before the writing of the data to the remapped block.
    Type: Application
    Filed: August 18, 2020
    Publication date: February 18, 2021
    Applicant: SMART IOPS, INC.
    Inventors: Ashutosh Kumar Das, Manuel Antonio d'Abreu
  • Publication number: 20200218462
    Abstract: In some aspects, devices, systems, and methods are provided that relate to data deduplication performed in data storage devices, such as solid-state drives (SSD) or drives of any other type. In some aspects, devices, systems, and methods are provided that relate to hierarchical data deduplication at a local and system level, such as in a storage system built with one or more SSDs having built-in data deduplication functionality. The hierarchical data deduplication utilizes the IDs in the data storage devices to decide if the incoming data has to be stored or if a copy of the incoming data is already stored. In hierarchical data deduplication, no IDs (or signatures) are required to be stored at a system level. In some aspects, data steering is provided that enables data storing coordination in a system that consists of a set of data storage device (e.g., SSDs) having built-in data deduplication.
    Type: Application
    Filed: March 19, 2020
    Publication date: July 9, 2020
    Applicant: Smart IOPS, Inc.
    Inventors: Manuel Antonio d'Abreu, Ashutosh Kumar Das
  • Patent number: 10635339
    Abstract: In some aspects, devices, systems, and methods are provided that relate to data deduplication performed in data storage devices, such as solid-state drives (SSD) or drives of any other type. In some aspects, devices, systems, and methods are provided that relate to hierarchical data deduplication at a local and system level, such as in a storage system built with one or more SSDs having built-in data deduplication functionality. The hierarchical data deduplication utilizes the IDs in the data storage devices to decide if the incoming data has to be stored or if a copy of the incoming data is already stored. In hierarchical data deduplication, no IDs (or signatures) are required to be stored at a system level. In some aspects, data steering is provided that enables data storing coordination in a system that consists of a set of data storage device (e.g., SSDs) having built-in data deduplication.
    Type: Grant
    Filed: May 2, 2018
    Date of Patent: April 28, 2020
    Assignee: SMART IPOS, INC.
    Inventors: Manuel Antonio d'Abreu, Ashutosh Kumar Das
  • Publication number: 20190332289
    Abstract: Devices, systems, and methods are provided for dynamically reconfiguring storage devices with applications in real-time to meet user needs, such as running different applications. The devices, systems, and methods relate to a storage device that includes memory for data storage and a controller for storing data in the memory. The controller includes a processor configured to receive an indication to reconfigure the controller with an application that is user-selected; receive the application; reconfigure the controller with the application such that the controller is enabled to run the application; receive an indication to run the application with a set of data as input; receive the set of data; run the application with the set of data as input; and generate resulting data from running the application with the set of data as input.
    Type: Application
    Filed: July 11, 2019
    Publication date: October 31, 2019
    Applicant: Smart IOPS, Inc.
    Inventors: Manuel Antonio d'Abreu, Ashutosh Kumar Das
  • Patent number: 10423345
    Abstract: Devices, systems, and methods are provided that include a controller configured to receive a first data packet from a memory device; determine a bit error count for the first data packet; and determine whether the bit error count exceeds a predetermined threshold. When the bit error count exceeds the predetermined threshold, the controller corrects errors identified in the bit error count; generates and inserts pre-defined data into the first data packet at a location where errors occurred in the first data packet; and generates and inserts a tag into the first data packet. The tag includes information indicating a size and a location of the pre-defined data in the first data packet.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: September 24, 2019
    Assignee: SMART IOPS, INC.
    Inventor: Manuel Antonio d'Abreu
  • Patent number: 10394474
    Abstract: Devices, systems, and methods are provided for dynamically reconfiguring storage devices with applications in real-time to meet user needs, such as running different applications. The devices, systems, and methods relate to a storage device that includes memory for data storage and a controller for storing data in the memory. The controller includes a processor configured to receive an indication to reconfigure the controller with an application that is user-selected; receive the application; reconfigure the controller with the application such that the controller is enabled to run the application; receive an indication to run the application with a set of data as input; receive the set of data; run the application with the set of data as input; and generate resulting data from running the application with the set of data as input.
    Type: Grant
    Filed: November 10, 2017
    Date of Patent: August 27, 2019
    Assignee: SMART IOPS, INC.
    Inventors: Manuel Antonio d'Abreu, Ashutosh Kumar Das
  • Publication number: 20190146696
    Abstract: Devices, systems, and methods are provided for dynamically reconfiguring storage devices with applications in real-time to meet user needs, such as running different applications. The devices, systems, and methods relate to a storage device that includes memory for data storage and a controller for storing data in the memory. The controller includes a processor configured to receive an indication to reconfigure the controller with an application that is user-selected; receive the application; reconfigure the controller with the application such that the controller is enabled to run the application; receive an indication to run the application with a set of data as input; receive the set of data; run the application with the set of data as input; and generate resulting data from running the application with the set of data as input.
    Type: Application
    Filed: November 10, 2017
    Publication date: May 16, 2019
    Applicant: Smart IOPS, Inc.
    Inventors: Manuel Antonio d'Abreu, Ashutosh Kumar Das
  • Publication number: 20190146923
    Abstract: In certain aspects, one or more solid-state storage devices (SSDs) are provided that include a controller and non-volatile memory coupled to the controller. The non-volatile memory can include one or more portions configured as main memory or cache memory. When data stored in the main memory is written to the cache memory for processing, the data in the main memory is erased. In certain aspects, storage systems are provided that include one or more of such SSDs coupled to a host system. In certain aspects, methods are provided that include: receiving, by a first such SSD, a first command to write data to memory; determining that the data is stored in a main memory and is to be written to the cache memory for processing; writing the data to the cache memory; and erasing the data from the main memory.
    Type: Application
    Filed: November 13, 2018
    Publication date: May 16, 2019
    Applicant: SMART IOPS, INC.
    Inventors: Ashutosh Kumar Das, Manuel Antonio d'Abreu
  • Publication number: 20180321868
    Abstract: In some aspects, devices, systems, and methods are provided that relate to data deduplication performed in data storage devices, such as solid-state drives (SSD) or drives of any other type. In some aspects, devices, systems, and methods are provided that relate to hierarchical data deduplication at a local and system level, such as in a storage system built with one or more SSDs having built-in data deduplication functionality. The hierarchical data deduplication utilizes the IDs in the data storage devices to decide if the incoming data has to be stored or if a copy of the incoming data is already stored. In hierarchical data deduplication, no IDs (or signatures) are required to be stored at a system level. In some aspects, data steering is provided that enables data storing coordination in a system that consists of a set of data storage device (e.g., SSDs) having built-in data deduplication.
    Type: Application
    Filed: May 2, 2018
    Publication date: November 8, 2018
    Applicant: Smart IOPS, Inc.
    Inventors: Manuel Antonio d'Abreu, Ashutosh Kumar Das
  • Patent number: 10116336
    Abstract: A data storage device includes a non-volatile memory and a controller operationally coupled to the non-volatile memory. The controller is configured to access information stored at the non-volatile memory. The information includes a user data portion and an error correcting code (ECC) portion corresponding to the user data portion. The controller is further configured to modify the ECC portion in response to an error rate associated with the information exceeding a threshold. The one or more ECC parameters are modified without erasing or re-programming the user data portion.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: October 30, 2018
    Assignee: SanDisk Technologies LLC
    Inventors: Xinde Hu, Manuel Antonio D'Abreu
  • Publication number: 20180239537
    Abstract: In certain aspects, a data storage device is provided including a distributed controller configured to communicate with a main controller; and first and second memory devices of respective first and second non-volatile memory technologies. The first and second memory devices are coupled to the distributed controller configured to control access to the first and second memory devices. In certain aspects, a system is provided including a main controller; first and second distributed controllers coupled to the main controller; at least one first memory device coupled to the first distributed controller; and at least one second memory device coupled to the second distributed controller. The main controller is configured to control access to the first and second distributed controllers. The first and second distributed controllers are configured to control access to the respective at least one first and second memory devices that include at least two non-volatile memory technologies.
    Type: Application
    Filed: February 23, 2018
    Publication date: August 23, 2018
    Applicant: Smart IOPS, Inc.
    Inventors: Manuel Antonio d'Abreu, Ashutosh Kumar Das
  • Patent number: 10026464
    Abstract: In certain aspects, a device may include a memory and a controller coupled to the memory. The controller may be configured to process data to form codewords and to send the codewords to the memory to be stored at locations of the memory. The controller may encode and tag the incoming data (from the host) to minimize the charge that is required to be stored in the non-volatile memory.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: July 17, 2018
    Assignee: SMART IOPS, INC.
    Inventors: Manuel Antonio d'Abreu, Ashutosh Kumar Das
  • Publication number: 20180068701
    Abstract: In certain aspects, a device may include a memory and a controller coupled to the memory. The controller may be configured to process data to form codewords and to send the codewords to the memory to be stored at locations of the memory. The controller may encode and tag the incoming data (from the host) to minimize the charge that is required to be stored in the non-volatile memory.
    Type: Application
    Filed: September 6, 2017
    Publication date: March 8, 2018
    Applicant: Smart IOPS, Inc.
    Inventors: Manuel Antonio d'Abreu, Ashutosh Kumar Das
  • Publication number: 20180067666
    Abstract: In certain aspects, devices, systems, and methods are provided for increasing endurance on a storage system having a plurality of components using adaptive code rates. A controller may be configured to receive a first data packet from a memory device; determine a bit error count for the first data packet; and determine whether the bit error count exceeds a predetermined threshold. When the bit error count exceeds the predetermined threshold, the controller corrects errors identified in the bit error count; generates and inserts pre-defined data into the first data packet at a location where errors occurred in the first data packet; and generates and inserts a tag into the first data packet. The tag includes information indicating a size and a location of the pre-defined data in the first data packet.
    Type: Application
    Filed: September 6, 2017
    Publication date: March 8, 2018
    Applicant: Smart IOPS, Inc.
    Inventor: Manuel Antonio d'Abreu
  • Patent number: 9870167
    Abstract: A device includes a memory and a controller coupled to the memory. The controller is configured to process data to form codewords and to send the codewords to the memory to be stored at locations of the memory that are restricted based on a non-adjacency pattern.
    Type: Grant
    Filed: October 12, 2015
    Date of Patent: January 16, 2018
    Assignee: SanDisk Technologies LLC
    Inventors: Manuel Antonio D'Abreu, Sathyanarayanan Subramanian
  • Patent number: 9817749
    Abstract: A storage device includes non-volatile memory and a controller. A method performed in the data storage device includes sending an instruction to a host device to cause the host device to perform one or more specified computations. The method further includes receiving a response from the host device. The response is based on execution of the one or more specified computations.
    Type: Grant
    Filed: December 4, 2013
    Date of Patent: November 14, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Manuel Antonio D'Abreu, Dimitris C. Pantelakis
  • Patent number: 9766976
    Abstract: A method includes generating a first error correcting code (ECC) codeword and a second ECC codeword. The method further includes generating redundancy information based on at least a portion of the first ECC codeword and further based on at least a portion of the second ECC codeword. The method further includes storing the first ECC codeword, the second ECC codeword, and the redundancy information at a word line of a memory of a data storage device.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: September 19, 2017
    Assignee: SanDisk Technologies LLC
    Inventors: Manuel Antonio d'Abreu, Zongwang Li
  • Patent number: 9760481
    Abstract: A data storage device includes a memory that has a three-dimensional (3D) memory configuration, a controller, and a plurality of memory ports. The controller is configured to read mapping data from the memory. The mapping data maps the plurality of memory ports to the plurality of storage elements. The controller is further configured to, in response to receiving a command associated with a logical address, determine a physical address of the memory corresponding to the logical address, the physical address corresponding to a group of storage elements of the plurality of storage elements. The controller is further configured to select a memory port of the plurality of memory ports, where the memory port is mapped to the group of storage elements. The controller is further configured to access the group of storage elements via the memory port to perform first command.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: September 12, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventor: Manuel Antonio D'Abreu