Patents by Inventor Manuela La Rosa
Manuela La Rosa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11522363Abstract: An input node is configured to receive a supply signal which may be of a first polarity or a second polarity opposite the first polarity. A high input current circuit couples the input node to an output node through at least one power transistor having a control electrode. A low input current circuit couples a supply current from the input node to control circuit configured to control the power transistor. A circuit is provided to detect polarity reversal with respect to the supply signal. A protection circuit for the low input current circuit operates to decouple the control circuit from the input node if the supply signal has the second polarity. A protection circuit for the high input current circuit operates to short-circuit the control electrode of the power transistor to the current path provided by the power transistor between the input node and the output node.Type: GrantFiled: August 29, 2019Date of Patent: December 6, 2022Assignee: STMicroelectronics S.r.l.Inventors: Manuela La Rosa, Giovanni Sicurella, Giuseppe Meola
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Patent number: 11171478Abstract: A power stage in an electronic fuse circuit is driven by controller. The controller includes a first comparator set for output voltage control and a second comparator set for output current control. Each comparator set includes at least one comparator having a reference input, a feedback input, and one or more outputs. A driver circuit includes output terminals for driving the power stage. The driver circuit includes a switch that is selectively activated in response to outputs from the first and second comparator sets to clamp the voltage across the output terminals of the driver circuit. The clamp operation is made in response to feedback input to either of the first and second comparator sets having exceeded a certain reference.Type: GrantFiled: May 25, 2020Date of Patent: November 9, 2021Assignee: STMicroelectronics S.r.l.Inventors: Manuela La Rosa, Giovanni Sicurella
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Patent number: 11101813Abstract: A multiple-input analog-to-digital converter device includes analog-to-digital converter circuits arranged between input nodes and output nodes. The analog-to-digital converter circuits operate over respective conversion times to provide simultaneous conversion of the analog input signals into respective conversion time signals. A time-to-digital converter circuit includes timer circuitry common to the plurality of analog-to-digital converter circuits. The timer circuitry cooperates with the analog-to-digital converter circuits to convert the conversion time signals into digital output signals at the output nodes.Type: GrantFiled: August 14, 2020Date of Patent: August 24, 2021Assignee: STMicroelectronics S.r.l.Inventors: Giovanni Sicurella, Manuela La Rosa
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Publication number: 20210050859Abstract: A multiple-input analog-to-digital converter device includes analog-to-digital converter circuits arranged between input nodes and output nodes. The analog-to-digital converter circuits operate over respective conversion times to provide simultaneous conversion of the analog input signals into respective conversion time signals. A time-to-digital converter circuit includes timer circuitry common to the plurality of analog-to-digital converter circuits. The timer circuitry cooperates with the analog-to-digital converter circuits to convert the conversion time signals into digital output signals at the output nodes.Type: ApplicationFiled: August 14, 2020Publication date: February 18, 2021Applicant: STMicroelectronics S.r.l.Inventors: Giovanni SICURELLA, Manuela LA ROSA
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Publication number: 20210050787Abstract: A control circuit and method, wherein an error signal is generated representative of a difference between an output voltage of a switching circuit and a nominal signal; a single control signal is generated, representative of an average error of the error signal; the single control signal is compared with a first periodic reference signal and a second periodic reference signal; a first pulse width modulated signal is generated by a Buck modulator; and a second pulse width modulated signal is generated by a Boost modulator. The maximum value of the first periodic reference signal and the minimum value of the second periodic reference signal are higher and lower, respectively, than the single control signal in a transient control mode between a Buck control mode and a Boost control mode.Type: ApplicationFiled: August 7, 2020Publication date: February 18, 2021Inventors: Manuela La Rosa, Giovanni Sicurella
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Publication number: 20200287374Abstract: A power stage in an electronic fuse circuit is driven by controller. The controller includes a first comparator set for output voltage control and a second comparator set for output current control. Each comparator set includes at least one comparator having a reference input, a feedback input, and one or more outputs. A driver circuit includes output terminals for driving the power stage. The driver circuit includes a switch that is selectively activated in response to outputs from the first and second comparator sets to clamp the voltage across the output terminals of the driver circuit. The clamp operation is made in response to feedback input to either of the first and second comparator sets having exceeded a certain reference.Type: ApplicationFiled: May 25, 2020Publication date: September 10, 2020Applicant: STMicroelectronics S.r.l.Inventors: Manuela LA ROSA, Giovanni SICURELLA
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Patent number: 10771075Abstract: A converter circuit is used to selectively convert an analog input voltage into a digital output signal or a digital input signal into an analog output voltage as a function of a mode signal. The converter circuit includes a control circuit configured to generate a start-of-conversion signal. A ramp generator is configured to, when the mode signal indicates an analog-to-digital conversion, generate a timer stop signal after a time interval that is determined as a function of the value of the analog input voltage, thereby implementing an analog-to-time conversion. When the mode signal indicates a digital-to-analog conversion, ramp generator is configured to vary the ramp signal until a ramp stop signal is set and, in response to the ramp stop signal, determine the analog output voltage as a function of the ramp signal, thereby implementing a time-to-analog conversion.Type: GrantFiled: May 24, 2019Date of Patent: September 8, 2020Assignee: STMICROELECTRONICS S.R.L.Inventors: Manuela La Rosa, Giovanni Sicurella
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Patent number: 10713446Abstract: A voltage-to-time converter circuit receives a first voltage signal and produces a PWM-modulated signal having a duty-cycle proportional to the first voltage signal. A current integrator circuit receives the PWM-modulated signal from the voltage-to-time converter circuit block and produces an output signal by integrating a current signal from a current source over integration time intervals having a duration which is a function of the duty-cycle of the PWM-modulated signal. The current signal is proportional to a second voltage signal. The output signal is accordingly proportional to a product of the first voltage signal and the current signal, which is furthermore proportional to a product of the first voltage signal and the second voltage signal.Type: GrantFiled: February 13, 2019Date of Patent: July 14, 2020Assignee: STMicroelectronics S.r.l.Inventors: Giovanni Sicurella, Manuela La Rosa
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Patent number: 10666039Abstract: A power stage in an electronic fuse circuit is driven by controller. The controller includes a first comparator set for output voltage control and a second comparator set for output current control. Each comparator set includes at least one comparator having a reference input, a feedback input, and one or more outputs. A driver circuit includes output terminals for driving the power stage. The driver circuit includes a switch that is selectively activated in response to outputs from the first and second comparator sets to clamp the voltage across the output terminals of the driver circuit. The clamp operation is made in response to feedback input to either of the first and second comparator sets having exceeded a certain reference.Type: GrantFiled: March 8, 2017Date of Patent: May 26, 2020Assignee: STMicroelectronics S.r.l.Inventors: Manuela La Rosa, Giovanni Sicurella
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Publication number: 20200076190Abstract: An input node is configured to receive a supply signal which may be of a first polarity or a second polarity opposite the first polarity. A high input current circuit couples the input node to an output node through at least one power transistor having a control electrode. A low input current circuit couples a supply current from the input node to control circuit configured to control the power transistor. A circuit is provided to detect polarity reversal with respect to the supply signal. A protection circuit for the low input current circuit operates to decouple the control circuit from the input node if the supply signal has the second polarity. A protection circuit for the high input current circuit operates to short-circuit the control electrode of the power transistor to the current path provided by the power transistor between the input node and the output node.Type: ApplicationFiled: August 29, 2019Publication date: March 5, 2020Applicant: STMicroelectronics S.r.l.Inventors: Manuela LA ROSA, Giovanni SICURELLA, Giuseppe MEOLA
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Publication number: 20190372579Abstract: A converter circuit is used to selectively convert an analog input voltage into a digital output signal or a digital input signal into an analog output voltage as a function of a mode signal. The converter circuit includes a control circuit configured to generate a start-of-conversion signal. A ramp generator is configured to, when the mode signal indicates an analog-to-digital conversion, generate a timer stop signal after a time interval that is determined as a function of the value of the analog input voltage, thereby implementing an analog-to-time conversion. When the mode signal indicates a digital-to-analog conversion, ramp generator is configured to vary the ramp signal until a ramp stop signal is set and, in response to the ramp stop signal, determine the analog output voltage as a function of the ramp signal, thereby implementing a time-to-analog conversion.Type: ApplicationFiled: May 24, 2019Publication date: December 5, 2019Inventors: Manuela La Rosa, Giovanni Sicurella
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Publication number: 20190253039Abstract: A voltage-to-time converter circuit receives a first voltage signal and produces a PWM-modulated signal having a duty-cycle proportional to the first voltage signal. A current integrator circuit receives the PWM-modulated signal from the voltage-to-time converter circuit block and produces an output signal by integrating a current signal from a current source over integration time intervals having a duration which is a function of the duty-cycle of the PWM-modulated signal. The current signal is proportional to a second voltage signal. The output signal is accordingly proportional to a product of the first voltage signal and the current signal, which is furthermore proportional to a product of the first voltage signal and the second voltage signal.Type: ApplicationFiled: February 13, 2019Publication date: August 15, 2019Applicant: STMicroelectronics S.r.l.Inventors: Giovanni SICURELLA, Manuela LA ROSA
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Publication number: 20180062376Abstract: A power stage in an electronic fuse circuit is driven by controller. The controller includes a first comparator set for output voltage control and a second comparator set for output current control. Each comparator set includes at least one comparator having a reference input, a feedback input, and one or more outputs. A driver circuit includes output terminals for driving the power stage. The driver circuit includes a switch that is selectively activated in response to outputs from the first and second comparator sets to clamp the voltage across the output terminals of the driver circuit. The clamp operation is made in response to feedback input to either of the first and second comparator sets having exceeded a certain reference.Type: ApplicationFiled: March 8, 2017Publication date: March 1, 2018Applicant: STMicroelectronics S.r.l.Inventors: Manuela La Rosa, Giovanni Sicurella
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Patent number: 9543360Abstract: A flexible sheet of organic polymer material, may include a monolithically fabricated array of one or more types of cells juxtaposed among them to form a multi-cell sheet. Each cell may include a self consistent, organic base integrated circuit, replicated in each cell of same type of the array, and shares, in common with other cells of same type, at least a conductor layer of either an electrical supply rail of the integrated circuit or of an input/output of the integrated circuit. A piece of the multi-cell, sheet including any number of self consistent integrated circuit cells, may be severed from the multi-cell sheet by cutting the sheet along intercell boundaries or straight lines, with a reduced affect on the operability of any cell spared by the cutting.Type: GrantFiled: June 16, 2014Date of Patent: January 10, 2017Assignee: STMICROELECTRONICS S.R.L.Inventor: Manuela La Rosa
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Publication number: 20140295585Abstract: A flexible sheet of organic polymer material, may include a monolithically fabricated array of one or more types of cells juxtaposed among them to form a multi-cell sheet. Each cell may include a self consistent, organic base integrated circuit, replicated in each cell of same type of the array, and shares, in common with other cells of same type, at least a conductor layer of either an electrical supply rail of the integrated circuit or of an input/output of the integrated circuit. A piece of the multi-cell, sheet including any number of self consistent integrated circuit cells, may be severed from the multi-cell sheet by cutting the sheet along intercell boundaries or straight lines, with a reduced affect on the operability of any cell spared by the cutting.Type: ApplicationFiled: June 16, 2014Publication date: October 2, 2014Inventor: MANUELA LA ROSA
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Patent number: 8830685Abstract: A flexible sheet of organic polymer material, may include a monolithically fabricated array of one or more types of cells juxtaposed among them to form a multi-cell sheet. Each cell may include a self consistent, organic base integrated circuit, replicated in each cell of same type of the array, and shares, in common with other cells of same type, at least a conductor layer of either an electrical supply rail of the integrated circuit or of an input/output of the integrated circuit. A piece of the multi-cell, sheet including any number of self consistent integrated circuit cells, may be severed from the multi-cell sheet by cutting the sheet along intercell boundaries or straight lines, with a reduced affect on the operability of any cell spared by the cutting.Type: GrantFiled: February 25, 2011Date of Patent: September 9, 2014Assignee: STMicroelectronics S.R.L.Inventor: Manuela La Rosa
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Patent number: 8459554Abstract: A monitoring device may include a core cell including a detection circuit, and a radio frequency (RF) tag antenna configured to exchange data with a data acquisition reader device, and a single-tier corolla having sensor cells around the core cell and covering a monitoring area. The sensor cells may be configured to convert a change of a parameter at the cell location. The detection circuit may be configured to detect a change in the parameter and location based upon excitation by the reader device.Type: GrantFiled: September 22, 2011Date of Patent: June 11, 2013Assignee: STMicroelectronics S.R.L.Inventors: Manuela La Rosa, Davide Giuseppe Patti
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Patent number: 8283657Abstract: A sensor and/or actuator system in which functional circuitry is embedded in an all organic electromechanical transducer device is disclosed. The electromechanical transducer device exploits the behavior of a flexible sensible ionomeric material sheet as effective sensing or actuating member sandwiched between flexible organic electrodes when undergoing a deformation or being polarized at a certain drive voltage applied to the, electrodes, respectively. The completely embedded all organic system is realized with a process exploiting relatively low cost deposition and patterning techniques. The enhanced flexibility makes the all organic device suitable for new applications in fields ranging from biomedical to aerospace industry.Type: GrantFiled: December 11, 2009Date of Patent: October 9, 2012Assignee: STMicroelectronics S.r.l.Inventors: Manuela La Rosa, Luigi Fortuna, Salvatore Graziani, Donata Rosaria Maria Nicolosi, Giovanni Sicurella
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Publication number: 20120132711Abstract: A monitoring device may include a core cell including a detection circuit, and a radio frequency (RF) tag antenna configured to exchange data with a data acquisition reader device, and a single-tier corolla having sensor cells around the core cell and covering a monitoring area. The sensor cells may be configured to convert a change of a parameter at the cell location. The detection circuit may be configured to detect a change in the parameter and location based upon excitation by the reader device.Type: ApplicationFiled: September 22, 2011Publication date: May 31, 2012Applicant: STMicroelectronics S.r.l.Inventors: Manuela LA ROSA, Davide Giuseppe Patti
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Publication number: 20110211316Abstract: A flexible sheet of organic polymer material, may include a monolithically fabricated array of one or more types of cells juxtaposed among them to form a multi-cell sheet. Each cell may include a self consistent, organic base integrated circuit, replicated in each cell of same type of the array, and shares, in common with other cells of same type, at least a conductor layer of either an electrical supply rail of the integrated circuit or of an input/output of the integrated circuit. A piece of the multi-cell, sheet including any number of self consistent integrated circuit cells, may be severed from the multi-cell sheet by cutting the sheet along intercell boundaries or straight lines, with a reduced affect on the operability of any cell spared by the cutting.Type: ApplicationFiled: February 25, 2011Publication date: September 1, 2011Applicant: STMicroelectronics S.r.l.Inventor: Manuela LA ROSA