Patents by Inventor Manuela Scognamiglio
Manuela Scognamiglio has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9971536Abstract: Various embodiments disclose a controller to manage memory devices. In an exemplary method, signals are exchanged with a host processor to allow the host processor to communicate with multiple memory devices in a memory stack as a single device, regardless of an actual number of memory devices within the memory stack. Power is provided to a single one of the multiple memory devices in the memory stack at a time to reduce power consumption. Other methods, apparatuses, and devices are also disclosed.Type: GrantFiled: February 13, 2017Date of Patent: May 15, 2018Assignee: Micron Technology, Inc.Inventors: Federico Tiziani, Giovanni Campardo, Massimo Iaculo, Claudio Giaccio, Manuela Scognamiglio, Danilo Caraccio, Ornella Vitale, Antonino Pollio
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Publication number: 20170160973Abstract: A single virtualized ECC NAND controller executes an ECC algorithm and manages a stack of NAND flash memories. The virtualized ECC NAND controller allows the host processor to drive the stack of flash memory devices as a single NAND chip while the controller redirects the data to the selected NAND memory device in the stack.Type: ApplicationFiled: February 13, 2017Publication date: June 8, 2017Inventors: Federico Tiziani, Giovanni Campardo, Massimo Iaculo, Claudio Giaccio, Manuela Scognamiglio, Danilo Caraccio, Ornella Vitale, Antonino Pollio
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Patent number: 9569129Abstract: Various embodiments disclose a controller to manage memory devices. In an exemplary method, signals are exchanged with a host processor to allow the host processor to communicate with a plurality of memory devices in a memory stack as a single device, regardless of an actual number of memory devices within the memory stack. Power is provided to a single one of the plurality of the memory devices in the memory stack at a time to reduce power consumption. Other methods, apparatuses, and devices are also disclosed.Type: GrantFiled: December 14, 2015Date of Patent: February 14, 2017Assignee: Micron Technology, Inc.Inventors: Federico Tiziani, Giovanni Campardo, Massimo Iaculo, Claudio Giaccio, Manuela Scognamiglio, Danilo Caraccio, Ornella Vitale, Antonino Pollio
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Publication number: 20160098223Abstract: A single virtualized ECC NAND controller executes an ECC algorithm and manages a stack of NAND flash memories. The virtualized ECC NAND controller allows the host processor to drive the stack of flash memory devices as a single NAND chip while the controller redirects the data to the selected NAND memory device in the stack.Type: ApplicationFiled: December 14, 2015Publication date: April 7, 2016Inventors: Federico Tiziani, Giovanni Campardo, Massimo Iaculo, Claudio Giaccio, Manuela Scognamiglio, Danilo Caraccio, Ornella Vitale, Antonino Pollio
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Patent number: 9213603Abstract: In various embodiments, a single virtualized error correcting code (ECC) NAND controller executes an ECC algorithm and manages a stack of NAND flash memories. The virtualized ECC NAND controller allows the host processor to drive the stack of flash memory devices as a single NAND chip while the controller redirects the data to the selected NAND memory device in the stack. In various embodiments, a controller manages a plurality of NAND memory devices. The controller provides power to a select one of the plurality of NAND memory devices at a time to conserve overall power consumption of the storage system.Type: GrantFiled: August 11, 2014Date of Patent: December 15, 2015Assignee: Micron Technology, Inc.Inventors: Federico Tiziani, Giovanni Campardo, Massimo Iaculo, Claudio Giaccio, Manuela Scognamiglio, Danilo Caraccio, Ornella Vitale, Antonino Pollio
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Patent number: 8984370Abstract: A system and method are disclosed in which a first non-volatile memory includes blocks that store data, and a second memory that stores error correction information related to the blocks storing the data. The first memory and the second memory are of different types.Type: GrantFiled: May 31, 2013Date of Patent: March 17, 2015Assignee: Micron Technology, Inc.Inventors: Giovanni Campardo, Stefano Corno, Gian Pietro Vanalli, Manuela Scognamiglio, Danilo Caraccio, Federico Tiziani, Massimiliano Magni, Andrea Ghilardelli
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Publication number: 20140351675Abstract: In various embodiments, a single virtualized error correcting code (ECC) NAND controller executes an ECC algorithm and manages a stack of NAND flash memories. The virtualized ECC NAND controller allows the host processor to drive the stack of flash memory devices as a single NAND chip while the controller redirects the data to the selected NAND memory device in the stack. In various embodiments, a controller manages a plurality of NAND memory devices. The controller provides power to a select one of the plurality of NAND memory devices at a time to conserve overall power consumption of the storage system.Type: ApplicationFiled: August 11, 2014Publication date: November 27, 2014Inventors: Federico Tiziani, Giovanni Campardo, Massimo Iaculo, Claudio Giaccio, Manuela Scognamiglio, Danilo Caraccio, Ornella Vitale, Antonino Pollio
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Patent number: 8880979Abstract: A method and system are disclosed in which a first non-volatile memory includes blocks that store data, and a second memory that stores overhead information related to the blocks storing the data. The amount of the second memory storing the overhead information related to the at least one block of the plurality of blocks is varied.Type: GrantFiled: May 31, 2013Date of Patent: November 4, 2014Assignee: Micron Technology, Inc.Inventors: Giovanni Campardo, Stefano Corno, Gian Pietro Vanalli, Manuela Scognamiglio, Danilo Caraccio, Federico Tiziani, Massimiliano Magni, Andrea Ghilardelli
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Patent number: 8806293Abstract: A single virtualized ECC NAND controller executes an ECC algorithm and manages a stack of NAND flash memories. The virtualized ECC NAND controller allows the host processor to drive the stack of flash memory devices as a single NAND chip while the controller redirects the data to the selected NAND memory device in the stack.Type: GrantFiled: October 9, 2008Date of Patent: August 12, 2014Assignee: Micron Technology, Inc.Inventors: Federico Tiziani, Giovanni Campardo, Massimo Iaculo, Claudio Giaccio, Manuela Scognamiglio, Danilo Caraccio, Ornella Vitale, Antonino Pollio
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Patent number: 8654563Abstract: Various embodiments comprise apparatuses and methods including a memory controller to control a non-volatile memory array. The memory controller includes a memory array interface coupled to the non-volatile memory array to perform reads and writes on the non-volatile memory array. An overwrite module is configured to write a desired bit value to a specific memory cell within the non-volatile memory array, after receiving the desired bit value and a logical address, regardless of an original value of the memory cell Additional apparatuses and methods are described.Type: GrantFiled: August 17, 2012Date of Patent: February 18, 2014Assignee: Micron Technology, Inc.Inventors: Emanuele Confalonieri, Manuela Scognamiglio, Federico Tiziani
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Publication number: 20130332800Abstract: A system and method are disclosed in which a first non-volatile memory includes blocks that store data, and a second memory that stores error correction information related to the blocks storing the data. The first memory and the second memory are of different types.Type: ApplicationFiled: May 31, 2013Publication date: December 12, 2013Applicant: Micron Technology, Inc.Inventors: Giovanni Campardo, Stefano Corno, Gian Pietro Vanalli, Manuela Scognamiglio, Danilo Caraccio, Federico Tiziani, Massimiliano Magni, Andrea Ghilardelli
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Publication number: 20130268825Abstract: A method and system are disclosed in which a first non-volatile memory includes blocks that store data, and a second memory that stores overhead information related to the blocks storing the data. The amount of the second memory storing the overhead information related to the at least one block of the plurality of blocks is varied.Type: ApplicationFiled: May 31, 2013Publication date: October 10, 2013Inventors: Giovanni Campardo, Stefano Corno, Gian Pietro Vanalli, Manuela Scognamiglio, Danilo Caraccio, Frederico Tiziani, Massimiliano Magni, Andrea Ghilardelli
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Patent number: 8458562Abstract: Embodiments for providing improved reliability or extended life for a non-volatile memory component may comprise a secondary non-volatile memory component to store error correction information, for example.Type: GrantFiled: December 30, 2008Date of Patent: June 4, 2013Assignee: Micron Technology, Inc.Inventors: Giovanni Campardo, Stefano Corno, Gian Pietro Vanalli, Manuela Scognamiglio, Danilo Caraccio, Federico Tiziani, Massimiliano Magni, Andrea Ghilardelli
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Publication number: 20120317347Abstract: Various embodiments comprise apparatuses and methods including a memory controller to control a non-volatile memory array. The memory controller includes a memory array interface coupled to the non-volatile memory array to perform reads and writes on the non-volatile memory array. An overwrite module is configured to write a desired bit value to a specific memory cell within the non-volatile memory array, after receiving the desired bit value and a logical address, regardless of an original value of the memory cell Additional apparatuses and methods are described.Type: ApplicationFiled: August 17, 2012Publication date: December 13, 2012Inventors: Emanuele Confalonieri, Manuela Scognamiglio, Federico Tiziani
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Patent number: 8250282Abstract: A memory controller for a phase change memory (PCM) that can be used on a storage bus interface is described. In one example, the memory controller includes an external bus interface coupled to an external bus to communicate read and write instructions with an external device, a memory array interface coupled to a memory array to perform reads and writes on a memory array, and an overwrite module to write a desired value to a desired address of the memory array.Type: GrantFiled: May 14, 2009Date of Patent: August 21, 2012Assignee: Micron Technology, Inc.Inventors: Emanuele Confalonieri, Manuela Scognamiglio, Federico Tiziani
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Publication number: 20110307762Abstract: A single virtualized ECC NAND controller executes an ECC algorithm and manages a stack of NAND flash memories. The virtualized ECC NAND controller allows the host processor to drive the stack of flash memory devices as a single NAND chip while the controller redirects the data to the selected NAND memory device in the stack.Type: ApplicationFiled: October 9, 2008Publication date: December 15, 2011Inventors: Federico Tiziani, Giovanni Campardo, Massimo Iaculo, Claudio Giaccio, Manuela Scognamiglio, Danilo Caraccio, Ornella Vitale, Antonino Pollio
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Publication number: 20100293317Abstract: A memory controller for a phase change memory (PCM) that can be used on a storage bus interface is described. In one example, the memory controller includes an external bus interface coupled to an external bus to communicate read and write instructions with an external device, a memory array interface coupled to a memory array to perform reads and writes on a memory array, and an overwrite module to write a desired value to a desired address of the memory array.Type: ApplicationFiled: May 14, 2009Publication date: November 18, 2010Inventors: EMANUELE CONFALONIERI, Manuela Scognamiglio, Pederico Tiziani