Patents by Inventor Marc Vanden Bossche
Marc Vanden Bossche has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11933848Abstract: In a measurement system, a signal probing circuit may provide probed signals by probing voltages and currents and/or incident and reflected waves at a port of a device under test (DUT). A multi-channel receiver structure may include receivers that receive two probed signals from the signal probing hardware circuit, each receiver having its own sample clock derived from a master clock and further having a respective digitizer for digitizing a corresponding one of the two probed signals. A synchronization block, external to the receivers and including a reference clock derived from the master clock, may enable the two probed signals to be phase coherently digitized across the receivers by synchronizing the respective sample clocks of the receivers while the reference clock is being shared with the receivers. A signal processing circuit may then process the phase coherently digitized probed signals.Type: GrantFiled: April 19, 2023Date of Patent: March 19, 2024Assignee: National Instruments Ireland Resources LimitedInventor: Marc Vanden Bossche
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Publication number: 20230251312Abstract: In a measurement system, a signal probing circuit may provide probed signals by probing voltages and currents and/or incident and reflected waves at a port of a device under test (DUT). A multi-channel receiver structure may include receivers that receive two probed signals from the signal probing hardware circuit, each receiver having its own sample clock derived from a master clock and further having a respective digitizer for digitizing a corresponding one of the two probed signals. A synchronization block, external to the receivers and including a reference clock derived from the master clock, may enable the two probed signals to be phase coherently digitized across the receivers by synchronizing the respective sample clocks of the receivers while the reference clock is being shared with the receivers. A signal processing circuit may then process the phase coherently digitized probed signals.Type: ApplicationFiled: April 19, 2023Publication date: August 10, 2023Inventor: Marc Vanden Bossche
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Publication number: 20230160936Abstract: A system and method for testing devices such as integrated circuits (IC) with integrated antenna arrays configured for wireless signal reception. The method performs a calibration operation on a reference device under test (DUT). During the calibration operation, the DUT receives a series of first signals from a first far-field (FF) location and a series of array transmissions from a second near-field (NF) location using different beamforming settings, and determines therefrom a set of calibration parameters. The calibration parameters may be used by a probe antenna system (PAS) to transmit an array transmission to the DUT from the second NF location to emulate a single probe or multi-probe transmission from the first FF location.Type: ApplicationFiled: November 22, 2021Publication date: May 25, 2023Inventors: Martin Obermaier, Martin Laabs, Dirk Plettemeier, Marc Vanden Bossche, Thomas Deckert, Vincent Kotzsch, Johannes Dietmar Herbert Lange
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Patent number: 11644505Abstract: In a measurement system, a signal probing circuit may provide probed signals by probing voltages and currents and/or incident and reflected waves at a port of a device under test (DUT). A multi-channel receiver structure may include receivers that receive two probed signals from the signal probing hardware circuit, each receiver having its own sample clock derived from a master clock and further having a respective digitizer for digitizing a corresponding one of the two probed signals. A synchronization block, external to the receivers and including a reference clock derived from the master clock, may enable the two probed signals to be phase coherently digitized across the receivers by synchronizing the respective sample clocks of the receivers while the reference clock is being shared with the receivers. A signal processing circuit may then process the phase coherently digitized probed signals.Type: GrantFiled: January 20, 2022Date of Patent: May 9, 2023Assignee: National Instruments Ireland Resources LimitedInventor: Marc Vanden Bossche
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Patent number: 11515950Abstract: A system and method for testing (e.g., rapidly and inexpensively) devices such as integrated circuits (IC) with integrated antennas configured for millimeter wave transmission and/or reception. The method may first perform a calibration operation on a reference device under test (DUT). The calibration operation may determine a set of reference DUT FF base functions and may also generate a set of calibration coefficients. After the calibration step using the reference DUT, the resulting reference DUT FF base functions and the calibration coefficients (or reconstruction matrix) may be used in determining far-field patterns of DUTs based on other field measurements, e.g., measurements taken in the near field of the DUT.Type: GrantFiled: September 1, 2021Date of Patent: November 29, 2022Assignee: National Instruments CorporationInventors: Martin Laabs, Dirk Plettemeier, Thomas Deckert, Johannes Dietmar Herbert Lange, Marc Vanden Bossche
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Publication number: 20220229110Abstract: In a measurement system, a signal probing circuit may provide probed signals by probing voltages and currents and/or incident and reflected waves at a port of a device under test (DUT). A multi-channel receiver structure may include receivers that receive two probed signals from the signal probing hardware circuit, each receiver having its own sample clock derived from a master clock and further having a respective digitizer for digitizing a corresponding one of the two probed signals. A synchronization block, external to the receivers and including a reference clock derived from the master clock, may enable the two probed signals to be phase coherently digitized across the receivers by synchronizing the respective sample clocks of the receivers while the reference clock is being shared with the receivers. A signal processing circuit may then process the phase coherently digitized probed signals.Type: ApplicationFiled: January 20, 2022Publication date: July 21, 2022Inventor: Marc Vanden Bossche
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Publication number: 20220077938Abstract: A system and method for testing (e.g., rapidly and inexpensively) devices such as integrated circuits (IC) with integrated antennas configured for millimeter wave transmission and/or reception. The method may first perform a calibration operation on a reference device under test (DUT). The calibration operation may determine a set of reference DUT FF base functions and may also generate a set of calibration coefficients. After the calibration step using the reference DUT, the resulting reference DUT FF base functions and the calibration coefficients (or reconstruction matrix) may be used in determining far-field patterns of DUTs based on other field measurements, e.g., measurements taken in the near field of the DUT.Type: ApplicationFiled: September 1, 2021Publication date: March 10, 2022Inventors: Martin Laabs, Dirk Plettemeier, Thomas Deckert, Johannes Dietmar Herbert Lange, Marc Vanden Bossche
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Patent number: 10393781Abstract: The present invention relates to a system for impedance generation comprising impedance generation means arranged for receiving an input clock signal and for generating at least one parameter at a frequency derived from the input clock signal, impedance tuning means arranged for receiving the at least one parameter, for synthesizing an impedance based on the received at least one parameter and for outputting the synthesized impedance to a device under test.Type: GrantFiled: July 29, 2014Date of Patent: August 27, 2019Assignee: National Instruments Ireland Resources LimitedInventor: Marc Vanden Bossche
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Patent number: 9804226Abstract: An impedance control device for tuning a device under test comprising: a first terminal port arranged for connecting a device under test, a second terminal port arranged for connecting a termination, a first signal path for a signal travelling between the first and the second terminal port, first coupling means arranged for picking up a part of the signal travelling in the first signal path, a second signal path arranged for receiving the part of the signal from the first coupling means, said second signal path comprising a correction circuit for adapting as a function of frequency the amplitude and phase of the received part of the signal, second coupling means arranged for coupling back into the first signal path an adapted signal outputted by the correction circuit, and an attenuator and phase shifter for applying attenuation and phase shifting on the signals travelling between the first and the second terminal port.Type: GrantFiled: October 14, 2013Date of Patent: October 31, 2017Assignee: NATIONAL INSTRUMENTS IRELAND RESOURCES LIMITEDInventor: Marc Vanden Bossche
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Patent number: 9791484Abstract: The present invention relates to a method for calibrating a receiver device or a stimulus-response system comprising a receiver device. The method comprises the steps of generating at least one tone with a repeatable and known phase value, said at least one tone being stepped in frequency to cover a given set of calibration tones, and applying the at least one tone to the receiver device or to the stimulus-response system, generating a reference signal, which is phase-coherent with the at least one tone, to measure in a phase-coherent way with the receiver device or with the stimulus-response system the at least one tone, measuring at least the phase of the at least one tone using the receiver device or the stimulus-response system, determining at least phase-related information for calibration coefficients at the given set of calibration tones by calculating a phase deviation of the measured phase from the known phase value of the at least one tone.Type: GrantFiled: February 11, 2013Date of Patent: October 17, 2017Assignee: National Instruments Ireland Resources LimitedInventors: Guillaume Pailloncy, Marc Vanden Bossche, Frans Verbeyst
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Patent number: 9651599Abstract: The present invention relates to a measurement system for characterizing a device under test (DUT) wherein impedance is controlled or varied over a set of measurement conditions and a parameter or a set of parameters measured for each measurement condition. The measurement system comprises at least one impedance control device, signal separation hardware connected with the impedance control device, receiving means for measuring electrical quantities related to characteristics of the DUT and for converting the measured electrical quantities, a data processing unit connected to the receiving means and adapted to provide characteristics of the device under test based on the converted electrical quantities, whereby the at least one impedance control device is integrated into the signal separation hardware.Type: GrantFiled: August 7, 2012Date of Patent: May 16, 2017Assignee: NATIONAL INSTRUMENTS IRELAND RESOURCES LIMITEDInventor: Marc Vanden Bossche
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Patent number: 9581630Abstract: A method for calibrating a vector network analyzer may include performing a first set of measurements on a first port of a plurality of ports and determining error coefficients for the first port. The error coefficients may be used to obtain a first calibrated port. For an uncalibrated port of the plurality of ports, a connection via a known through between an already calibrated port and the uncalibrated port may be established and a first signal from a first signal source may be applied to the calibrated port and a second signal form a second signal source may be applied to the uncalibrated port. A further set of measurements with respect to the uncalibrated port may be performed and error coefficients may be determined for the uncalibrated port based on the further set of measurements and relation to error coefficients of the calibrated port.Type: GrantFiled: February 14, 2014Date of Patent: February 28, 2017Assignee: NATIONAL INSTRUMENTS CORPORATIONInventors: Frans Verbeyst, Marc Vanden Bossche
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Patent number: 9419784Abstract: The present invention relates to a system for calibrating and for synchronizing a receiver. The system is arranged for receiving a reference clock signal in a first and a second signal path and comprises generator means for generating in the first signal path a first plurality of phase coherent tones derived from said reference clock signal and for generating in the second signal path a second plurality of phase coherent tones derived from said reference clock signal, said second plurality of phase-coherent tones being at lower frequencies than said first plurality of phase-coherent tones, and gating means for gating said first plurality of phase coherent tones by said second plurality of phase-coherent tones, such that the phase-coherent tones of said second signal path appear in a distorted version around tones of said plurality of phase-coherent tone of said first signal path, and for outputting a resulting gated signal.Type: GrantFiled: October 7, 2013Date of Patent: August 16, 2016Assignee: National Instruments Ireland Resources LimitedInventor: Marc Vanden Bossche
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Patent number: 9413404Abstract: The present invention relates to a method for characterizing at a given frequency reflected waves of a frequency translating device having at least two ports, whereby information is available on the phase of a local oscillator driving the frequency translating device.Type: GrantFiled: February 28, 2013Date of Patent: August 9, 2016Assignee: National Instruments Ireland Resources LimitedInventor: Marc Vanden Bossche
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Publication number: 20160139189Abstract: The present invention relates to a system for impedance generation comprising impedance generation means arranged for receiving an input clock signal and for generating at least one parameter at a frequency derived from the input clock signal, impedance tuning means arranged for receiving the at least one parameter, for synthesizing an impedance based on the received at least one parameter and for outputting the synthesized impedance to a device under test.Type: ApplicationFiled: July 29, 2014Publication date: May 19, 2016Inventor: Marc Vanden Bossche
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Publication number: 20150280899Abstract: The present invention relates to a system for calibrating and for synchronizing a receiver. The system is arranged for receiving a reference clock signal in a first and a second signal path and comprises generator means for generating in the first signal path a first plurality of phase coherent tones derived from said reference clock signal and for generating in the second signal path a second plurality of phase coherent tones derived from said reference clock signal, said second plurality of phase-coherent tones being at lower frequencies than said first plurality of phase-coherent tones, and gating means for gating said first plurality of phase coherent tones by said second plurality of phase-coherent tones, such that the phase-coherent tones of said second signal path appear in a distorted version around tones of said plurality of phase-coherent tone of said first signal path, and for outputting a resulting gated signal.Type: ApplicationFiled: October 7, 2013Publication date: October 1, 2015Inventor: Marc Vanden Bossche
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Publication number: 20150056938Abstract: The present invention relates to a method for characterizing at a given frequency reflected waves of a frequency translating device having at least two ports, whereby information is available on the phase of a local oscillator driving the frequency translating device.Type: ApplicationFiled: February 28, 2013Publication date: February 26, 2015Inventor: Marc Vanden Bossche
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Publication number: 20140368216Abstract: The present invention relates to a method for calibrating a receiver device or a stimulus-response system comprising a receiver device. The method comprises the steps of generating at least one tone with a repeatable and known phase value, said at least one tone being stepped in frequency to cover a given set of calibration tones, and applying the at least one tone to the receiver device or to the stimulus-response system, generating a reference signal, which is phase-coherent with the at least one tone, to measure in a phase-coherent way with the receiver device or with the stimulus-response system the at least one tone, measuring at least the phase of the at least one tone using the receiver device or the stimulus-response system, determining at least phase-related information for calibration coefficients at the given set of calibration tones by calculating a phase deviation of the measured phase from the known phase value of the at least one tone.Type: ApplicationFiled: February 11, 2013Publication date: December 18, 2014Inventors: Guillaume Pailloncy, Marc Vanden Bossche, Frans Verbeyst
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Patent number: 8891639Abstract: The present invention is related to a system (1) for determining a representation of a multi-tone signal (2) comprising a plurality of phase coherent tones, at least two of said phase coherent tones being modulated by a modulating signal, said system comprising an input (3) for applying the multi-tone signal (2), phase coherent mixing means (5) for demodulation in connection with data acquisition means (6) for digitization, said mixing means and data acquisition means arranged for being fed with the multi-tone signal and with a reference signal (8) comprising said phase coherent tones, each pair of phase coherent tones having a fixed phase difference, whereby the data acquisition means is arranged for being triggered by a trigger signal (4) for yielding a representation of said modulation signals with fixed delay, processing means (7) arranged for receiving digital signals output from the data acquisition means and for comparing phase information of a downconverted tone of the multi-tone signal after demodulaType: GrantFiled: June 14, 2010Date of Patent: November 18, 2014Assignee: National Instruments Ireland Resources LimitedInventor: Marc Vanden Bossche
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Publication number: 20140236517Abstract: A method for calibrating a vector network analyzer may include performing a first set of measurements on a first port of a plurality of ports and determining error coefficients for the first port. The error coefficients may be used to obtain a first calibrated port. For an uncalibrated port of the plurality of ports, a connection via a known through between an already calibrated port and the uncalibrated port may be established and a first signal from a first signal source may be applied to the calibrated port and a second signal form a second signal source may be applied to the uncalibrated port. A further set of measurements with respect to the uncalibrated port may be performed and error coefficients may be determined for the uncalibrated port based on the further set of measurements and relation to error coefficients of the calibrated port.Type: ApplicationFiled: February 14, 2014Publication date: August 21, 2014Applicant: NATIONAL INSTRUMENTS CORPORATIONInventors: Frans VERBEYST, Marc VANDEN BOSSCHE