Abstract: An electronic device comprising a semiconductor chip which comprises a plurality of structures formed in the semiconductor chip, wherein the semiconductor chip is a member of a set of semiconductor chips, the set of semiconductor chips comprises a plurality of subsets of semiconductor chips, and the semiconductor chip is a member of only one of the subsets. The plurality of structures of the semiconductor chip includes a set of common structures which is the same for all of the semiconductor chips of the set, and a set of non-common structures, wherein the non-common structures of the semiconductor chip of the subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a first portion of the non-common structures and a first portion of the common structures form a first non-common circuit, wherein the first non-common circuit of the semiconductor chips of each subset is different from a non-common circuit of the semiconductor chips in every other subset.

Abstract: An electronic device comprising a semiconductor chip which comprises a plurality of structures formed in the semiconductor chip, wherein the semiconductor chip is a member of a set of semiconductor chips, the set of semiconductor chips comprises a plurality of subsets of semiconductor chips, and the semiconductor chip is a member of only one of the subsets. The plurality of structures of the semiconductor chip includes a set of common structures which is the same for all of the semiconductor chips of the set, and a set of non-common structures, wherein the non-common structures of the semiconductor chip of the subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a first portion of the non-common structures and a first portion of the common structures form a first non-common circuit, wherein the first non-common circuit of the semiconductor chips of each subset is different from a non-common circuit of the semiconductor chips in every other subset.

Abstract: A method for making a semiconductor memory device comprising a plurality of memory cells for storing one or more data values, the method comprising; exposing a pattern on a wafer for creating structures for a plurality of memory cells for the semiconductor memory device, wherein the pattern is exposed by means of one or more charged particle beams; and varying an exposure dose of the one or more charged particle beams during exposure of the pattern to generate a set of one or more non-common features in one or more structures of at least one of the memory cells, so that the structures of the at least one memory cell differ from the corresponding structures of other memory cells of the semiconductor memory device.

Abstract: A method for making a semiconductor memory device comprising a plurality of memory cells for storing one or more data values, the method comprising: exposing a pattern on a wafer for creating structures for a plurality of memory cells for the semiconductor memory device, wherein the pattern is exposed by means of one or more charged particle beams; and varying an exposure dose of the one or more charged particle beams during exposure of the pattern to generate a set of one or more non-common features in one or more structures of at least one of the memory cells, so that the structures of the at least one memory cell differ from the corresponding structures of other memory cells of the semiconductor memory device.

Abstract: A method of creating electronic devices such as semiconductor chips using a maskless lithographic exposure system such as a charged particle multi-beamlet lithography system (301A-301D). The maskless lithographic exposure system comprises a lithography subsystem (316) including a maskless pattern writer such as a charged particle multi-beamlet lithography machine (1) or ebeam machine. The method comprises introducing unique chip design data (430) or information related thereto into pattern data comprising common chip design data before streaming the pattern data to the maskless pattern writer.

Abstract: Method of manufacturing electronic devices using a maskless lithographic exposure system using a maskless pattern writer. The method comprises generating beamlet control data for controlling the maskless pattern writer to expose a wafer for creation of the electronic devices, wherein the beamlet control data is generated based on a feature data set defining features selectable for individualizing the electronic devices, wherein exposure of the wafer according to the beamlet control data results in exposing a pattern having a different selection of the features from the feature data set for different subsets of the electronic devices.

Abstract: A method of creating electronic devices such as semiconductor chips using a maskless lithographic exposure system such as a charged particle multi-beamlet lithography system (301A-301D). The maskless lithographic exposure system comprises a lithography subsystem (316) including a maskless pattern writer such as a charged particle multi-beamlet lithography machine (1) or ebeam machine. The method comprises introducing unique chip design data (430) or information related thereto into pattern data comprising common chip design data before streaming the pattern data to the maskless pattern writer.

Abstract: An electronic device comprising a semiconductor chip which comprises a plurality of structures formed in the semiconductor chip, wherein the semiconductor chip is a member of a set of semiconductor chips, the set of semiconductor chips comprises a plurality of subsets of semiconductor chips, and the semiconductor chip is a member of only one of the subsets. The plurality of structures of the semiconductor chip includes a set of common structures which is the same for all of the semiconductor chips of the set, and a set of non-common structures, wherein the non-common structures of the semiconductor chip of the subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a first portion of the non-common structures and a first portion of the common structures form a first non-common circuit, wherein the first non-common circuit of the semiconductor chips of each subset is different from a non-common circuit of the semiconductor chips in every other subset.

Abstract: An electronic device comprising a semiconductor chip which comprises a plurality of structures formed in the semiconductor chip, wherein the semiconductor chip is a member of a set of semiconductor chips, the set of semiconductor chips comprises a plurality of subsets of semiconductor chips, and the semiconductor chip is a member of only one of the subsets. The plurality of structures of the semiconductor chip includes a set of common structures which is the same for all of the semiconductor chips of the set, and a set of non-common structures, wherein the non-common structures of the semiconductor chip of the subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a first portion of the non-common structures and a first portion of the common structures form a first non-common circuit, wherein the first non--common circuit of the semiconductor chips of each subset is different from a non-common circuit of the semiconductor chips in every other subset.

Abstract: An electronic device comprising a semiconductor chip which comprises a plurality of structures formed in the semiconductor chip, wherein the semiconductor chip is a member of a set of semiconductor chips, the set of semiconductor chips comprises a plurality of subsets of semiconductor chips, and the semiconductor chip is a member of only one of the subsets. The plurality of structures of the semiconductor chip includes a set of common structures which is the same for all of the semiconductor chips of the set, and a set of non-common structures, wherein the non-common structures of the semiconductor chip of the subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a first portion of the non-common structures and a first portion of the common structures form a first non-common circuit, wherein the first non-common circuit of the semiconductor chips of each subset is different from a non-common circuit of the semiconductor chips in every other subset.

Abstract: Method of manufacturing electronic devices using a maskless lithographic exposure system using a maskless pattern writer. The method comprises generating beamlet control data for controlling the maskless pattern writer to expose a wafer for creation of the electronic devices, wherein the beamlet control data is generated based on a feature data set defining features selectable for individualizing the electronic devices, wherein exposure of the wafer according to the beamlet control data results in exposing a pattern having a different selection of the features from the feature data set for different subsets of the electronic devices.

Abstract: A method for making a semiconductor memory device comprising a plurality of memory cells for storing one or more data values, the method comprising: exposing a pattern on a wafer for creating structures for a plurality of memory cells for the semiconductor memory device, wherein the pattern is exposed by means of one or more charged particle beams; and varying an exposure dose of the one or more charged particle beams during exposure of the pattern to generate a set of one or more non-common features in one or more structures of at least one of the memory cells, so that the structures of the at least one memory cell differ from the corresponding structures of other memory cells of the semiconductor memory device.

Abstract: An electronic device comprising a semiconductor chip which comprises a plurality of structures formed in the semiconductor chip, wherein the semiconductor chip is a member of a set of semiconductor chips, the set of semiconductor chips comprises a plurality of subsets of semiconductor chips, and the semiconductor chip is a member of only one of the subsets. The plurality of structures of the semiconductor chip includes a set of common structures which is the same for all of the semiconductor chips of the set, and a set of non-common structures, wherein the non-common structures of the semiconductor chip of the subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a first portion of the non-common structures and a first portion of the common structures form a first non-common circuit, wherein the first non-common circuit of the semiconductor chips of each subset is different from a non-common circuit of the semiconductor chips in every other subset.

Abstract: Method of manufacturing electronic devices using a maskless lithographic exposure system using a maskless pattern writer. The method comprises generating beamlet control data for controlling the maskless pattern writer to expose a wafer for creation of the electronic devices, wherein the beamlet control data is generated based on a feature data set defining features selectable for individualizing the electronic devices, wherein exposure of the wafer according to the beamlet control data results in exposing a pattern having a different selection of the features from the feature data set for different subsets of the electronic devices.

Abstract: Method of manufacturing electronic devices using a maskless lithographic exposure system using a maskless pattern writer. The method comprises generating beamlet control data for controlling the maskless pattern writer to expose a wafer for creation of the electronic devices, wherein the beamlet control data is generated based on a feature data set defining features selectable for individualizing the electronic devices, wherein exposure of the wafer according to the beamlet control data results in exposing a pattern having a different selection of the features from the feature data set for different subsets of the electronic devices.

Abstract: An electronic device comprising a semiconductor chip which comprises a plurality of structures formed in the semiconductor chip, wherein the semiconductor chip is a member of a set of semiconductor chips, the set of semiconductor chips comprises a plurality of subsets of semiconductor chips, and the semiconductor chip is a member of only one of the subsets. The plurality of structures of the semiconductor chip includes a set of common structures which is the same for all of the semiconductor chips of the set, and a set of non-common structures, wherein the non-common structures of the semiconductor chip of the subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a first portion of the non-common structures and a first portion of the common structures form a first non-common circuit, wherein the first non-common circuit of the semiconductor chips of each subset is different from a non-common circuit of the semiconductor chips in every other subset.

Abstract: Method of manufacturing electronic devices using a maskless lithographic exposure system using a maskless pattern writer. The method comprises generating beamlet control data for controlling the maskless pattern writer to expose a wafer for creation of the electronic devices, wherein the beamlet control data is generated based on a feature data set defining features selectable for individualizing the electronic devices, wherein exposure of the wafer according to the beamlet control data results in exposing a pattern having a different selection of the features from the feature data set for different subsets of the electronic devices.

Abstract: A method of creating electronic devices such as semiconductor chips using a maskless lithographic exposure system such as a charged particle multi-beamlet lithography system (301A-301D). The maskless lithographic exposure system comprises a lithography subsystem (316) including a maskless pattern writer such as a charged particle multi-beamlet lithography machine (1) or ebeam machine. The method comprises introducing unique chip design data (430) or information related thereto into pattern data comprising common chip design data before streaming the pattern data to the maskless pattern writer.

Abstract: Method of manufacturing electronic devices using a maskless lithographic exposure system using a maskless pattern writer, wherein beamlet control data is generated for controlling the maskless pattern writer to expose a wafer for creation of the electronic devices. The beamlet control data is generated based on design layout data defining a plurality of structures, such as vias, for the electronic devices to be manufactured from the wafer, and selection data defining which of the structures of the design layout data are applicable for each electronic device to be manufactured from the wafer, the selection data defining a different set of the structures for different subsets of the electronic devices. Exposure of the wafer according to the beamlet control data results in exposing a pattern having a different set of the structures for different subsets of the electronic devices.

Abstract: An apparatus for transferring a target, such as a substrate or a substrate support structure onto which a substrate has been clamped, from a substrate transfer system to a vacuum chamber of a lithography system. The apparatus comprises a load lock chamber for transferring the target into and out of the vacuum chamber. The load lock chamber comprises a first wall with a first passage providing access between a robot space and the interior of the load lock chamber, a second wall with a second passage providing access between the interior of the load lock chamber and the vacuum chamber, and plurality of handling robots for transferring the targets comprising: a first handling robot movable within the robot space to access the substrate transfer system and the first passage; and a second handling robot movable within the load lock chamber to access the first passage and the second passage.