Abstract: Embodiments herein describe a photonic chip which includes a coupling interface for evanescently coupling the chip to a waveguide on an external substrate. In one embodiment, the photonic chip includes a tapered waveguide that aligns with a tapered waveguide on the external substrate. The respective tapers of the two waveguides are inverted such that as the width of the waveguide in the photonic chip decreases, the width of the waveguide on the external substrate increases. In one embodiment, these two waveguides form an adiabatic structure where the optical signal transfers between the waveguides with minimal or no coupling of the optical signal to other non-intended modes. Using the two waveguides, optical signals can be transmitted between the photonic chip and the external substrate.

Abstract: Embodiments herein describe a photonic chip which includes a coupling interface for evanescently coupling the chip to a waveguide on an external substrate. In one embodiment, the photonic chip includes a tapered waveguide that aligns with a tapered waveguide on the external substrate. The respective tapers of the two waveguides are inverted such that as the width of the waveguide in the photonic chip decreases, the width of the waveguide on the external substrate increases. In one embodiment, these two waveguides form an adiabatic structure where the optical signal transfers between the waveguides with minimal or no coupling of the optical signal to other non-intended modes. Using the two waveguides, optical signals can be transmitted between the photonic chip and the external substrate.

Abstract: The embodiments herein describe a photonic chip (formed from a SOI structure) which includes an optical interface for coupling the optical components in the photonic chip to an external optical device. In one embodiment, the optical interface is formed on a separate substrate which is later joined to the photonic chip. Through oxide vias (TOVs) and through silicon vias (TSVs) can be used to electrically couple the optical components in the photonic chip to external integrated circuits or amplifiers. In one embodiment, after the separate wafer is bonded to the photonic chip, a TOV is formed in the photonic chip to electrically connect metal routing layers coupled to the optical components in the photonic chip to a TSV in the separate wafer. For example, the TOV may extend across a wafer bonding interface where the two substrates where bonded to form an electrical connection with the TSV.

Abstract: An optical demultiplexer that includes at least one a hybrid phase shifter configured to receive a light signal over a fiber element, the light signal including polarized optical signals. Each phase shifter includes a thermo-optic phase shifter configured to phase shift the light signal, an electro-optic phase shifter configured to phase shift the light signal, and a coupler configured to maintain polarization of the polarized signal components. The optical demultiplexer also includes control circuitry configured to regulate the thermo-optic and electro-optic phase shifters.

Abstract: An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. When a voltage potential is created between the lower and upper waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) guide that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. In one embodiment, at least one of the waveguides includes a respective ridge portion aligned at a charge modulation region which may aid in confining the optical mode laterally (e.g., in the width direction) in the optical modulator. In another embodiment, ridge portions may be formed on both the lower and the upper waveguides. These ridge portions may be aligned in a vertical direction (e.g., a thickness direction) so that ridges overlap which may further improve optical efficiency by centering an optical mode in the charge modulation region.

Abstract: An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. When a voltage potential is created between the lower and upper waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) guide that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. In one embodiment, at least one of the waveguides includes a respective ridge portion aligned at a charge modulation region which may aid in confining the optical mode laterally (e.g., in the width direction) in the optical modulator. In another embodiment, ridge portions may be formed on both the lower and the upper waveguides. These ridge portions may be aligned in a vertical direction (e.g., a thickness direction) so that ridges overlap which may further improve optical efficiency by centering an optical mode in the charge modulation region.

Abstract: An optical demultiplexer that includes at least one a hybrid phase shifter configured to receive a light signal over a fiber element, the light signal including polarized optical signals. Each phase shifter includes a thermo-optic phase shifter configured to phase shift the light signal, an electro-optic phase shifter configured to phase shift the light signal, and a coupler configured to maintain polarization of the polarized signal components. The optical demultiplexer also includes control circuitry configured to regulate the thermo-optic and electro-optic phase shifters.

Abstract: A SOI device may include a waveguide adapter that couples light between an external light source—e.g., a fiber optic cable or laser—and a silicon waveguide on the silicon surface layer of the SOI device. In one embodiment, the waveguide adapter is embedded into the insulator layer. Doing so may enable the waveguide adapter to be formed before the surface layer components are added onto the SOI device. Accordingly, fabrication techniques that use high-temperatures may be used without harming other components in the SOI device—e.g., the waveguide adapter is formed before heat-sensitive components are added to the silicon surface layer.

Abstract: The embodiments herein describe a photonic chip (formed from a SOI structure) which includes an optical interface for coupling the optical components in the photonic chip to an external optical device. In one embodiment, the optical interface is formed on a separate substrate which is later joined to the photonic chip. Through oxide vias (TOVs) and through silicon vias (TSVs) can be used to electrically couple the optical components in the photonic chip to external integrated circuits or amplifiers. In one embodiment, after the separate wafer is bonded to the photonic chip, a TOV is formed in the photonic chip to electrically connect metal routing layers coupled to the optical components in the photonic chip to a TSV in the separate wafer. For example, the TOV may extend across a wafer bonding interface where the two substrates where bonded to form an electrical connection with the TSV.

Abstract: Embodiments herein describe a photonic chip which includes a coupling interface for evanescently coupling the chip to a waveguide on an external substrate. In one embodiment, the photonic chip includes a tapered waveguide that aligns with a tapered waveguide on the external substrate. The respective tapers of the two waveguides are inverted such that as the width of the waveguide in the photonic chip decreases, the width of the waveguide on the external substrate increases. In one embodiment, these two waveguides form an adiabatic structure where the optical signal transfers between the waveguides with minimal or no coupling of the optical signal to other non-intended modes. Using the two waveguides, optical signals can be transmitted between the photonic chip and the external substrate.

Abstract: A SOI device may include a waveguide adapter that couples light between an external light source—e.g., a fiber optic cable or laser—and a silicon waveguide on the silicon surface layer of the SOI device. In one embodiment, the waveguide adapter is embedded into the insulator layer. Doing so may enable the waveguide adapter to be formed before the surface layer components are added onto the SOI device. Accordingly, fabrication techniques that use high-temperatures may be used without harming other components in the SOI device—e.g., the waveguide adapter is formed before heat-sensitive components are added to the silicon surface layer.

Abstract: Embodiments herein describe disposing a waveguide adapter onto an SOI device after the components on a silicon surface layer have been formed. That is, the waveguide adapter is disposed above optical components (e.g., optical modulators, detectors, waveguides, etc) formed in a surface layer. In one embodiment, a waveguide in a bottom layer of the waveguide adapter overlaps a silicon waveguide in the surface layer such that the silicon waveguide and the waveguide in the bottom layer are optically coupled. The waveguide adapter also includes other layers above the bottom layer (e.g., middle and top layers) that also contain waveguides which form an adiabatic optical system for transmitting an optical signal. At least one of the waveguides in the multi-layer adapter is exposed at an optical interface of the SOI device, thereby permitting the SOI device to transmit optical signals to, or receive optical signals from, an external optical component.

Abstract: A moving floor system that includes a moving work surface to move work products from an upstream end to a downstream end. The moving work surface is formed from a plurality of individual carts joined to each other. The stack of carts is moved along upper support rails located at an upper level. When each individual cart reaches the downstream end, a downstream lift conveyor moves the individual cart from the upper level to a lower level. When at the lower level, each individual cart is returned from the downstream end to the upstream end. When each individual cart reaches the upstream end, an upstream lift conveyor returns the individual carts from the lower level to the upper level. An upper drive mechanism provides the motive force to move the stack of carts along the upper level at the working speed.

Abstract: The invention relates to an unload access system for an unit load device, comprising a framework, the framework delimiting a cargo space arranged on a ground load deck and the framework comprising an unload deck for unloading shipments out of the unit load device, whereby the unload deck is arranged distant above the ground load deck and extends in an offset plane adjacent to the cargo space, the unload deck comprises a movable platform, and the platform extends coplanar with the unload deck and is movable between a retracted position and a maximum extracted position, whereby in the maximum extracted position the platform overlaps at least partly the cargo space by extending into the cargo space and in the retracted position the platform does not overlap the cargo space.

Abstract: Embodiments herein describe disposing a waveguide adapter onto an SOI device after the components on a silicon surface layer have been formed. That is, the waveguide adapter is disposed above optical components (e.g., optical modulators, detectors, waveguides, etc) formed in a surface layer. In one embodiment, a waveguide in a bottom layer of the waveguide adapter overlaps a silicon waveguide in the surface layer such that the silicon waveguide and the waveguide in the bottom layer are optically coupled. The waveguide adapter also includes other layers above the bottom layer (e.g., middle and top layers) that also contain waveguides which form an adiabatic optical system for transmitting an optical signal. At least one of the waveguides in the multi-layer adapter is exposed at an optical interface of the SOI device, thereby permitting the SOI device to transmit optical signals to, or receive optical signals from, an external optical component.

Abstract: An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. When a voltage potential is created between the lower and upper waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) guide that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. In one embodiment, at least one of the waveguides includes a respective ridge portion aligned at a charge modulation region which may aid in confining the optical mode laterally (e.g., in the width direction) in the optical modulator. In another embodiment, ridge portions may be formed on both the lower and the upper waveguides. These ridge portions may be aligned in a vertical direction (e.g., a thickness direction) so that ridges overlap which may further improve optical efficiency by centering an optical mode in the charge modulation region.

Abstract: A wafer scale implementation of an opto-electronic transceiver assembly process utilizes a silicon wafer as an optical reference plane and platform upon which all necessary optical and electronic components are simultaneously assembled for a plurality of separate transceiver modules. In particular, a silicon wafer is utilized as a “platform” (interposer) upon which all of the components for a multiple number of transceiver modules are mounted or integrated, with the top surface of the silicon interposer used as a reference plane for defining the optical signal path between separate optical components. Indeed, by using a single silicon wafer as the platform for a large number of separate transceiver modules, one is able to use a wafer scale assembly process, as well as optical alignment and testing of these modules.

Abstract: An optical waveguide structure includes a rotator having a dual-layer core. A first layer of the dual-layer core may include a tapering portion. A second layer of the dual-layer core may include a rib portion disposed on the tapering portion. The combination of the rib portion and the tapering portion may receive a pair of optical signals, one being polarized in a TE mode and the other being polarized in a TM mode, and convert them to a pair of TE mode optical signals.

Abstract: System (100) and methods (3500) for receive processing of a burst communication system where co-channel signals (318) collide in a receiver (150). The methods comprise: simultaneously receiving co-channel signals (2002, 2004, 2006) transmitted from remote transmitters (104-112) at a first frequency; and independently performing a first iteration of a Turbo MUD process for a first co-channel signal and a second co-channel signal. The Turbo MUD process comprises: segmenting each of the first and second co-channel signals into a plurality of segments (2102, 2104, 2106) each having a unique SINR; computing a noise plus interference variance estimate for each segment; computing first bit likelihood values for each segment based on the noise variance estimate; computing second bit likelihood values for each segment based on the first bit likelihood values; and using the second bit likelihood values (i.e., soft in soft-out) to generate a first estimate of the first and second co-channel signals.

Abstract: A SOI device may include a waveguide adapter that couples light between an external light source—e.g., a fiber optic cable or laser—and a silicon waveguide on the silicon surface layer of the SOI device. In one embodiment, the waveguide adapter is embedded into the insulator layer. Doing so may enable the waveguide adapter to be formed before the surface layer components are added onto the SOI device. Accordingly, fabrication techniques that use high-temperatures may be used without harming other components in the SOI device—e.g., the waveguide adapter is formed before heat-sensitive components are added to the silicon surface layer.