Patents by Inventor Marko J Tadjer
Marko J Tadjer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10777644Abstract: Current conducting devices and methods for their formation are disclosed. Described are vertical current devices that include a substrate, an n-type material layer, a plurality of p-type gates, and a source. The n-type material layer disposed on the substrate and includes a current channel. A plurality of p-type gates are disposed on opposite sides of the current channel. A source is disposed on a distal side of the current channel with respect to the substrate. The n-type material layer comprises beta-gallium oxide.Type: GrantFiled: April 27, 2018Date of Patent: September 15, 2020Assignee: The Government of the United States of America, as represented by the Secretary of the NavyInventors: Francis J. Kub, Travis J. Anderson, Marko J. Tadjer, Andrew D. Koehler, Karl D. Hobart
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Publication number: 20200251389Abstract: A method of cleaving includes providing a substrate. Optionally, the substrate includes ?-gallium oxide, hexagonal zinc sulfide, or magnesium selenide. The substrate includes at least one natural cleave plane and a crystallinity. The substrate is cleaved along a first natural cleave plane of the at least one natural cleave plane. The cleaving the substrate along the first natural cleave plane includes the following. A micro-crack is generated in the substrate while maintaining the crystallinity adjacent to the micro-crack by generating a plurality of phonons in the substrate, the micro-crack comprising a micro-crack direction along the first natural cleave plane. The micro-crack is propagated along the first natural cleave plane while maintaining the crystallinity adjacent to the micro-crack. Optionally, generating a micro-crack in the substrate by generating a plurality of phonons in the substrate includes generating the plurality of phonons by electron-hole recombination.Type: ApplicationFiled: January 30, 2020Publication date: August 6, 2020Inventors: NADEEMULLAH A. MAHADIK, Robert E. Stahlbush, Marko J. Tadjer, Karl D. Hobart, Francis J. Kub
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Publication number: 20190360117Abstract: A method for growing polycrystalline diamond films having engineered grain growth and microstructure. Grain growth of a polycrystalline diamond film on a substrate is manipulated by growing the diamond on a nanopatterned substrate having features on the order of the initial grain size of the diamond film. By growing the diamond on such nanopatterned substrates, the crystal texture of a polycrystalline diamond film can be engineered to favor the preferred <110> orientation texture, which in turn enhances the thermal conductivity of the diamond film.Type: ApplicationFiled: May 23, 2019Publication date: November 28, 2019Applicant: The Government of the United States of America, as represented by the Secretary of the NavyInventors: Karl D. Hobart, Tatyana I. Feygelson, Marko J. Tadjer, Travis J. Anderson, Andrew D. Koehler, Sam Graham, JR., Mark Goorsky, Zhe Cheng, Luke Yates, Tingyu Bai, Yekan Wang
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Patent number: 10424643Abstract: A device structure and method for improving thermal management in highly scaled, high power electronic and optoelectronic devices such as GaN FET and AlGaN/GaN HEMT devices by implementing diamond air bridges into such devices to remove waste heat. The diamond air bridge can be formed from a polycrystalline diamond material layer which can be grown on the surface of a dielectric material layer, on the surface of a III-nitride material, or on the surface of a diamond polycrystalline nucleation layer, and may be optimized to have a high thermal conductivity at the growth interface with the underlying material.Type: GrantFiled: April 23, 2019Date of Patent: September 24, 2019Assignee: The Government of the United States of America, as represented by the Secretary of the NavyInventors: Karl D. Hobart, Andrew D. Koehler, Francis J. Kub, Travis J. Anderson, Tatyana I. Feygelson, Marko J. Tadjer, Lunet E. Luna
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Patent number: 10403509Abstract: A method for removing existing basal plane dislocations (BPDs) from silicon carbide epilayers by using a pulsed rapid thermal annealing process where the BPDs in the epilayers were eliminated while preserving the epitaxial surface. This high temperature, high pressure method uses silicon carbide epitaxial layers with a carbon cap to protect the surface. These capped epilayers are subjected to a plurality of rapid heating and cooling cycles.Type: GrantFiled: April 6, 2015Date of Patent: September 3, 2019Assignee: The Government of the United States of America, as represented by the Secretary of the NavyInventors: Marko J. Tadjer, Boris N. Feigelson, Nadeemullah A. Mahadik, Robert E. Stahlbush, Eugene A. Imhoff, Jordan Greenlee
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Publication number: 20190252501Abstract: A device structure and method for improving thermal management in highly scaled, high power electronic and optoelectronic devices such as GaN FET and AlGaN/GaN HEMT devices by implementing diamond air bridges into such devices to remove waste heat. The diamond air bridge can be formed from a polycrystalline diamond material layer which can be grown on the surface of a dielectric material layer, on the surface of a III-nitride material, or on the surface of a diamond polycrystalline nucleation layer, and may be optimized to have a high thermal conductivity at the growth interface with the underlying material.Type: ApplicationFiled: April 23, 2019Publication date: August 15, 2019Inventors: Karl D. Hobart, Andrew D. Koehler, Francis J. Kub, Travis J. Anderson, Tatyana I. Feygelson, Marko J. Tadjer, Lunet E. Luna
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Patent number: 10312175Abstract: A device structure and method for improving thermal management in highly scaled, high power electronic and optoelectronic devices such as GaN FET and AlGaN/GaN HEMT devices by implementing diamond air bridges into such devices to remove waste heat. The diamond air bridge can be formed from a polycrystalline diamond material layer which can be grown on the surface of a dielectric material layer, on the surface of a III-nitride material, or on the surface of a diamond polycrystalline nucleation layer, and may be optimized to have a high thermal conductivity at the growth interface with the underlying material.Type: GrantFiled: April 5, 2018Date of Patent: June 4, 2019Assignee: The United States of America, as represented by the Secretary of the NavyInventors: Karl D. Hobart, Andrew D. Koehler, Francis J. Kub, Travis J. Anderson, Tatyana I. Feygelson, Marko J. Tadjer, Lunet E. Luna
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Publication number: 20190157181Abstract: A device structure and method for improving thermal management in highly scaled, high power electronic and optoelectronic devices such as GaN FET and AlGaN/GaN HEMT devices by implementing diamond air bridges into such devices to remove waste heat. The diamond air bridge can be formed from a polycrystalline diamond material layer which can be grown on the surface of a dielectric material layer, on the surface of a III-nitride material, or on the surface of a diamond polycrystalline nucleation layer, and may be optimized to have a high thermal conductivity at the growth interface with the underlying material.Type: ApplicationFiled: April 5, 2018Publication date: May 23, 2019Applicant: The Government of the United States of America, as represented by the Secretary of the NavyInventors: Karl D. Hobart, Andrew D. Koehler, Francis J. Kub, Travis J. Anderson, Tatyana I. Feygelson, Marko J. Tadjer, Lunet E. Luna
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Publication number: 20180315820Abstract: Current conducting devices and methods for their formation are disclosed. Described are vertical current devices that include a substrate, an n-type material layer, a plurality of p-type gates, and a source. The n-type material layer disposed on the substrate and includes a current channel. A plurality of p-type gates are disposed on opposite sides of the current channel. A source is disposed on a distal side of the current channel with respect to the substrate. The n-type material layer comprises beta-gallium oxide.Type: ApplicationFiled: April 27, 2018Publication date: November 1, 2018Inventors: Francis J. Kub, Travis J. Anderson, Marko J. Tadjer, Andrew D. Koehler, Karl D. Hobart
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Patent number: 10020366Abstract: A method and device including adding a protective layer on the surface of a substrate, annealing the substrate at a temperature approximately greater or equal to 1850° C., removing the protective layer from the surface of the substrate after the annealing, and growing a first epilayer on the substrate after the removing of the protective layer, wherein the first epilayer is grown without attempting to prevent the basal plane dislocations to propagate in the first epilayer when growing the first epilayer, and wherein the first epilayer is free of the basal plane dislocations.Type: GrantFiled: September 22, 2016Date of Patent: July 10, 2018Assignee: The United States of America, as represented by the Secretary of the NavyInventors: Nadeemullah A. Mahadik, Robert E. Stahlbush, Eugene A. Imhoff, Marko J. Tadjer
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Patent number: 9991354Abstract: Systems and methods are provided that enable the production of semiconductor devices having a metal nitride layer in direct contact with a semiconductor layer to form a Schottky diode, such as a TiN gate on an AlGaN/GaN high electron mobility transistor (HEMT). Metal nitrides offer exceptional thermal stability and a lower diffusion coefficient. Technology enabled by embodiments of the present disclosure improves the reliability of GaN-based microwave power transistors.Type: GrantFiled: May 16, 2017Date of Patent: June 5, 2018Assignee: The United States of America, as represented by the Secretary of the NavyInventors: Travis J. Anderson, Virginia D. Wheeler, David Shahin, Andrew D. Koehler, Karl D. Hobart, Francis J. Kub, Marko J. Tadjer
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Patent number: 9960266Abstract: Passivated AlGaN/GaN HEMTs having no plasma damage to the AlGaN surface and methods for making the same. In a first embodiment, a thin HF SiN barrier layer is deposited on the AlGaN surface after formation of the gate. A thick HF/LF SiN layer is then deposited, the thin HF SiN layer and the thick HF/LF Sin layer comprising bi-layer SiN passivation on the HEMT. In a second embodiment, a first thin HF SiN barrier layer is deposited on the AlGaN surface before formation of the gate and is annealed. Following annealing of the first SiN layer, the gate is formed, and a second HF SiN barrier layer is deposited, followed by a thick HF/LF SiN layer, the three SiN layers comprising tri-layer SiN passivation on the HEMT.Type: GrantFiled: May 11, 2017Date of Patent: May 1, 2018Assignee: The United States of America, as represented by the Secretary of the NavyInventors: Marko J. Tadjer, Andrew D. Koehler, Travis J. Anderson, Karl D. Hobart
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Publication number: 20170338332Abstract: Passivated AlGaN/GaN HEMTs having no plasma damage to the AlGaN surface and methods for making the same. In a first embodiment, a thin HF SiN barrier layer is deposited on the AlGaN surface after formation of the gate. A thick HF/LF SiN layer is then deposited, the thin HF SiN layer and the thick HF/LF Sin layer comprising bi-layer SiN passivation on the HEMT. In a second embodiment, a first thin HF SiN barrier layer is deposited on the AlGaN surface before formation of the gate and is annealed. Following annealing of the first SiN layer, the gate is formed, and a second HF SiN barrier layer is deposited, followed by a thick HF/LF SiN layer, the three SiN layers comprising tri-layer SiN passivation on the HEMT.Type: ApplicationFiled: May 11, 2017Publication date: November 23, 2017Applicant: The Government of the United States of America, as represented by the Secretary of the NavyInventors: Marko J. Tadjer, Andrew D. Koehler, Travis J. Anderson, Karl D. Hobart
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Publication number: 20170330950Abstract: Systems and methods are provided that enable the production of semiconductor devices having a metal nitride layer in direct contact with a semiconductor layer to form a Schottky diode, such as a TiN gate on an AlGaN/GaN high electron mobility transistor (HEMT). Metal nitrides offer exceptional thermal stability and a lower diffusion coefficient. Technology enabled by embodiments of the present disclosure improves the reliability of GaN-based microwave power transistors.Type: ApplicationFiled: May 16, 2017Publication date: November 16, 2017Inventors: Travis J. Anderson, Virginia D. Wheeler, David Shahin, Andrew D. Koehler, Karl D. Hobart, Francis J. Kub, Marko J. Tadjer
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Publication number: 20170261376Abstract: A method of making a variable emittance window comprising providing a metal foil substrate, applying an antireflection material layer onto the metal foil substrate, applying a protection material layer onto the antireflection material layer, applying a variable emittance material layer onto the protection material layer, annealing to form a two-step variable emittance layer, applying a transparent low emittance material layer to the two-step variable emittance layer, adhering a transparent substrate to the transparent low emittance material layer, and removing the metal foil substrate.Type: ApplicationFiled: May 26, 2017Publication date: September 14, 2017Applicant: The Government of the United States of America, as represented by the Secretary of the NavyInventors: Virginia D. Wheeler, Francis J. Kub, Charles R. Eddy, JR., Marko J. Tadjer
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Publication number: 20170092724Abstract: A method and device including adding a protective layer on the surface of a substrate, annealing the substrate at a temperature approximately greater or equal to 1850° C., removing the protective layer from the surface of the substrate after the annealing, and growing a first epilayer on the substrate after the removing of the protective layer, wherein the first epilayer is grown without attempting to prevent the basal plane dislocations to propagate in the first epilayer when growing the first epilayer, and wherein the first epilayer is free of the basal plane dislocations.Type: ApplicationFiled: September 22, 2016Publication date: March 30, 2017Inventors: Nadeemullah A. Mahadik, Robert E. Stahlbush, Eugene A. Imhoff, Marko J. Tadjer
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Patent number: 9466684Abstract: A field effect transistor having a diamond gate electrode and a process for forming the same. In some embodiments, the device is an AlGaN/GaN high-electron-mobility transistor (HEMT). The diamond gate electrode is formed so that it directly contacts the barrier layer. In some embodiments, the diamond gate electrode is formed from boron-doped nanocrystalline diamond (NCD), while in other embodiments, the diamond gate electrode is formed from single crystal diamond.Type: GrantFiled: March 25, 2016Date of Patent: October 11, 2016Assignee: The United States of America, as represented by the Secretary of the NavyInventors: Andrew D. Koehler, Travis J. Anderson, Marko J. Tadjer, Karl D. Hobart, Tatyana I. Feygelson
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Publication number: 20160211341Abstract: A field effect transistor having a diamond gate electrode and a process for forming the same. In some embodiments, the device is an AlGaN/GaN high-electron-mobility transistor (HEMT). The diamond gate electrode is formed so that it directly contacts the barrier layer. In some embodiments, the diamond gate electrode is formed from boron-doped nanocrystalline diamond (NCD), while in other embodiments, the diamond gate electrode is formed from single crystal diamond.Type: ApplicationFiled: March 25, 2016Publication date: July 21, 2016Applicant: The Government of the United States of America, as represented by the Secretary of the NavyInventors: Andrew D. Koehler, Travis J. Anderson, Marko J. Tadjer, Karl D. Hobart, Tatyana I. Feygelson
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Patent number: 9331163Abstract: A field effect transistor having a diamond gate electrode and a process for forming the same. In some embodiments, the device is an AlGaN/GaN high-electron-mobility transistor (HEMT). The diamond gate electrode is formed so that it directly contacts the barrier layer. In some embodiments, the diamond gate electrode is formed from boron-doped nanocrystalline diamond (NCD), while in other embodiments, the diamond gate electrode is formed from single crystal diamond.Type: GrantFiled: August 28, 2014Date of Patent: May 3, 2016Assignee: The United States of America, as represented by the Secretary of the NavyInventors: Andrew D. Koehler, Travis J. Anderson, Marko J. Tadjer, Tatyana I. Feygelson, Karl D. Hobart
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Patent number: 9305858Abstract: An array of through-silicon vias (TSVs) are formed in a silicone substrate. The vias can be tapered such that the diameter of the via at the surface of the substrate is larger than the diameter of the via at its bottom, with the diameter varying continuously along its depth. After the via is formed, it is seeded with a thin layer of nanocrystalline diamond (NCD) particles, and a NCD film is grown on the bottom and along the sidewalls of the via. The presence of the diamond-filled vias provides improved thermal management to semiconductor devices formed on the silicon substrate.Type: GrantFiled: August 7, 2015Date of Patent: April 5, 2016Assignee: The United States of America, as represented by the Secretary of the NavyInventors: Karl D. Hobart, Marko J. Tadjer, Tatyana I. Feygelson, Bradford B. Pate, Travis J. Anderson