Patents by Inventor Martin Taillefer

Martin Taillefer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100332538
    Abstract: Hardware assisted transactional memory system with open nested transactions. Some embodiments described herein implement a system whereby hardware acceleration of transactions can be accomplished by implementing open nested transaction in hardware which respect software locks such that a top level transaction can be implemented in software, and thus not be limited by hardware constraints typical when using hardware transactional memory systems.
    Type: Application
    Filed: June 30, 2009
    Publication date: December 30, 2010
    Applicant: MICROSOFT CORPORATION
    Inventors: Jan Gray, Martin Taillefer, Yosseff Levanoni, Ali-Reza Adl-Tabatabai, Dave Detlefs, Michael Magruder, David Callahan
  • Publication number: 20100262801
    Abstract: An object reference is tagged with an isolation permission modifier. At least two permissions can be included, and in an example three permissions are included. In implementing the permissions, type modifiers for controlling access to type members through references pointing at an object are defined. One of the type modifiers is associated with each occurrence of a type name. Each of the of type modifiers defines a different access permission to restrict operations on the object to which the reference points.
    Type: Application
    Filed: April 13, 2009
    Publication date: October 14, 2010
    Applicant: Microsoft Corporation
    Inventors: John J. Duffy, Steven Edward Lucco, Anders Hejlsberg, Martin Taillefer
  • Patent number: 7725305
    Abstract: A computing device hosts a virtual machine executing a guest that issues guest hardware requests by way of any of a plurality of paths. Such paths include a path to non-existent virtual hardware, where an emulator intercepts and processes such guest hardware request with a corresponding actual hardware command; a path to an instantiated operating system, where the instantiated operating system processes each such guest hardware request with a corresponding actual hardware request; and a path to device hardware, where the device hardware directly processes each such guest hardware request.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: May 25, 2010
    Assignee: Microsoft Corporation
    Inventors: Martin Taillefer, Bruno Silva, Stanley W. Adermann, Landon M. Dyer
  • Publication number: 20090265156
    Abstract: Simulating a processor based system includes simulating first processor actions at a first precision level and detecting a first trigger. The simulation is dynamically changed to a second precision level that is different than the first precision level based on the first trigger. Second processor actions are simulated at the second precision level.
    Type: Application
    Filed: April 18, 2008
    Publication date: October 22, 2009
    Applicant: Microsoft Corporation
    Inventors: Martin Taillefer, Darek Mihocka
  • Patent number: 7565677
    Abstract: A data carousel contains multiple data files having a particular arrangement. These files are cyclically broadcast to a number of receivers of the data files. A procedure modifies the arrangement of data files based on information obtained from receivers of the data files.
    Type: Grant
    Filed: September 15, 2003
    Date of Patent: July 21, 2009
    Assignee: Microsoft Corporation
    Inventors: Regis J. Crinon, Martin Taillefer
  • Publication number: 20090007057
    Abstract: Various technologies and techniques are disclosed for providing an object model for transactional memory. The object model for transactional memory allows transactional semantics to be separated from program flow. Memory transaction objects created using the object model can live beyond the instantiating execution scope, which allows additional details about the memory transaction to be provided and controlled. Transactional memory can be supported even from languages that do not directly expose transactional memory constructs. This is made possible by defining the object model in one or more base class libraries and allowing the language that does not support transactional memory directly to use transactional memory through the object model.
    Type: Application
    Filed: June 26, 2007
    Publication date: January 1, 2009
    Applicant: Microsoft Corporation
    Inventor: Martin Taillefer
  • Publication number: 20090006406
    Abstract: Various technologies and techniques are disclosed for providing a transaction grouping feature for use in programs operating under a transactional memory system. The transaction grouping feature is operable to allow transaction groups to be created that contain related transactions. The transaction groups are used to enhance performance and/or operation of the programs. For example, different locking and versioning mechanisms can be used with different transaction groups. When running transactions, a hardware transactional memory execution mechanism can be used for one transaction group while a software transactional memory execution mechanism used for another transaction group.
    Type: Application
    Filed: June 29, 2007
    Publication date: January 1, 2009
    Applicant: Microsoft Corporation
    Inventor: Martin Taillefer
  • Publication number: 20090006751
    Abstract: Various technologies and techniques are disclosed for using transactional memory hardware to accelerate virtualization or emulation. A central processing unit is provided with the transactional memory hardware. Code backpatching can be facilitated by providing transactional memory hardware that supports a facility to maintain private memory state and an atomic commit feature. Changes made to certain code are stored in the private state facility. Backpatching changes are enacted by attempting to commit all the changes to memory at once using the atomic commit feature. An efficient call return stack can be provided by using transactional memory hardware. A call return cache stored in the private state facility captures a host address to return to after execution of a guest function completes. A direct-lookup hardware-based hash table is used for the call return cache.
    Type: Application
    Filed: June 27, 2007
    Publication date: January 1, 2009
    Applicant: Microsoft Corporation
    Inventors: Martin Taillefer, Darek Mihocka, Bruno Silva
  • Publication number: 20090006750
    Abstract: Various technologies and techniques are disclosed for using transactional memory hardware to accelerate virtualization or emulation. State isolation can be facilitated by providing isolated private state on transactional memory hardware and storing the stack of a host that is performing an emulation in the isolated private state. Memory accesses performed by a central processing unit can be monitored by software to detect that a guest being emulated has made a self modification to its own code sequence. Transactional memory hardware can be used to facilitate dispatch table updates in multithreaded environments by taking advantage of the atomic commit feature. An emulator is provided that uses a dispatch table stored in main memory to convert a guest program counter into a host program counter. The dispatch table is accessed to see if the dispatch table contains a particular host program counter for a particular guest program counter.
    Type: Application
    Filed: June 27, 2007
    Publication date: January 1, 2009
    Applicant: Microsoft Corporation
    Inventors: Martin Taillefer, Darek Mihocka, Bruno Silva
  • Publication number: 20090007107
    Abstract: Various technologies and techniques are disclosed for using transactional memory hardware to accelerate virtualization or emulation. One or more central processing units are provided with transactional memory hardware that is operable to accelerate virtualization. The transactional memory hardware has a facility to maintain private state, a facility to render memory accesses from other central processing units visible to software, and support for atomic commit of the private state. The transactional memory hardware can be used, for example, to facilitate emulation of precise exception semantics. The private state is operable to enable an emulated state to remain inconsistent with an architectural state and only synchronized on certain boundaries. An optimized sequence of instructions is executed using chunk-accurate simulation to try and achieve a same end effect.
    Type: Application
    Filed: June 27, 2007
    Publication date: January 1, 2009
    Applicant: Microsoft Corporation
    Inventors: Martin Taillefer, Darek Mihocka, Bruno Silva
  • Publication number: 20080320334
    Abstract: Various technologies and techniques are disclosed for providing a debugger for programs running under a transactional memory system. When running a particular program using the debugger, the system detects when a conflict occurs on at least one conflictpoint that was set in the particular program. A graphical user interface is provided that displays information related to the detected conflict. The graphical user interface can display transactional state and/or other details independently of a conflict. A conflictpoint can be assigned to one or more regions of source code in one or more transactions in the particular program. A conflictpoint can also be assigned to a particular variable in the particular program. When running the particular program in a debug mode, execution is stopped if a conflict occurs on any of the conflictpoints.
    Type: Application
    Filed: June 19, 2007
    Publication date: December 25, 2008
    Applicant: Microsoft Corporation
    Inventor: Martin Taillefer
  • Patent number: 7441012
    Abstract: A method and system that combines efficient caching and buffering to provide a network file system, that may utilize data stored in one or more compressed image files of sequentially arranged byte stream data. As an application requests file opens and file reads of a file system, one or more drivers convert the block requests into HTTP: byte range requests or the like in order to retrieve the data from a remote server. As the data is received, it is reconverted and adjusted to match the application's request. Sequential block access patterns can be detected and used to request additional data in a single request, in anticipation of future block requests, thereby increasing efficiency. Local caching of received data, including caching after uncompressing received data that was compressed, further increases efficiency. A compressed file system format optimized for sequential access is also described that when used, further improves the efficient data access.
    Type: Grant
    Filed: April 3, 2006
    Date of Patent: October 21, 2008
    Assignee: Microsoft Corporation
    Inventors: John H. Palevich, Martin Taillefer
  • Patent number: 7434025
    Abstract: Guest logical to physical translation is leveraged for host-side memory access. A contiguous portion of host physical address space is dedicated to the guest operating system. A reusable offset value may be calculated upon guest operating system initialization. Everything stored in the guest “physical” address space can be directly mapped to the contiguous portion of host physical address space using the reusable offset value, if necessary, thereby greatly reducing mapping complexity for both store and look-up operations.
    Type: Grant
    Filed: July 18, 2006
    Date of Patent: October 7, 2008
    Assignee: Microsoft Corporation
    Inventor: Martin Taillefer
  • Publication number: 20080215305
    Abstract: A first software program executing on a computing device emulates a second computing device executing a software program using emulated memory. The first software program permits the second software program to perform an operation on a contiguous portion of the emulated memory only when a pointer and a table entry both contain the same identifier, thus protecting against common types of memory usage errors in the second software program. The pointer has an address to the contiguous portion. The table entry maps to the contiguous portion. A plurality of table entries map to a respective plurality of contiguous portion of the emulated memory. A plurality of the pointers each contain the address to a respective contiguous portion of the emulated memory as well as containing an identifier corresponding to the respective contiguous portion of the emulated memory. The second computing device can be high or low in resources.
    Type: Application
    Filed: April 16, 2008
    Publication date: September 4, 2008
    Applicant: Microsoft Corporation
    Inventors: Alan G. Bishop, Landon Dyer, Martin Taillefer
  • Publication number: 20080199834
    Abstract: According to the present disclosure, users can have PC experiences on game consoles. For example, a game console can become a computing device dedicated to a server PC. PC capabilities, applications, programs, and even desktops can be remoted from the server PC to the game console, cached on the game console, and displayed on the game console display. Moreover, any devices native to either the server PC or the game console can be easily shared between the server PC and the console. Alternatively, a game console can be a concurrent computing device with a server PC, where only minimal content is stored on the gaming console, and minimal applications are remoted from the server PC to the game console. In either the dedicated or remoted case, various common features may be used, such as notifications sent from the server PC to the game console.
    Type: Application
    Filed: February 15, 2007
    Publication date: August 21, 2008
    Applicant: Microsoft Corporation
    Inventors: Martin Taillefer, Bruno Silva, Kenneth Dwight Krossa
  • Publication number: 20080189697
    Abstract: Mechanisms are disclosed for updating a virtual machine monitor (“VMM”). Facilities of a guest operating system running in a guest virtual machine managed by the VMM are leveraged to facilitate receiving an update package. The update package may contain updates for guest operating systems extensions in addition to a VMM update. An updater process, running in a guest operating system, extracts the VMM update and transfers it down to the VMM. Upon successful transfer, the updater process applies any necessary updates to guest operating systems extensions and then signals the VMM to commit the transferred VMM update.
    Type: Application
    Filed: February 5, 2007
    Publication date: August 7, 2008
    Applicant: Microsoft Corporation
    Inventors: Naveen K. Kachroo, Martin Taillefer, Lonny Dean McMichael
  • Patent number: 7403887
    Abstract: A first software program executing on a computing device emulates a second computing device executing a software program using emulated memory. The first software program permits the second software program to perform an operation on a contiguous portion of the emulated memory only when a pointer and a table entry both contain the same identifier, thus protecting against common types of memory usage errors in the second software program. The pointer has an address to the contiguous portion. The table entry maps to the contiguous portion. A plurality of table entries map to a respective plurality of contiguous portions of the emulated memory. A plurality of the pointers each contain the address to a respective contiguous portion of the emulated memory as well as containing an identifier corresponding to the respective contiguous portion of the emulated memory. The second computing device can be high or low in resources.
    Type: Grant
    Filed: January 14, 2004
    Date of Patent: July 22, 2008
    Assignee: Microsoft Corporation
    Inventors: Alan G. Bishop, Landon Dyer, Martin Taillefer
  • Publication number: 20080028400
    Abstract: A virtualization solution provides a streamlined end-to-end user experience through the integration of the host user interface and the guest user interface, hiding the complexities and incongruities of the underlying virtualization engine. The guest environment is controlled by a graphical user interface of the host system via an initialization menu, which is renderable via the graphical user interface of the host system. Applications of the guest environment can be launched via the initialization menu. Various embodiments are disclosed. For example, pushing a power button on the host system initiates a graceful power shutdown of the guest environment; when a disc is inserted into the host system, options are provided via the guest environment, for operating on the disc; the real-time clock of the host system is controlled by the guest environment; the host system is queried for display settings, and the guest environment uses the display setting if compatible.
    Type: Application
    Filed: July 27, 2006
    Publication date: January 31, 2008
    Applicant: Microsoft Corporation
    Inventors: Martin Taillefer, Naveen K. Kachroo, Kenneth L. Crocker, Bruno C. Silva
  • Publication number: 20080022068
    Abstract: Guest logical to physical translation is leveraged for host-side memory access. A contiguous portion of host physical address space is dedicated to the guest operating system. A reusable offset value may be calculated upon guest operating system initialization. Everything stored in the guest “physical” address space can be directly mapped to the contiguous portion of host physical address space using the reusable offset value, if necessary, thereby greatly reducing mapping complexity for both store and look-up operations.
    Type: Application
    Filed: July 18, 2006
    Publication date: January 24, 2008
    Applicant: Microsoft Corporation
    Inventor: Martin Taillefer
  • Publication number: 20070294707
    Abstract: Techniques for enhancing or replacing host operating system functionality by leveraging guest operating system functionality are disclosed. Incoming data is received from a computing resource of a host operating system, and, before the incoming data is transmitted to a higher-level module in the host operating system, the incoming data is intercepted by a set of one or more leveraged guest modules in a guest operating system. After intercepting the incoming data, the leveraged guest modules perform one or more operations on the incoming data. The leveraged guest modules may provide more advanced support and capabilities to perform these operations than any counterpart functionality in the host operating system. In addition to performing these operations, the leveraged guest modules also determine whether or not to return the incoming data to the host operating system.
    Type: Application
    Filed: June 15, 2006
    Publication date: December 20, 2007
    Applicant: Microsoft Corporation
    Inventors: Martin Taillefer, Stanley W. Adermann