Patents by Inventor Mary Anne Plano

Mary Anne Plano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10400323
    Abstract: A method for removing and preventing defects on surfaces of a component of a substrate processing chamber includes loading the component into a vacuum chamber and, with the component loaded within the vacuum chamber, baking the component at a baking temperature during a first predetermined period to remove water and defects from the surfaces of the component, and purging the component within the vacuum chamber during at least one second predetermined period to remove the defects from the vacuum chamber.
    Type: Grant
    Filed: October 12, 2017
    Date of Patent: September 3, 2019
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Ian Scot Latchford, Mary Anne Plano
  • Publication number: 20180294197
    Abstract: A method for testing cleanliness of a component of a substrate processing chamber includes loading the component into a vacuum chamber, arranging a test substrate within the vacuum chamber, with the component and the test substrate loaded within the vacuum chamber, providing a purge gas to the vacuum chamber, determining at least one of an amount of particles accumulated on the test substrate and an amount of metal contamination accumulated on the test substrate caused by providing the purge gas to the vacuum chamber, and estimating the cleanliness of the component based on the at least one of the determined amount of particles accumulated on the test substrate and the determined amount of metal contamination accumulated on the test substrate.
    Type: Application
    Filed: April 5, 2018
    Publication date: October 11, 2018
    Inventors: Mary Anne PLANO, Bhaskar Sompalli, Ian Scot Latchford
  • Publication number: 20180127864
    Abstract: A method for removing and preventing defects on surfaces of a component of a substrate processing chamber includes loading the component into a vacuum chamber and, with the component loaded within the vacuum chamber, baking the component at a baking temperature during a first predetermined period to remove water and defects from the surfaces of the component, and purging the component within the vacuum chamber during at least one second predetermined period to remove the defects from the vacuum chamber.
    Type: Application
    Filed: October 12, 2017
    Publication date: May 10, 2018
    Inventors: Ian Scot Latchford, Mary Anne Plano
  • Patent number: 7157798
    Abstract: A method for creating a refractory metal and refractory metal nitride cap effective for reducing copper electromigration and copper diffusion is described. The method includes depositing a refractory metal nucleation layer and nitriding at least the upper portion of the refractory metal layer to form a refractory metal nitride. Methods to reduce and clean the copper lines before refractory metal deposition are also described. Methods to form a thicker refractory metal layer using bulk deposition are also described.
    Type: Grant
    Filed: November 8, 2004
    Date of Patent: January 2, 2007
    Assignee: Novellus Systems, Inc.
    Inventors: James A. Fair, Robert H. Havemann, Jungwan Sung, Nerissa Taylor, Sang-Hyeob Lee, Mary Anne Plano
  • Patent number: 6844258
    Abstract: A method for creating a refractory metal and refractory metal nitride cap effective for reducing copper electromigration and copper diffusion is described. The method includes depositing a refractory metal nucleation layer and nitriding at least the upper portion of the refractory metal layer to form a refractory metal nitride. Methods to reduce and clean the copper lines before refractory metal deposition are also described. Methods to form a thicker refractory metal layer using bulk deposition are also described.
    Type: Grant
    Filed: May 9, 2003
    Date of Patent: January 18, 2005
    Assignee: Novellus Systems, Inc.
    Inventors: James A. Fair, Robert H. Havemann, Jungwan Sung, Nerissa Taylor, Sang-Hyeob Lee, Mary Anne Plano
  • Patent number: 6265320
    Abstract: A method of limiting surface damage during reactive ion etching of an organic polymer layer on a semiconductor substrate combines particular choices of process gases and plasma conditions with a post-etch passivation treatment. According to the method, a low density plasma etcher is used with a process gas mixture of one or more of an inert gas such as argon, helium, or nitrogen; methane; hydrogen; and oxygen, where the percentage of oxygen is up to about 5%. Typically a parallel plate plasma etcher is used. The reactive ion etching is followed by a post-etch passivation treatment in a which a gas containing hydrogen is flowed over the etched layer at an elevated temperature. The method is particularly useful in reactive ion etching of fluorinated organic polymer layers such as films formed from parylene AF4, and layers of poly(arylene ethers) and TEFLON®.
    Type: Grant
    Filed: December 21, 1999
    Date of Patent: July 24, 2001
    Assignee: Novellus Systems, Inc.
    Inventors: Jianou Shi, Thomas W. Mountsier, Mary Anne Plano, Joseph R. Laia