Patents by Inventor Mary O'Brien

Mary O'Brien has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9151709
    Abstract: A multiple flow system and method for detecting substances in a fluid is provided. More specifically, a first fluid tube containing a first fluid and a second fluid tube containing a second fluid are coupled to a common fluid tube via a connector, such that alternating discrete compartments of the first fluid and the second fluid flow through the common fluid tube. The first and second fluids are immiscible. A substance detector, having a flow chamber with an internal wall, is coupled to the common fluid tube. The alternating discrete compartments of the first and second fluids flow through the flow chamber and are analyzed by the substance detector.
    Type: Grant
    Filed: September 8, 2011
    Date of Patent: October 6, 2015
    Assignee: The Curators of the University of Missouri
    Inventors: Christine Mary O'Brien, Sagar K. Gupta, John Andrew Viator, Shramik Sengupta, Jeff Mosley, Kyle Rood
  • Patent number: 9043194
    Abstract: A method (and system) of emulation in a multiprocessor system, includes performing an emulation in which a host multiprocessing system of the multiprocessor system supports a weak consistency model, and the target multiprocessing system of the multiprocessor system supports a strong consistency model.
    Type: Grant
    Filed: September 17, 2002
    Date of Patent: May 26, 2015
    Assignee: International Business Machines Corporation
    Inventors: Ravi Nair, John Kevin O'Brien, Kathryn Mary O'Brien, Peter Howland Oden, Daniel Arthur Prener
  • Patent number: 8719548
    Abstract: A method (and structure) of mapping a memory addressing of a multiprocessing system when it is emulated using a virtual memory addressing of another multiprocessing system includes accessing a local lookaside table (LLT) on a target processor with a target virtual memory address. Whether there is a “miss” in the LLT is determined and, with the miss determined in the LLT, a lock for a global page table is obtained.
    Type: Grant
    Filed: April 13, 2011
    Date of Patent: May 6, 2014
    Assignee: International Business Machines Corporation
    Inventors: Erik Richter Altman, Ravi Nair, John Kevin O'Brien, Kathryn Mary O'Brien, Peter Howland Oden, Daniel Arthur Prener, Sumeda Wasudeo Sathaye
  • Patent number: 8578351
    Abstract: In a host system, a method for using instruction scheduling to efficiently emulate the operation of a target computing system includes preparing, on the host system, an instruction sequence to interpret an instruction written for execution on the target computing system. An instruction scheduling on the instruction sequence is performed, to achieve an efficient instruction level parallelism, for the host system. A separate and independent instruction sequence is inserted, which, when executed simultaneously with the instruction sequence, performs to copy to a separate location a minimum instruction sequence necessary to execute an intent of an interpreted target instruction, the interpreted target instruction being a translation; and modifies the interpreter code such that a next interpretation of the target instruction results in execution of the translated version, thereby removing execution of interpreter overhead.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: November 5, 2013
    Assignee: International Business Machines Corporation
    Inventors: Ravi Nair, John Kevin O'Brien, Kathryn Mary O'Brien, Peter Howland Oden, Daniel Arthur Prener
  • Patent number: 8376173
    Abstract: A drinking container including a main body and a removable lid. The lid includes an opening configured to receive a straw. The lid includes a removable cover having an opening configured to receive an upper portion of the straw. The cover includes a slide mechanism adapted to move and bend the straw to close the opening. The straw is bent at an angle to prevent closing or kinking of the straw.
    Type: Grant
    Filed: April 23, 2008
    Date of Patent: February 19, 2013
    Assignee: Learning Curve Brands, Inc.
    Inventors: James J. Britto, John J. Krammes, Mary O'Brien, Jen Gomes
  • Publication number: 20120089820
    Abstract: In a host system, a method for using instruction scheduling to efficiently emulate the operation of a target computing syste includes preparing, on the host system, an instruction sequence to interpret an instruction written for execution on the target computing system. An instruction scheduling on the instruction sequence is performed, to achieve an efficient instruction level parallelism, for the host system. A separate and independent instruction sequence is inserted, which, when executed simultaneously with the instruction sequence, performs to copy to a separate location a minimum instruction sequence necessary to execute an intent of an interpreted target instruction, the interpreted target instruction being a translation; and modifies the interpreter code such that a next interpretation of the target instruction results in execution of the translated version, thereby removing execution of interpreter overhead.
    Type: Application
    Filed: December 6, 2011
    Publication date: April 12, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ravi Nair, John Kevin O'Brien, Kathryn Mary O'Brien, Peter Howland Oden, Daniel Arthur Prener
  • Publication number: 20120064566
    Abstract: A multiple flow system and method for detecting substances in a fluid is provided. More specifically, a first fluid tube containing a first fluid and a second fluid tube containing a second fluid are coupled to a common fluid tube via a connector, such that alternating discrete compartments of the first fluid and the second fluid flow through the common fluid tube. The first and second fluids are immiscible. A substance detector, having a flow chamber with an internal wall, is coupled to the common fluid tube. The alternating discrete compartments of the first and second fluids flow through the flow chamber and are analyzed by the substance detector.
    Type: Application
    Filed: September 8, 2011
    Publication date: March 15, 2012
    Applicant: THE CURATORS OF THE UNIVERSITY OF MISSOURI
    Inventors: CHRISTINE MARY O'BRIEN, SAGAR K. GUPTA, JOHN ANDREW VIATOR, SHRAMIK SENGUPTA, JEFF MOSLEY, KYLE ROOD
  • Patent number: 8108843
    Abstract: A method (and system) for performing an emulation of an operation of a target computing system, includes interpreting a target instruction, recognizing an unused capacity of a host system when the host system is interpreting the instruction, and performing a translation of the instruction without increasing a time of interpreting the instruction.
    Type: Grant
    Filed: September 17, 2002
    Date of Patent: January 31, 2012
    Assignee: International Business Machines Corporation
    Inventors: Ravi Nair, John Kevin O'Brien, Kathryn Mary O'Brien, Peter Howland Oden, Daniel Arthur Prener
  • Publication number: 20110191095
    Abstract: A method (and structure) of mapping a memory addressing of a multiprocessing system when it is emulated using a virtual memory addressing of another multiprocessing system includes accessing a local lookaside table (LLT) on a target processor with a target virtual memory address. Whether there is a “miss” in the LLT is determined and, with the miss determined in the LLT, a lock for a global page table is obtained.
    Type: Application
    Filed: April 13, 2011
    Publication date: August 4, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Erik Richter Altman, Ravi Nair, John Kevin O'Brien, Kathryn Mary O'Brien, Peter Howland Oden, Daniel Arthur Prener, Sumeda Wasudeo Sathaye
  • Patent number: 7953588
    Abstract: A method (and system) for emulating a target system's memory addressing using a virtual-to-real memory mapping mechanism of a host multiprocessor system's operating system, includes inputting a target virtual memory address into a simulated page table to obtain a host virtual memory address. The target system is oblivious to the software it is running on.
    Type: Grant
    Filed: September 17, 2002
    Date of Patent: May 31, 2011
    Assignee: International Business Machines Corporation
    Inventors: Erik Richter Altman, Ravi Nair, John Kevin O'Brien, Kathryn Mary O'Brien, Peter Howland Oden, Daniel Arthur Prener, Sumedh Wasudeo Sathaye
  • Patent number: 7844446
    Abstract: A method (and system) for executing a multiprocessor program written for a target instruction set architecture on a host computing system having a plurality of processors designed to process instructions of a second instruction set architecture, includes representing each portion of the program designed to run on a processor of the target computing system as one or more program threads to be executed on the host computing system.
    Type: Grant
    Filed: February 19, 2009
    Date of Patent: November 30, 2010
    Assignee: International Business Machines Corporation
    Inventors: Erik Richter Altman, Ravi Nair, John Kevin O'Brien, Kathryn Mary O'Brien, Peter Howland Oden, Daniel Arthur Prener, Sumedh Wasudeo Sathaye
  • Publication number: 20100170902
    Abstract: A drinking container including a main body and a removable lid. The lid includes an opening configured to receive a straw. The lid includes a removable cover having an opening configured to receive an upper portion of the straw. The cover includes a slide mechanism adapted to move and bend the straw to close the opening. The straw is bent at an angle to prevent closing or kinking of the straw.
    Type: Application
    Filed: April 23, 2008
    Publication date: July 8, 2010
    Inventors: James J. Britto, John Krammes, Mary O'Brien, Jen Gomes
  • Publication number: 20100127011
    Abstract: A lid for a container. The lid includes a planar surface, a wall surrounding the planar surface, and a recess. The recess is formed on a portion of the planar surface and has a defined perimeter. The recess has a gradually sloping surface from a middle portion of the planar surface to the wall and an opening formed therein. The lid also includes a cover pivotably connected with the recess and is configured to pivot between a first position and a second position. The cover has a perimeter configured to rest within the recess when in one of the first position and the second position. The cover also has a cavity sized to engage the opening in the recess.
    Type: Application
    Filed: April 18, 2008
    Publication date: May 27, 2010
    Applicant: LEARNING CURVE BRANDS, INC.
    Inventors: James J. Britto, Mary O'Brien, John Krammes
  • Publication number: 20090157377
    Abstract: A method (and system) for executing a multiprocessor program written for a target instruction set architecture on a host computing system having a plurality of processors designed to process instructions of a second instruction set architecture, includes representing each portion of the program designed to run on a processor of the target computing system as one or more program threads to be executed on the host computing system.
    Type: Application
    Filed: February 19, 2009
    Publication date: June 18, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Erik Richter Altman, Ravi Nair, John Kevin O'Brien, Kathryn Mary O'Brien, Peter Howland Oden, Daniel Arthur Prener, Sumedh Wasudeo Sathaye
  • Patent number: 7496494
    Abstract: A method (and system) for executing a multiprocessor program written for a target instruction set architecture on a host computing system having a plurality of processors designed to process instructions of a second instruction set architecture, includes representing each portion of the program designed to run on a processor of the target computing system as one or more program threads to be executed on the host computing system.
    Type: Grant
    Filed: September 17, 2002
    Date of Patent: February 24, 2009
    Assignee: International Business Machines Corporation
    Inventors: Erik Richter Altman, Ravi Nair, John Kevin O'Brien, Kathryn Mary O'Brien, Peter Howland Oden, Daniel Arthur Prener, Sumedh Wasudeo Sathaye
  • Patent number: 7146607
    Abstract: A method (and system) of transparent dynamic optimization in a multiprocessing environment, includes monitoring execution of an application on a first processor with an execution monitor running on another processor of the system, and transparently optimizing one or more segments of the original application with a runtime optimizer executing on the another processor of the system.
    Type: Grant
    Filed: September 17, 2002
    Date of Patent: December 5, 2006
    Assignee: International Business Machines Corporation
    Inventors: Ravi Nair, John Kevin O'Brien, Kathryn Mary O'Brien, Peter Howland Oden, Daniel Arthur Prener
  • Publication number: 20040078186
    Abstract: A method (and system) of emulation in a multiprocessor system, includes performing an emulation in which a host multiprocessing system of the multiprocessor system supports a weak consistency model, and the target multiprocessing system of the multiprocessor system supports a strong consistency model.
    Type: Application
    Filed: September 17, 2002
    Publication date: April 22, 2004
    Applicant: International Business Machines Corporation
    Inventors: Ravi Nair, John Kevin O'brien, Kathryn Mary O'brien, Peter Howland Oden, Daniel Arthur Prener
  • Publication number: 20040054517
    Abstract: A method (and system) for executing a multiprocessor program written for a target instruction set architecture on a host computing system having a plurality of processors designed to process instructions of a second instruction set architecture, includes representing each portion of the program designed to run on a processor of the target computing system as one or more program threads to be executed on the host computing system.
    Type: Application
    Filed: September 17, 2002
    Publication date: March 18, 2004
    Applicant: International Business Machines Corporation
    Inventors: Erik Richter Altman, Ravi Nair, John Kevin O'Brien, Kathryn Mary O'Brien, Peter Howland Oden, Daniel Arthur Prener, Sumedh Wasudeo Sathaye
  • Publication number: 20040054993
    Abstract: A method (and system) for performing an emulation of an operation of a target computing system, includes interpreting a target instruction, recognizing an unused capacity of a host system when the host system is interpreting the instruction, and performing a translation of the instruction without increasing a time of interpreting the instruction.
    Type: Application
    Filed: September 17, 2002
    Publication date: March 18, 2004
    Applicant: International Business Machines Corporation
    Inventors: Ravi Nair, John Kevin O'Brien, Kathryn Mary O'Brien, Peter Howland Oden, Daniel Arthur Prener
  • Publication number: 20040054518
    Abstract: A method (and system) for emulating a target system's memory addressing using a virtual-to-real memory mapping mechanism of a host multiprocessor system's operating system, includes inputting a target virtual memory address into a simulated page table to obtain a host virtual memory address. The target system is oblivious to the software it is running on.
    Type: Application
    Filed: September 17, 2002
    Publication date: March 18, 2004
    Applicant: International Business Machines Corporation
    Inventors: Erik Richter Altman, Ravi Nair, John Kevin O'Brien, Kathryn Mary O'Brien, Peter Howland Oden, Daniel Arthur Prener, Sumedh Wasudeo Sathaye