Patents by Inventor Masaaki Higuchi
Masaaki Higuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240074184Abstract: An electronic device comprises memory pillars comprising a channel material. The memory pillars extend through both a cell region and a lateral contact region. A portion of the memory pillars in the lateral contact region comprise at least one first step and at least one second step. The electronic device comprises a source contact in direct contact with the channel material in the at least one second step of the portion of the memory pillars in the lateral contact region. Additional electronic devices and methods of forming an electronic device are also disclosed.Type: ApplicationFiled: August 29, 2022Publication date: February 29, 2024Inventors: Masaaki Higuchi, Yoshiaki Fukuzumi, Hirokazu Ishigaki
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Publication number: 20240030040Abstract: According to an embodiment, a nonvolatile semiconductor memory device comprises a plurality of conductive layers that are stacked in plurality in a first direction via an inter-layer insulating layer, that extend in a second direction which intersects the first direction, and that are disposed in plurality in a third direction which intersects the first direction and the second direction. In addition, the same nonvolatile semiconductor memory device comprises: a semiconductor layer that has the first direction as a longitudinal direction; a tunnel insulating layer that contacts a side surface of the semiconductor layer; a charge accumulation layer that contacts a side surface of the tunnel insulating layer; and a block insulating layer that contacts a side surface of the charge accumulation layer. Furthermore, in the same nonvolatile semiconductor memory device, an end in the third direction of the plurality of conductive layers is rounded.Type: ApplicationFiled: October 3, 2023Publication date: January 25, 2024Applicant: Kioxia CorporationInventors: Takeshi SONEHARA, Takahiro HIRAI, Masaaki HIGUCHI, Takashi SHIMIZU
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Patent number: 11213813Abstract: According to one embodiment, a droplet dispensing apparatus include a droplet ejecting array having a plurality of nozzles from which solution can be ejected into a microplate on a baseplate, a sensor configured to detect a solution amount in the microplate, and a controller configured to detect that a nozzle in the plurality of nozzles is malfunctioning during a solution ejection process based on an initial solution amount in the microplate and a final solution amount in the microplate as detected by the sensor, and control a supplemental droplet dispensing operation in which an additional solution amount is ejected into the microplate based on the initial solution amount and the final solution amount in the microplate.Type: GrantFiled: February 7, 2018Date of Patent: January 4, 2022Assignee: TOSHIBA TEC KABUSHIKI KAISHAInventors: Masaaki Higuchi, Satoshi Kaiho, Ryutaro Kusunoki
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Publication number: 20210210507Abstract: According to an embodiment, a non-volatile storage device includes a first layer, a second layer formed on the first layer, a stacked body including a plurality of conductive films stacked on the second layer, and a semiconductor pillar which penetrates the stacked body and the second layer and reaches the first layer. The semiconductor pillar includes a semiconductor film formed along an extending direction of the semiconductor pillar, and a memory film which covers a periphery of the semiconductor film. The memory film includes a first portion formed between the stacked body and the semiconductor film and a second portion formed between the second layer and the semiconductor film. An outer periphery of the second portion in a plane perpendicular to the extending direction is wider than an outer periphery of the first portion on a second layer side of the stacked body.Type: ApplicationFiled: March 18, 2021Publication date: July 8, 2021Inventors: Masaaki HIGUCHI, Masaru Kito, Masao Shingu
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Publication number: 20210202263Abstract: According to an embodiment, a nonvolatile semiconductor memory device comprises a plurality of conductive layers that are stacked in plurality in a first direction via an inter-layer insulating layer, that extend in a second direction which intersects the first direction, and that are disposed in plurality in a third direction which intersects the first direction and the second direction. In addition, the same nonvolatile semiconductor memory device comprises: a semiconductor layer that has the first direction as a longitudinal direction; a tunnel insulating layer that contacts a side surface of the semiconductor layer; a charge accumulation layer that contacts a side surface of the tunnel insulating layer; and a block insulating layer that contacts a side surface of the charge accumulation layer. Furthermore, in the same nonvolatile semiconductor memory device, an end in the third direction of the plurality of conductive layers is rounded.Type: ApplicationFiled: February 24, 2021Publication date: July 1, 2021Applicant: Toshiba Memory CorporationInventors: Takeshi SONEHARA, Takahiro HIRAI, Masaaki HIGUCHI, Takashi SHIMIZU
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Patent number: 10985173Abstract: According to an embodiment, a non-volatile storage device includes a first layer, a second layer formed on the first layer, a stacked body including a plurality of conductive films stacked on the second layer, and a semiconductor pillar which penetrates the stacked body and the second layer and reaches the first layer. The semiconductor pillar includes a semiconductor film formed along an extending direction of the semiconductor pillar, and a memory film which covers a periphery of the semiconductor film. The memory film includes a first portion formed between the stacked body and the semiconductor film and a second portion formed between the second layer and the semiconductor film. An outer periphery of the second portion in a plane perpendicular to the extending direction is wider than an outer periphery of the first portion on a second layer side of the stacked body.Type: GrantFiled: February 15, 2018Date of Patent: April 20, 2021Assignee: TOSHIBA MEMORY CORPORATIONInventors: Masaaki Higuchi, Masaru Kito, Masao Shingu
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Patent number: 10957556Abstract: According to an embodiment, a nonvolatile semiconductor memory device comprises a plurality of conductive layers that are stacked in plurality in a first direction via an inter-layer insulating layer, that extend in a second direction which intersects the first direction, and that are disposed in plurality in a third direction which intersects the first direction and the second direction. In addition, the same nonvolatile semiconductor memory device comprises: a semiconductor layer that has the first direction as a longitudinal direction; a tunnel insulating layer that contacts a side surface of the semiconductor layer; a charge accumulation layer that contacts a side surface of the tunnel insulating layer; and a block insulating layer that contacts a side surface of the charge accumulation layer. Furthermore, in the same nonvolatile semiconductor memory device, an end in the third direction of the plurality of conductive layers is rounded.Type: GrantFiled: March 5, 2020Date of Patent: March 23, 2021Assignee: Toshiba Memory CorporationInventors: Takeshi Sonehara, Takahiro Hirai, Masaaki Higuchi, Takashi Shimizu
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Publication number: 20200203180Abstract: According to an embodiment, a nonvolatile semiconductor memory device comprises a plurality of conductive layers that are stacked in plurality in a first direction via an inter-layer insulating layer, that extend in a second direction which intersects the first direction, and that are disposed in plurality in a third direction which intersects the first direction and the second direction. In addition, the same nonvolatile semiconductor memory device comprises: a semiconductor layer that has the first direction as a longitudinal direction; a tunnel insulating layer that contacts a side surface of the semiconductor layer; a charge accumulation layer that contacts a side surface of the tunnel insulating layer; and a block insulating layer that contacts a side surface of the charge accumulation layer. Furthermore, in the same nonvolatile semiconductor memory device, an end in the third direction of the plurality of conductive layers is rounded.Type: ApplicationFiled: March 5, 2020Publication date: June 25, 2020Applicant: Toshiba Memory CorporationInventors: Takeshi SONEHARA, Takahiro HIRAI, Masaaki HIGUCHI, Takashi SHIMIZU
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Patent number: 10615049Abstract: According to an embodiment, a nonvolatile semiconductor memory device comprises a plurality of conductive layers that are stacked in plurality in a first direction via an inter-layer insulating layer, that extend in a second direction which intersects the first direction, and that are disposed in plurality in a third direction which intersects the first direction and the second direction. In addition, the same nonvolatile semiconductor memory device comprises: a semiconductor layer that has the first direction as a longitudinal direction; a tunnel insulating layer that contacts a side surface of the semiconductor layer; a charge accumulation layer that contacts a side surface of the tunnel insulating layer; and a block insulating layer that contacts a side surface of the charge accumulation layer. Furthermore, in the same nonvolatile semiconductor memory device, an end in the third direction of the plurality of conductive layers is rounded.Type: GrantFiled: December 28, 2018Date of Patent: April 7, 2020Assignee: Toshiba Memory CorporationInventors: Takeshi Sonehara, Takahiro Hirai, Masaaki Higuchi, Takashi Shimizu
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Publication number: 20190139782Abstract: According to an embodiment, a nonvolatile semiconductor memory device comprises a plurality of conductive layers that are stacked in plurality in a first direction via an inter-layer insulating layer, that extend in a second direction which intersects the first direction, and that are disposed in plurality in a third direction which intersects the first direction and the second direction. In addition, the same nonvolatile semiconductor memory device comprises: a semiconductor layer that has the first direction as a longitudinal direction; a tunnel insulating layer that contacts a side surface of the semiconductor layer; a charge accumulation layer that contacts a side surface of the tunnel insulating layer; and a block insulating layer that contacts a side surface of the charge accumulation layer. Furthermore, in the same nonvolatile semiconductor memory device, an end in the third direction of the plurality of conductive layers is rounded.Type: ApplicationFiled: December 28, 2018Publication date: May 9, 2019Applicant: Toshiba Memory CorporationInventors: Takeshi SONEHARA, Takahiro HIRAI, Masaaki HIGUCHI, Takashi SHIMIZU
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Patent number: 10192753Abstract: According to an embodiment, a nonvolatile semiconductor memory device comprises a plurality of conductive layers that are stacked in plurality in a first direction via an inter-layer insulating layer, that extend in a second direction which intersects the first direction, and that are disposed in plurality in a third direction which intersects the first direction and the second direction. In addition, the same nonvolatile semiconductor memory device comprises: a semiconductor layer that has the first direction as a longitudinal direction; a tunnel insulating layer that contacts a side surface of the semiconductor layer; a charge accumulation layer that contacts a side surface of the tunnel insulating layer; and a block insulating layer that contacts a side surface of the charge accumulation layer. Furthermore, in the same nonvolatile semiconductor memory device, an end in the third direction of the plurality of conductive layers is rounded.Type: GrantFiled: September 3, 2015Date of Patent: January 29, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventors: Takeshi Sonehara, Takahiro Hirai, Masaaki Higuchi, Takashi Shimizu
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Patent number: 10121797Abstract: According to an embodiment, a semiconductor memory device comprises: a stacked body including control gate electrodes stacked upwardly of a substrate; a semiconductor layer facing the control gate electrodes; and a gate insulating layer provided between the control gate electrode and the semiconductor layer. The stacked body comprises: a first metal layer configuring the control gate electrode; a first barrier metal layer contacting an upper surface of this first metal layer; a first silicon nitride layer contacting an upper surface of this first barrier metal layer; a first inter-layer insulating layer contacting an upper surface of this first silicon nitride layer; a second barrier metal layer contacting a lower surface of the first metal layer; a second silicon nitride layer contacting a lower surface of this second barrier metal layer; and a second inter-layer insulating layer contacting a lower surface of this second silicon nitride layer.Type: GrantFiled: September 19, 2016Date of Patent: November 6, 2018Assignee: TOSHIBA MEMORY CORPORATIONInventors: Shigeki Kobayashi, Satoshi Konagai, Atsushi Konno, Kenta Yamada, Masaaki Higuchi, Masao Shingu, Soichiro Kitazaki, Yoshimasa Mikajiri
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Publication number: 20180272333Abstract: According to one embodiment, a droplet dispensing apparatus includes a droplet ejection array having a plurality of nozzles from which droplets can be ejected into a well opening of a microplate plate on a baseplate, the plurality of nozzles being arranged in columns in a first direction and rows in a second direction that intersects the first direction, a light emitting unit configured to emit light having polarization perpendicular to a third direction oblique with respect to the first direction and the second direction, and a light receiving unit configured to receive light from the light emitting unit, the light receiving unit being on an opposite side of the droplet ejection array from the light emitting unit.Type: ApplicationFiled: February 6, 2018Publication date: September 27, 2018Inventors: Masaaki HIGUCHI, Seiya SHIMIZU, Ryutaro KUSUNOKI, Shuhei YOKOYAMA
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Publication number: 20180272345Abstract: A droplet dispensing apparatus includes a droplet ejecting array having a plurality of nozzle groups, each nozzle group including a plurality of nozzles arranged in columns in a first direction and rows in a second direction that intersects the first direction, and the plurality of nozzles being arranged in a third direction, a light emitting unit configured to emit light along an optical path in the third direction oblique with respect to the first direction, a light receiving unit configured to receive light from the light emitting unit, the light receiving unit being on an opposite side of the droplet ejecting array from the light emitting unit, and a controller configured to receive signals from the light receiving unit according to light intensity as detected by the light receiving unit, and adjust ejection timings such that each of the plurality of nozzle groups ejects at a different timing.Type: ApplicationFiled: February 9, 2018Publication date: September 27, 2018Inventors: Masaaki HIGUCHI, Seiya SHIMIZU, Ryutaro KUSUNOKI, Shuhei YOKOYAMA
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Publication number: 20180272335Abstract: According to one embodiment, a droplet dispensing apparatus includes a droplet ejection array having a plurality of nozzles from which droplets can be ejected into a well opening of a microplate plate on a baseplate, a sensor configured to detect a liquid amount in the microplate, and a controller configured to detect that a nozzle in the plurality of nozzles is not discharging during a droplet ejection process based on an initial liquid amount in the microplate as detected by the sensor and a final liquid amount in the microplate as detected by the sensor during a droplet ejection process in which a predetermined number of droplets are to be ejected from the plurality of nozzles into the microplate.Type: ApplicationFiled: February 6, 2018Publication date: September 27, 2018Inventors: Masaaki HIGUCHI, Satoshi KAIHO, Seiya SHIMIZU, Shuhei YOKOYAMA, Ryutaro KUSUNOKI
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Publication number: 20180272334Abstract: According to one embodiment, a droplet dispensing apparatus include a droplet ejecting array having a plurality of nozzles from which solution can be ejected into a microplate on a baseplate, a sensor configured to detect a solution amount in the microplate, and a controller configured to detect that a nozzle in the plurality of nozzles is malfunctioning during a solution ejection process based on an initial solution amount in the microplate and a final solution amount in the microplate as detected by the sensor, and control a supplemental droplet dispensing operation in which an additional solution amount is ejected into the microplate based on the initial solution amount and the final solution amount in the microplate.Type: ApplicationFiled: February 7, 2018Publication date: September 27, 2018Inventors: Masaaki HIGUCHI, Satoshi KAIHO, Ryutaro KUSUNOKI
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Patent number: 10032935Abstract: A semiconductor memory device includes a substrate, a multi-layered structure including a plurality of insulating layers and a plurality of conductive layers that are alternately formed above the substrate, and a pillar extending through the multi-layered structure. The pillar includes a semiconductor body extending along the pillar, and a charge-storing film around the semiconductor body, the charge-storing film having a first thickness at first portions facing the insulating layers and a second thickness greater than the first thickness at second portions facing the conductive layers.Type: GrantFiled: September 29, 2016Date of Patent: July 24, 2018Assignee: Toshiba Memory CorporationInventors: Masaaki Higuchi, Masao Shingu, Tatsuya Kato, Takeshi Murata, Makoto Fujiwara, Masaki Kondo, Muneyuki Tsuda, Takashi Kurusu
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Publication number: 20180175057Abstract: According to an embodiment, a non-volatile storage device includes a first layer, a second layer formed on the first layer, a stacked body including a plurality of conductive films stacked on the second layer, and a semiconductor pillar which penetrates the stacked body and the second layer and reaches the first layer. The semiconductor pillar includes a semiconductor film formed along an extending direction of the semiconductor pillar, and a memory film which covers a periphery of the semiconductor film. The memory film includes a first portion formed between the stacked body and the semiconductor film and a second portion formed between the second layer and the semiconductor film. An outer periphery of the second portion in a plane perpendicular to the extending direction is wider than an outer periphery of the first portion on a second layer side of the stacked body.Type: ApplicationFiled: February 15, 2018Publication date: June 21, 2018Inventors: Masaaki HIGUCHI, Masaru KITO, Masao SHINGU
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Patent number: 9960174Abstract: According to one embodiment, a semiconductor device includes a semiconductor layer; an electrode layer; a first insulating film; a charge storage film; and a second insulating film. The first insulating film is provided between the electrode layer and the semiconductor layer. The charge storage film is provided between the first insulating film and the electrode layer. The charge storage film includes a charge trapping layer and a floating electrode layer. The floating electrode layer includes doped silicon. The second insulating film is provided between the floating electrode layer and the electrode layer.Type: GrantFiled: March 7, 2016Date of Patent: May 1, 2018Assignee: TOSHIBA MEMORY CORPORATIONInventors: Takuo Ohashi, Masaaki Higuchi
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Patent number: 9929176Abstract: According to an embodiment, a non-volatile storage device includes a first layer, a second layer formed on the first layer, a stacked body including a plurality of conductive films stacked on the second layer, and a semiconductor pillar which penetrates the stacked body and the second layer and reaches the first layer. The semiconductor pillar includes a semiconductor film formed along an extending direction of the semiconductor pillar, and a memory film which covers a periphery of the semiconductor film. The memory film includes a first portion formed between the stacked body and the semiconductor film and a second portion formed between the second layer and the semiconductor film. An outer periphery of the second portion in a plane perpendicular to the extending direction is wider than an outer periphery of the first portion on a second layer side of the stacked body.Type: GrantFiled: January 4, 2017Date of Patent: March 27, 2018Assignee: TOSHIBA MEMORY CORPORATIONInventors: Masaaki Higuchi, Masaru Kito, Masao Shingu