Patents by Inventor Masaaki Tsuchiya
Masaaki Tsuchiya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7301781Abstract: The present invention realizes strengthening of a ground of a lower-surface ground electrode of an upper semiconductor chip and miniaturization in a semiconductor module on which two semiconductor chips are mounted in a stacked manner. A lower semiconductor chip is fixed to a bottom of a recess formed in an upper surface of a module board, and an upper semiconductor chip is fixed to an upper surface of a support body made of conductor which is formed over the upper surface of the module board around the recess. External electrode terminals and a heat radiation pad are formed over a lower surface of the module board.Type: GrantFiled: October 24, 2006Date of Patent: November 27, 2007Assignee: Renesas Technology Corp.Inventors: Satoru Konishi, Tsuneo Endoh, Masaaki Tsuchiya, Hirokazu Nakajima
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Publication number: 20070035004Abstract: The present invention realizes strengthening of a ground of a lower-surface ground electrode of an upper semiconductor chip and miniaturization in a semiconductor module on which two semiconductor chips are mounted in a stacked manner. A lower semiconductor chip is fixed to a bottom of a recess formed in an upper surface of a module board, and an upper semiconductor chip is fixed to an upper surface of a support body made of conductor which is formed over the upper surface of the module board around the recess. External electrode terminals and a heat radiation pad are formed over a lower surface of the module board.Type: ApplicationFiled: October 24, 2006Publication date: February 15, 2007Inventors: Satoru Konishi, Tsuneo Endoh, Masaaki Tsuchiya, Hirokazu Nakajima
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Patent number: 7176579Abstract: The present invention realizes the miniaturization of a semiconductor module. The semiconductor module includes a module board having external electrode terminals and a heat radiation pad over a lower surface thereof, a first semiconductor chip incorporating an initial-stage transistor of a high frequency power amplifying device therein, a second semiconductor chip incorporating a next-stage transistor and a final-stage transistor therein, and an integrated passive device which constitutes a matching circuit. At least one of the first semiconductor chip and the second semiconductor chip and the integrated passive device are mounted over an upper surface of the module board in an overlapped manner.Type: GrantFiled: December 12, 2003Date of Patent: February 13, 2007Assignee: Renesas Technology Corp.Inventors: Satoru Konishi, Tsuneo Endoh, Hirokazu Nakajima, Masaaki Tsuchiya
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Patent number: 7154760Abstract: The present invention realizes strengthening of a ground of a lower-surface ground electrode of an upper semiconductor chip and miniaturization in a semiconductor module on which two semiconductor chips are mounted in a stacked manner. A lower semiconductor chip is fixed to a bottom of a recess formed in an upper surface of a module board, and an upper semiconductor chip is fixed to an upper surface of a support body made of conductor which is formed over the upper surface of the module board around the recess. External electrode terminals and a heat radiation pad are formed over a lower surface of the module board.Type: GrantFiled: December 12, 2003Date of Patent: December 26, 2006Assignee: Renesas Technology Corp.Inventors: Satoru Konishi, Tsuneo Endoh, Masaaki Tsuchiya, Hirokazu Nakajima
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Publication number: 20060171130Abstract: The present invention realizes the miniaturization of a semiconductor module. The semiconductor module includes a module board having external electrode terminals and a heat radiation pad over a lower surface thereof, a first semiconductor chip incorporating an initial-stage transistor of a high frequency power amplifying device therein, a second semiconductor chip incorporating a next-stage transistor and a final-stage transistor therein, and an integrated passive device which constitutes a matching circuit. At least one of the first semiconductor chip and the second semiconductor chip and the integrated passive device are mounted over an upper surface of the module board in an overlapped manner.Type: ApplicationFiled: March 29, 2006Publication date: August 3, 2006Inventors: Satoru Konishi, Tsuneo Endoh, Hirokazu Nakajima, Masaaki Tsuchiya
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Patent number: 7052189Abstract: The present invention provides an optical electronic device which includes a package casing made of plastic, a plurality of metal-made leads which extend between the inside and the outside of the package casing and form electrode terminals at external portions thereof, a lead base which is arranged in an inner bottom of the package and is integrally formed with at least one or the plurality of leads, a support substrate which is fixed onto the lead base and includes a conductive layer of a given pattern on an upper surface thereof, an optical element which is fixed onto the support substrate, an optical fiber which extends between the inside and the outside of the package casing and has an inner end thereof to face the optical element to perform transmission and reception of light between the optical fiber and the optical element, one or a plurality of electronic parts fixed to the leads in the inside of the package casing, and conductive wires which electrically connect electrodes of the optical element, eleType: GrantFiled: November 15, 2002Date of Patent: May 30, 2006Assignee: Renesas Technology CorporationInventors: Hiroshi Naka, Masaaki Tsuchiya, Shigeo Yamashita
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Publication number: 20040125579Abstract: The present invention realizes the miniaturization of a semiconductor module. The semiconductor module includes a module board having external electrode terminals and a heat radiation pad over a lower surface thereof, a first semiconductor chip incorporating an initial-stage transistor of a high frequency power amplifying device therein, a second semiconductor chip incorporating a next-stage transistor and a final-stage transistor therein, and an integrated passive device which constitutes a matching circuit. At least one of the first semiconductor chip and the second semiconductor chip and the integrated passive device are mounted over an upper surface of the module board in an overlapped manner. The second semiconductor chip is mounted over a bottom of a recess formed in the upper surface of the module board.Type: ApplicationFiled: December 12, 2003Publication date: July 1, 2004Inventors: Satoru Konishi, Tsuneo Endoh, Hirokazu Nakajima, Masaaki Tsuchiya
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Publication number: 20040125578Abstract: The present invention realizes strengthening of a ground of a lower-surface ground electrode of an upper semiconductor chip and miniaturization in a semiconductor module on which two semiconductor chips are mounted in a stacked manner. A lower semiconductor chip is fixed to a bottom of a recess formed in an upper surface of a module board, and an upper semiconductor chip is fixed to an upper surface of a support body made of conductor which is formed over the upper surface of the module board around the recess. External electrode terminals and a heat radiation pad are formed over a lower surface of the module board. A plurality of vias which are connected to the heat radiation pad are formed in the bottom of the recess. The support body is formed over the vias connected to the heat radiation pad. The heat radiation pad assumes a ground potential. On the upper surface of the module board, chip-like electronic parts such as chip resistances, chip capacitors and chip fixed coils are mounted.Type: ApplicationFiled: December 12, 2003Publication date: July 1, 2004Inventors: Satoru Konishi, Tsuneo Endoh, Masaaki Tsuchiya, Hirokazu Nakajima
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Publication number: 20030113076Abstract: The present invention provides an optical electronic device which includes a package casing made of plastic, a plurality of metal-made leads which extend between the inside and the outside of the package casing and form electrode terminals at external portions thereof, a lead base which is arranged in an inner bottom of the package and is integrally formed with at least one or the plurality of leads, a support substrate which is fixed onto the lead base and includes a conductive layer of a given pattern on an upper surface thereof, an optical element which is fixed onto the support substrate, an optical fiber which extends between the inside and the outside of the package casing and has an inner end thereof to face the optical element to perform transmission and reception of light between the optical fiber and the optical element, one or a plurality of electronic parts fixed to the leads in the inside of the package casing, and conductive wires which electrically connect electrodes of the optical element, eleType: ApplicationFiled: November 15, 2002Publication date: June 19, 2003Applicant: Hitachi, Ltd.Inventors: Hiroshi Naka, Masaaki Tsuchiya, Shigeo Yamashita