Abstract: Two memory chips mounted over a base substrate have the same external size and a flash memory of the same memory capacity formed thereon. These memory chips are mounted over the base substrate with one of them being overlapped with the upper portion of the other one, and they are stacked with their faces being turned in the same direction. The bonding pads BP of one of the memory chips are disposed in the vicinity of the bonding pads BP of the other memory chip. In addition, the upper memory chip is stacked over the lower memory chip in such a way that the upper memory chip is slid in a direction (X direction) parallel to the one side of the lower memory chip and in a direction (Y direction) perpendicular thereto in order to prevent partial overlapping of it with the bonding pads BP of the lower memory chip.

Abstract: A memory card is disclosed which not only suppresses a lowering of the manufacturing yield caused by warping of a semiconductor chip sealing member, but also reduces the manufacturing cost by using a less expensive material. The memory card comprises a thin plate-like cap formed of a synthetic resin and a sealing member mounted inside the cap. Inside the sealing member are sealed a metallic lead frame and three semiconductor chips (two memory chips and one control chip) mounted on part (leads) of the lead frame. The semiconductor chips are electrically connected to leads through Au wires. Connecting terminals integral with the lead frame are exposed to the back side of the sealing member.

Abstract: For the manufacturing of semiconductor devices, in which multiple semiconductor chips which are mounted on a wiring substrate are processed for block molding and thereafter the wiring substrate is diced into individual resin-molded semiconductor devices, here is disclosed a technique for finding out easily, even after the dicing process, the position of each resin-molded semiconductor device in its former state on the wiring substrate. It includes processing steps of implementing the block molding with resin for multiple semiconductor chips mounted on a wiring substrate and thereafter dicing the wiring substrate into individual resin-molded semiconductor devices, with the substrate dicing step being preceded by a step of appending an address information pattern to each of the resin-molded semiconductor devices.

Abstract: A semiconductor device capable of improving the flexibility of designing electrical lead patterns for connection from chips via a substrate to external terminals by appropriately arranging the substrate structure and layout of more than one address signal as commonly shared by four separate chips is disclosed. In a surface mount type package of ball grid array (BGA), four chips 1 are mounted on a substrate 2 in such a manner such these are laid out in the form of an array of two rows and two columns. These four chips 1 are such that regarding the upper side and lower side, these are in linear symmetry with respect to a center line extending in a direction along long side edges of the substrate 2.

Abstract: A semiconductor device comprising a resin mold, two semiconductor chips positioned inside the resin mold and having front and back surfaces and external terminals formed on the front surfaces, and leads extending from the inside to the outside of the resin mold, wherein each of said leads is branched into two branch leads in at least the resin mold, the one branch lead is secured to the surface of the one semiconductor chip and is electrically connected to an external terminal on the surface thereof through a wire, the other branch lead is secured to the surface of the other semiconductor chip and is electrically connected to an external terminal on the surface thereof through a wire, and the two semiconductor chips are stacked one upon the other, with their back surfaces opposed to each other.

Abstract: The present invention provides a thin, inexpensive, high-performance semiconductor device provided with busbar leads, power leads and signal leads. A portion of the power lead connected to the busbar lead is depressed toward a major surface of a semiconductor chip to form depressed portion, and the depressed portion is bonded to the major surface of the semiconductor chip by an adhesive layer. The signal lead and the busbar lead are spaced apart from the major surface of the semiconductor chip.

Abstract: A chip mounting method is proposed which considers facilitating the testing of semiconductor chips when a plurality of semiconductor chips are sealed in a single resin sealing body. This method also considers its application to a variety of MCPs and system LSIs. In a single package, one signal output terminal of the first semiconductor chip and a first external terminal of the semiconductor device are internally connected independently. One signal input terminal of the second semiconductor chip and a second external terminal of the semiconductor device are internally connected independently. The first and second external terminals of the semiconductor device are connected outside the semiconductor device to complete the connection between the signal output terminal and the signal input terminal.

Abstract: For the manufacturing of semiconductor devices, in which multiple semiconductor chips which are mounted on a wiring substrate are processed for block molding and thereafter the wiring substrate is diced into individual resin-molded semiconductor devices, disclosed herein is a technique for easily determining the position of each resin-molded semiconductor device in its former state on the wiring substrate even after the dicing process. The processing steps include implementing the block molding with resin for multiple semiconductor chips mounted on a wiring substrate and thereafter dicing the wiring substrate into individual resin-molded semiconductor devices, with the substrate dicing step being preceded by a step of appending an address information pattern to each of the resin-molded semiconductor devices.

Abstract: Semiconductor chips (4), (5) are bonded and fixed to each other in a state where the rear surfaces of the respective semiconductor chips are faced to each other so that the other longer latus (4A2) of the semiconductor chip (4) and one longer latus (5A1) of the semiconductor chip (5) may confront the side of leads (10B), and supporting leads (8) are bonded and fixed onto the circuit forming surface (4A) of the semiconductor chip (4) or the circuit forming surface (5A) of the semiconductor chip (5). Owing to such a construction, the structure of a semiconductor device can be thinned.

Abstract: On an adapter mounting portion 3a having a projecting cross section which is formed on a cap 3 of a small-sized memory card 1, a recessed portion of an adapter 2 side is fitted so that both parts are formed as an integral unit in a replaceable manner. Accordingly, the small-sized memory card 1 can maintain the dimensional compatibility with respect to existing memory cards whereby the small-sized memory card 1 can be used also in equipment which is designed to cope with the existing memory cards.

Abstract: Two semiconductor chips sealed with a mold resin are stacked on each other so that their backs are opposite to each other. The two semiconductor chips are supported by suspension leads fixedly secured to a circuit forming surface (lower surface) of the lower chip. A pair of bus bar leads is placed in the vicinity of the sides of these chips, and a plurality of leads are placed thereoutside. Wires are bonded between one surfaces of both the bus bar leads and the leads and one of the two semiconductor chips. Further, wires are bonded between the other surfaces of both the bus bar leads and the leads and the other of the semiconductor chips. Thus, a semiconductor device wherein the two semiconductor chips are laminated and sealed with a resin, is reduced in manufacturing cost, and the thinning of the present semiconductor device is pushed forward.

Abstract: A LOC type semiconductor device comprises a semiconductor chip having a main surface in which semiconductor elements and a plurality of bonding pads are formed, and a back surface opposite the main surface; a plurality of leads each having an inner part and an outer part, and including a plurality of first leads having inner end portions extended on the main surface of the semiconductor chip and a plurality of second leads having inner end portions terminating near the semiconductor chip; bonding wires electrically connecting the bonding pads to bonding portions of the inner parts of the first and the second leads; and a sealing member sealing the semiconductor chip therein. A first bending portion is formed in the inner part of each second lead to prevent the sealing member from transformation by forming the sealing member in satisfactory resin balance between an upper portion and a lower portion of the sealing member.

Abstract: A semiconductor device comprising a resin mold, two semiconductor chips positioned inside the resin mold and having front and back surfaces and external terminals formed on the front surfaces, and leads extending from the inside to the outside of the resin mold, wherein each of said leads is branched into two branch leads in at least the resin mold, the one branch lead is secured to the surface of the one semiconductor chip and is electrically connected to an external terminal on the surface thereof through a wire, the other branch lead is secured to the surface of the other semiconductor chip and is electrically connected to an external terminal on the surface thereof through a wire, and the two semiconductor chips are stacked one upon the other, with their back surfaces opposed to each other.

Abstract: Semiconductor chips (4), (5) are bonded and fixed to each other in a state where the rear surfaces of the respective semiconductor chips are faced to each other so that the other longer latus (4A2) of the semiconductor chip (4) and one longer latus (5A1) of the semiconductor chip (5) may confront the side of leads (10B), and supporting leads (8) are bonded and fixed onto the circuit forming surface (4A) of the semiconductor chip (4) or the circuit forming surface (5A) of the semiconductor chip (5). Owing to such a construction, the structure of a semiconductor device can be thinned.

Abstract: A LOC type semiconductor device comprises a semiconductor chip having a main surface in which semiconductor elements and a plurality of bonding pads are formed, and a back surface opposite the main surface; a plurality of leads each having an inner part and an outer part, and including a plurality of first leads having inner end portions extended on the main surface of the semiconductor chip and a plurality of second leads having inner end portions terminating near the semiconductor chip; bonding wires electrically connecting the bonding pads to bonding portions of the inner parts of the first and the second leads; and a sealing member sealing the semiconductor chip therein. A first bending portion is formed in the inner part of each second lead to prevent the sealing member from transformation by forming the sealing member in satisfactory resin balance between an upper portion and a lower portion of the sealing member.

Abstract: Two memory chips mounted over a base substrate have the same external size and a flash memory of the same memory capacity formed thereon. These memory chips are mounted over the base substrate with one of them being overlapped with the upper portion of the other one, and they are stacked with their faces being turned in the same direction. The bonding pads BP of one of the memory chips are disposed in the vicinity of the bonding pads BP of the other memory chip. In addition, the upper memory chip is stacked over the lower memory chip in such a way that the upper memory chip is slid in a direction (X direction) parallel to the one side of the lower memory chip and in a direction (Y direction) perpendicular thereto in order to prevent partial overlapping of it with the bonding pads BP of the lower memory chip.

Abstract: In the manufacture of a semiconductor device by adopting a block molding method wherein a semiconductor chip is fixed onto a wiring substrate through an adhesive, the occurrence of a defect caused by flowing-out of the adhesive is to be prevented. The semiconductor device according to the present invention comprises a wiring substrate, the wiring substrate having a main surface, an insulating film formed on the main surface, and electrodes formed on the main surface so as to be exposed from the insulating film, a semiconductor chip fixed through an adhesive onto the insulating film formed on the main surface of the wiring substrate, conductive wires for connecting the electrodes on the main surface of the wiring substrate and electrodes on the semiconductor chip with each other, and a seal member, i.e.

Abstract: On an adapter mounting portion 3a having a projecting cross section which is formed on a cap 3 of a small-sized memory card 1, a recessed portion of an adapter 2 side is fitted so that both parts are formed as an integral unit in a replaceable manner. Accordingly, the small-sized memory card 1 can maintain the dimensional compatibility with respect to existing memory cards whereby the small-sized memory card 1 can be used also in equipment which is designed to cope with the existing memory cards.

Abstract: A chip mounting method is proposed which considers facilitating the testing of semiconductor chips when a plurality of semiconductor chips are sealed in a single resin sealing body. This method also considers its application to a variety of MCPs and system LSIs. In a single package, one signal output terminal of the first semiconductor chip and a first external terminal of the semiconductor device are internally connected independently. One signal input terminal of the second semiconductor chip and a second external terminal of the semiconductor device are internally connected independently. The first and second external terminals of the semiconductor device are connected outside of the semiconductor device to complete the connection between the signal output terminal and the signal input terminal.

Abstract: On an adapter mounting portion 3a having a projecting cross section which is formed on a cap 3 of a small-sized memory card 1, a recessed portion of an adapter 2 side is fitted so that both parts are formed as an integral unit in a replaceable manner Accordingly, the small-sized memory card 1 can maintain the dimensional compatibility with respect to existing memory cards whereby the small-sized memory card 1 can be used also in equipment which is designed to cope with the existing memory cards.