Patents by Inventor Masafumi Morisue

Masafumi Morisue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7635889
    Abstract: Conductive layers having knots are adjacently formed with uniform distance therebetween. Droplets of the conductive layers are discharged to stagger centers of the droplets in a length direction of wirings so that the centers of the discharged droplets are not on the same line in a line width direction between the adjacent conductive layers. Since the centers of the droplets are staggered, parts of the conductive layers each having a widest line width (the widest width of knot) are not connected to each other, and the conductive layers can be formed adjacently with a shorter distance therebetween.
    Type: Grant
    Filed: January 17, 2006
    Date of Patent: December 22, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshiyuki Isa, Gen Fujii, Masafumi Morisue, Ikuko Kawamata
  • Publication number: 20090291552
    Abstract: The invention provides a manufacturing method of a substrate having a film pattern including an insulating film, a semiconductor film, a conductive film and the like by simple steps, and also a manufacturing method of a semiconductor device which is low in cost with high throughput and yield. According to the invention, after forming a first protective film which has low wettability on a substrate, a material which has high wettability is applied or discharged on an outer edge of a first mask pattern, thereby a film pattern and a substrate having the film pattern are formed.
    Type: Application
    Filed: August 6, 2009
    Publication date: November 26, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shinji MAEKAWA, Gen FUJII, Hiroko SHIROGUCHI, Masafumi MORISUE
  • Patent number: 7608531
    Abstract: To provide a semiconductor device and a display device which can be manufactured through a simplified process and the manufacturing technique. Another object is to provide a technique by which a pattern of wirings or the like which is partially constitutes a semiconductor device or a display device can be formed with a desired shape with controllability.
    Type: Grant
    Filed: January 17, 2006
    Date of Patent: October 27, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshiyuki Isa, Masafumi Morisue, Ikuko Kawamata
  • Publication number: 20090224237
    Abstract: To provide a semiconductor device and a display device which can be manufactured through a simplified process and the manufacturing technique. Another object is to provide a technique by which a pattern of wirings or the like which is partially constitutes a semiconductor device or a display device can be formed with a desired shape with controllability.
    Type: Application
    Filed: May 12, 2009
    Publication date: September 10, 2009
    Inventors: Toshiyuki Isa, Masafumi Morisue, Ikuko Kawamata
  • Patent number: 7582904
    Abstract: The purpose of the present invention is to provide a semiconductor device or a display device that can be manufactured by improving the use efficiency of a material as well as simplifying the manufacturing process, and a manufacturing technique of those devices. Also, another purpose of the present invention is to provide a technique for forming a pattern of wirings, etc., constituting the semiconductor device or the display device, in a desired shape and with good adhesiveness. The adhesiveness between first and second conductive layers is increased by forming a conductive buffer layer including at least one pore between them. The second conductive layer is formed by filling the pores of the buffer layer including at least one pore with a particle shaped conductive material which is solidified by baking. The conductive layer solidified in the pores functions like a wedge, and the second conductive layer is formed over the first conductive layer with good adhesiveness and stability.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: September 1, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Gen Fujii, Masafumi Morisue
  • Publication number: 20090117681
    Abstract: The object of the present invention is to miniaturize the area occupied by the element and to integrate a plenty of elements in a limited area so that the sensor element can have higher output and smaller size. In the present invention, higher output and miniaturization are achieved by uniting a sensor element using an amorphous semiconductor film (typically an amorphous silicon film) and an output amplifier circuit including a TFT with a semiconductor film having a crystal structure (typically a poly-crystalline silicon film) used as an active layer over a plastic film substrate that can resist the temperature in the process for mounting such as a solder reflow process. According to the present invention, the sensor element that can resist the bending stress can be obtained.
    Type: Application
    Filed: January 6, 2009
    Publication date: May 7, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Junya Maruyama, Toru Takayama, Masafumi Morisue, Ryosuke Watanabe, Eiji Sugiyama, Susumu Okazaki, Kazuo Nishi, Jun Koyama, Takeshi Osada, Takanori Matsuzaki
  • Patent number: 7521383
    Abstract: A first layer (an insulating layer), a second layer (a metal layer), and a third layer (an insulating layer) are formed over a substrate. Then, a fourth layer including a semiconductor element is formed over the third layer. After applying an organic resin film covering the fourth layer, laser light is irradiated to sections of a rear surface side of the substrate. By irradiating the second layer with laser light, the state of being covered with the organic resin film can be maintained at the same time as forming a space under the organic resin film by ablating (alternatively, evaporating or breaking down) an irradiated region of the second layer, to cause a lift in the film in a periphery thereof.
    Type: Grant
    Filed: June 21, 2006
    Date of Patent: April 21, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masafumi Morisue, Ryosuke Watanabe, Junya Maruyama, Daiki Yamada
  • Patent number: 7517791
    Abstract: It is an object of the present invention to provide a method for manufacturing a semiconductor device in which a contact hole with an opening having a high aspect ratio can be favorably filled without using a conventional CMP process. It is another object of the present invention to provide a method for forming a wiring with fewer steps than a conventional method and to provide a method for manufacturing a highly integrated semiconductor device with a high yield. According to the present invention, a film having a water repellent surface is formed over a surface of an insulating film having plural air holes, a region having a hydrophilic surface is formed by irradiating with light a part of the film having the water repellent surface, and a conductive film is formed by discharging and baking a liquid material having a conductive particle over the region having the hydrophilic surface.
    Type: Grant
    Filed: November 22, 2005
    Date of Patent: April 14, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masafumi Morisue, Shunpei Yamazaki
  • Publication number: 20090075476
    Abstract: The manufacturing method of a substrate having a conductive layer has the steps of: forming an inorganic insulating layer over a substrate; forming an organic resin layer with a desired shape over the inorganic insulating layer; forming a low wettability layer with respect to a composition containing conductive particles on a first exposed portion of the inorganic insulating layer; removing the organic resin layer; and coating a second exposed portion of the inorganic insulating layer with a composition containing conductive particles and baking, thereby forming a conductive layer.
    Type: Application
    Filed: November 10, 2008
    Publication date: March 19, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Gen FUJII, Masafumi MORISUE, Hironobu SHOJI, Junya MARUYAMA, Kouji DAIRIKI, Tomoyuki AOKI
  • Patent number: 7495272
    Abstract: The area occupied by a photo-sensor element may be reduced and multiple elements may be integrated in a limited area so that the sensor element can have higher output and smaller size. Higher output and miniaturization are achieved by uniting a sensor element using an amorphous semiconductor film (typically an amorphous silicon film) and an output amplifier circuit including a TFT with a semiconductor film having a crystal structure (typically a poly-crystalline silicon film) used as an active layer over a plastic film substrate that can resist the temperature in the process for mounting such as a solder reflow process. A sensor element that can resist bending stress can be obtained.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: February 24, 2009
    Assignee: Semiconductor Energy Labortaory Co., Ltd.
    Inventors: Junya Maruyama, Toru Takayama, Masafumi Morisue, Ryosuke Watanabe, Eiji Sugiyama, Susumu Okazaki, Kazuo Nishi, Jun Koyama, Takeshi Osada, Takanori Matsuzaki
  • Patent number: 7476572
    Abstract: An object of the invention is to provide a method for manufacturing a thin film transistor in a self-aligning manner by using the droplet discharging method regardless of the accuracy of a discharge position for a droplet discharging device. In view of the object, an organic resin film or the like is applied and processed into a predetermined shape by etch-back, exposure, development and the like. By utilizing the organic resin film with the predetermined shape as a mask, a semiconductor layer containing an impurity of one conductivity type is etched. By utilizing the organic resin film with the predetermined shape, regions with different wettabilities are formed.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: January 13, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masafumi Morisue, Gen Fujii
  • Patent number: 7449372
    Abstract: The manufacturing method of a substrate having a conductive layer has the steps of: forming an inorganic insulating layer over a substrate; forming an organic resin layer with a desired shape over the inorganic insulating layer; forming a low wettability layer with respect to a composition containing conductive particles on a first exposed portion of the inorganic insulating layer; removing the organic resin layer; and coating a second exposed portion of the inorganic insulating layer with a composition containing conductive particles and baking, thereby forming a conductive layer.
    Type: Grant
    Filed: December 7, 2005
    Date of Patent: November 11, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Gen Fujii, Masafumi Morisue, Hironobu Shoji, Junya Maruyama, Kouji Dairiki, Tomoyuki Aoki
  • Publication number: 20080087888
    Abstract: A method for easily forming a region with conductivity and high wettability without a step for removing a photocatalytic reaction layer, which is formed over a conductive layer, is proposed. The photocatalytic reaction layer is formed over a photocatalytic conductive layer, and the photocatalytic conductive layer is irradiated with ultraviolet light to form a region with conductivity and higher wettability than the photocatalytic reaction layer on a surface of the photocatalytic conductive layer which is irradiated with ultraviolet light. Note that for the photocatalytic conductive layer, a layer having a photocatalytic property of which resistivity is lower than or equal to 1×10?2 ? cm can be used.
    Type: Application
    Filed: October 12, 2007
    Publication date: April 17, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Masafumi Morisue
  • Publication number: 20080090341
    Abstract: A tube is arranged to be in contact with an insulating layer in an opening formation region, and a treatment agent (etching gas or etchant) is discharged to the insulating layer through the tube. With the discharged treatment agent (etching gas or etchant), the insulating layer is selectively removed to form an opening in the insulating layer. Therefore, the insulating layer provided with the opening is formed over a first conductive layer, and the first conductive layer below the insulating layer is exposed at the bottom of the opening. A second conductive layer is formed in the opening to be in contact with an exposed part of the first conductive layer, so that the first conductive layer and the second conductive layer are electrically connected in the opening provided in the insulating layer.
    Type: Application
    Filed: October 11, 2007
    Publication date: April 17, 2008
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Koichiro TANAKA, Masafumi MORISUE
  • Publication number: 20080057605
    Abstract: An object is to provide a method for manufacturing a highly-reliable semiconductor device with an improved material use efficiency and with a simplified manufacturing process. The method includes the steps of forming a conductive layer over a substrate, forming a light-transmitting layer over the conductive layer, and selectively removing the conductive layer and the light-transmitting layer by irradiation with a femtosecond laser beam from above the light-transmitting layer. Note that the conductive layer and the light-transmitting layer may be removed so that an end portion of the light-transmitting layer is located on an inner side than an end portion of the conductive layer. Before the irradiation with a femtosecond laser beam, a surface of the light-transmitting layer may be subjected to liquid-repellent treatment.
    Type: Application
    Filed: August 29, 2007
    Publication date: March 6, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masafumi Morisue, Koichiro Tanaka
  • Publication number: 20070295973
    Abstract: The present invention provides a manufacturing technique of a semiconductor device and a display device using a peeling process, in which a transfer process can be conducted with a good state in which a shape and property of an element before peeling are kept. Further, the present invention provides a manufacturing technique of more highly reliable semiconductor devices and display devices with high yield without complicating the apparatus and the process for manufacturing. According to the present invention, an organic compound layer including a photocatalyst substance is formed over a first substrate having a light-transmitting property, an element layer is formed over the organic compound layer including a photocatalyst substance, the organic compound layer including a photocatalyst substance is irradiated with light which has passed through the first substrate, and the element layer is peeled from the first substrate.
    Type: Application
    Filed: February 14, 2007
    Publication date: December 27, 2007
    Inventors: Yasuhiro Jinbo, Masafumi Morisue, Hajime Kimura, Shunpei Yamazaki
  • Publication number: 20070207571
    Abstract: A method for manufacturing a semiconductor device includes: forming a photocatalytic layer and an organic compound layer in contact with the photocatalytic layer over a substrate having a light transmitting property; forming an element forming layer over the substrate having the light transmitting property with the photocatalytic layer and the organic compound layer in contact with the photocatalytic layer interposed therebetween; and separating the element forming layer from the substrate having the light transmitting property after the photocatalytic layer is irradiated with light through the substrate having the light transmitting property.
    Type: Application
    Filed: February 22, 2007
    Publication date: September 6, 2007
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Masafumi Morisue, Yasuhiro Jinbo, Gen Fujii, Hajime Kimura
  • Publication number: 20070196962
    Abstract: An object of the invention is to provide a method for manufacturing a thin film transistor in a self-aligning manner by using the droplet discharging method regardless of the accuracy of a discharge position for a droplet discharging device. In view of the object, an organic resin film or the like is applied and processed into a predetermined shape by etch-back, exposure, development and the like. By utilizing the organic resin film with the predetermined shape as a mask, a semiconductor layer containing an impurity of one conductivity type is etched. By utilizing the organic resin film with the predetermined shape, regions with different wettabilities are formed.
    Type: Application
    Filed: March 15, 2005
    Publication date: August 23, 2007
    Applicant: Semiconductor Energy Laboratory Co. Ltd.
    Inventors: Masafumi Morisue, Gen Fujii
  • Publication number: 20070190675
    Abstract: A highly functional and reliable display device with lower power consumption and higher light-emitting efficiency is provided. A light-emitting material is irradiated with light; the light-emitting material irradiated with light is dispersed in a solution containing a binder, and a solution containing the light-emitting material irradiated with light and the binder is formed; a first electrode layer is formed; the solution is applied on the first electrode layer, and a light-emitting layer containing the light-emitting material irradiated with light and the binder is formed; and a second electrode layer is formed over the light-emitting layer, and a light-emitting element is manufactured. An insulating layer may be provided between the first electrode layer and the light-emitting layer or between the second electrode layer and the light-emitting layer.
    Type: Application
    Filed: February 6, 2007
    Publication date: August 16, 2007
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Shinobu FURUKAWA, Masafumi MORISUE, Gen FUJII
  • Publication number: 20070004233
    Abstract: A first layer (an insulating layer), a second layer (a metal layer), and a third layer (an insulating layer) are formed over a substrate. Then, a fourth layer including a semiconductor element is formed over the third layer. After applying an organic resin film covering the fourth layer, laser light is irradiated to sections of a rear surface side of the substrate. By irradiating the second layer with laser light, the state of being covered with the organic resin film can be maintained at the same time as forming a space under the organic resin film by ablating (alternatively, evaporating or breaking down) an irradiated region of the second layer, to cause a lift in the film in a periphery thereof.
    Type: Application
    Filed: June 21, 2006
    Publication date: January 4, 2007
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Masafumi MORISUE, Ryosuke WATANABE, Junya MARUYAMA, Daiki YAMADA