Patents by Inventor Masahiko Kuraguchi

Masahiko Kuraguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220115529
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first and second semiconductor layers, a nitride layer, and an oxide layer. A direction from the second electrode toward the first electrode is aligned with a first direction. A position in the first direction of the third electrode is between the first electrode and the second electrode in the first direction. The first semiconductor layer includes first to fifth partial regions. The first partial region is between the fourth and third partial regions in the first direction. The second partial region is between the third and fifth partial regions in the first direction. The nitride layer includes first and second nitride regions. The second semiconductor layer includes first and second semiconductor regions. The oxide layer includes silicon and oxygen. The oxide layer includes first to third oxide regions.
    Type: Application
    Filed: December 22, 2021
    Publication date: April 14, 2022
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Yosuke Kajiwara, Daimotsu Kato, Masahiko Kuraguchi
  • Publication number: 20220102544
    Abstract: A semiconductor device according to an embodiment includes a nitride semiconductor layer; an insulating layer; a first region disposed between the nitride semiconductor layer and the insulating layer and containing at least one element of hydrogen and deuterium; and a second region disposed in the nitride semiconductor layer, adjacent to the first region, and containing fluorine.
    Type: Application
    Filed: December 8, 2021
    Publication date: March 31, 2022
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tatsuo SHIMIZU, Masahiko KURAGUCHI, Toshiya YONEHARA, Akira MUKAI
  • Publication number: 20220102512
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor layer, a second semiconductor layer, and a first insulating layer. A position of the third electrode in a first direction is between a position of the first electrode in the first direction and a position of the second electrode in the first direction. The first semiconductor layer includes Alx1Ga1-x1N and includes a first partial region, a second partial region, and a third partial region. The second semiconductor layer includes Alx2Ga1-x2N. A portion of the second semiconductor layer is between the third partial region and the third electrode in the second direction. The first insulating layer includes a first insulating region. The first insulating region is between the third electrode and the portion of the second semiconductor layer in the second direction.
    Type: Application
    Filed: November 3, 2021
    Publication date: March 31, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki HIKOSAKA, Hiroshi ONO, Jumpei TAJIMA, Masahiko KURAGUCHI, Shinya NUNOUE
  • Patent number: 11276778
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor member, a first source electrode, a first gate electrode, a first drain electrode, a source pad part, a first source connection part, and an insulating part. The semiconductor member includes first and second semiconductor layers. The first gate electrode includes first to fourth portions. The first source electrode is between the first and second portions in a first direction, and is between the third and fourth portions in a second. The first drain electrode extends along the first direction. The first source electrode is between the third portion and the first drain electrode in the second direction. The first source connection part electrically connects the first source electrode and the source pad part. A portion of the first insulating region of the insulating part is between the first portion and the first source connection part.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: March 15, 2022
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke Kajiwara, Masahiko Kuraguchi
  • Patent number: 11251293
    Abstract: According to one embodiment, a semiconductor device includes first to fourth semiconductor regions, and an insulating part. The third electrode is between the first and second electrodes in a first direction from the first electrode toward the second electrode. The first semiconductor region includes Alx1Ga1-x1N and includes first to fifth partial regions. A second direction from the first partial region toward the first electrode crosses the first direction. The second semiconductor region includes Alx2Ga1-x2N and includes sixth and seventh partial regions. The third semiconductor region includes Alx3Ga1-x3N and includes an eighth partial region between the fifth and seventh partial regions. The fourth semiconductor region includes Alx4Ga1-x4N and includes a first portion between the fifth and eighth partial regions. The fourth semiconductor region includes a first element not included the first to third semiconductor regions. The insulating part includes first to third insulating regions.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: February 15, 2022
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke Kajiwara, Hiroshi Ono, Jumpei Tajima, Toshiki Hikosaka, Shinya Nunoue, Masahiko Kuraguchi
  • Publication number: 20220045202
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first and second semiconductor layers, and an insulating member. The third electrode in a first direction is between the first and second electrodes in the first direction. The first direction is from the first toward second electrode. The first semiconductor layer includes Alx1Ga1-x1N (0?x1<1), and first to sixth partial regions. A second direction from the first partial region toward the first electrode crosses the first direction. The second semiconductor layer includes Alx2Ga1-x2N (0<x2<1 and x1<x2), and first and second semiconductor regions. A direction from the fourth partial region toward the first semiconductor region is along the second direction. A direction toward the second semiconductor region from the fifth and sixth partial regions is along the second direction. The insulating member includes first to third insulating regions.
    Type: Application
    Filed: January 19, 2021
    Publication date: February 10, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke KAJIWARA, Aya SHINDOME, Masahiko KURAGUCHI
  • Patent number: 11227942
    Abstract: A semiconductor device according to an embodiment includes a nitride semiconductor layer; an insulating layer; a first region disposed between the nitride semiconductor layer and the insulating layer and containing at least one element of hydrogen and deuterium; and a second region disposed in the nitride semiconductor layer, adjacent to the first region, and containing fluorine.
    Type: Grant
    Filed: August 24, 2018
    Date of Patent: January 18, 2022
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tatsuo Shimizu, Masahiko Kuraguchi, Toshiya Yonehara, Akira Mukai
  • Patent number: 11211463
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor layer, a second semiconductor layer, and a first insulating layer. A position of the third electrode in a first direction is between a position of the first electrode in the first direction and a position of the second electrode in the first direction. The first semiconductor layer includes Alx1Ga1-x1N and includes a first partial region, a second partial region, and a third partial region. The second semiconductor layer includes Alx2Ga1-x2N. A portion of the second semiconductor layer is between the third partial region and the third electrode in the second direction. The first insulating layer includes a first insulating region. The first insulating region is between the third electrode and the portion of the second semiconductor layer in the second direction.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: December 28, 2021
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki Hikosaka, Hiroshi Ono, Jumpei Tajima, Masahiko Kuraguchi, Shinya Nunoue
  • Publication number: 20210384337
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first to third nitride regions, and first and second insulating films. The first nitride region includes Alx1Ga1?x1N, and includes first and second partial regions, a third partial region between the first and second partial regions, a fourth partial region between the first and third partial regions, and a fifth partial region between the third and second partial regions. The first nitride region includes first to fifth partial regions. The second nitride region includes Alx2Ga1?x2N, and sixth and seventh partial regions. At least a portion of the third electrode is between the sixth and seventh partial regions. The first insulating film includes silicon and oxygen and includes first and second insulating regions. The third nitride region includes Alx3Ga1?x3N, and first to seventh portions. The second insulating film includes silicon and oxygen and includes third to seventh insulating regions.
    Type: Application
    Filed: August 20, 2021
    Publication date: December 9, 2021
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Daimotsu KATO, Yosuke KAJIWARA, Akira MUKAI, Aya SHINDOME, Hiroshi ONO, Masahiko KURAGUCHI
  • Patent number: 11189718
    Abstract: According to one embodiment, a semiconductor device includes first, second and third electrodes, first and second semiconductor layers, a first conductive part, first and second insulating layers. The third electrode includes first and second portions. The first portion is between the first electrode and the second electrode. The first semiconductor layer includes first, second, third, fourth and fifth partial regions. The third partial region is between the first and second partial regions. The fourth partial region is between the first and third partial regions. The fifth partial region is between the third and second partial regions. The second semiconductor layer includes first and second semiconductor regions. The first conductive part is electrically connected to the first electrode. The first insulating layer includes a first insulating portion. The second insulating layer includes first and second insulating regions.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: November 30, 2021
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Masahiko Kuraguchi, Yosuke Kajiwara, Aya Shindome, Hiroshi Ono, Daimotsu Kato, Akira Mukai
  • Publication number: 20210327711
    Abstract: According to one embodiment, a semiconductor device includes a first transistor, and a first mounting member. The first transistor includes a nitride semiconductor layer and includes a first element electrode, a second element electrode, and a third element electrode. The first mounting member includes a first frame electrode, a plurality of first frame connection members electrically connecting the first element electrode and the first frame electrode, a first pad electrode, and a first pad connection member electrically connecting the first element electrode and the first pad electrode.
    Type: Application
    Filed: January 5, 2021
    Publication date: October 21, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke KAJIWARA, Masahiko KURAGUCHI
  • Patent number: 11152480
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first conductive member, a first semiconductor layer, a second semiconductor layer, and an insulating member. The third electrode is between the first electrode and the second electrode. The first conductive member is electrically connected to the first electrode. The first conductive member is between the third electrode and the second electrode. The first semiconductor layer includes Alx1Ga1?x1N and includes first, second, third, fourth, and fifth partial regions. The second semiconductor layer includes Alx2Ga1?x2N and includes a first semiconductor region and a second semiconductor region. The insulating member includes first, second, third, fourth, and fifth insulating regions. The first insulating region is between the third partial region and the third electrode. The second insulating region is between the fifth partial region and the first conductive member.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: October 19, 2021
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Aya Shindome, Masahiko Kuraguchi
  • Patent number: 11139393
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first to third nitride regions, and first and second insulating films. The first nitride region includes Alx1Ga1-x1N, and includes first and second partial regions, a third partial region between the first and second partial regions, a fourth partial region between the first and third partial regions, and a fifth partial region between the third and second partial regions. The first nitride region includes first to fifth partial regions. The second nitride region includes Alx2Ga1-x2N, and sixth and seventh partial regions. At least a portion of the third electrode is between the sixth and seventh partial regions. The first insulating film includes silicon and oxygen and includes first and second insulating regions. The third nitride region includes Alx3Ga1-x3N, and first to seventh portions. The second insulating film includes silicon and oxygen and includes third to seventh insulating regions.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: October 5, 2021
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Daimotsu Kato, Yosuke Kajiwara, Akira Mukai, Aya Shindome, Hiroshi Ono, Masahiko Kuraguchi
  • Publication number: 20210257469
    Abstract: According to one embodiment, a semiconductor device includes first, second and third conductive parts, a first semiconductor region, and a first insulating part. A direction from the first conductive part toward the second conductive part is along a first direction. The first semiconductor region includes first, second, and third partial regions. A second direction from the first partial region toward the second partial region crosses the first direction. The third partial region is between the first partial region and the second conductive part in the first direction. The third partial region includes an opposing surface facing the second conductive part. A direction from the opposing surface toward the third conductive part is along the second direction. The first insulating part includes a first insulating region. At least a portion of the first insulating region is between the opposing surface and the third conductive part.
    Type: Application
    Filed: September 9, 2020
    Publication date: August 19, 2021
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tomoaki INOKUCHI, Hiro GANGI, Yusuke KOBAYASHI, Masahiko KURAGUCHI, Kazuto TAKAO, Ryosuke IIJIMA, Tatsuo SHIMIZU, Tatsuya NISHIWAKI
  • Patent number: 11088269
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first nitride region, a second nitride region, and a first insulating film. The first nitride region includes Alx1Ga1-x1N. The first nitride region includes first and second partial regions, a third partial region between the first and second partial regions, a fourth partial region between the first and third partial regions, and a fifth partial region between the third and second partial regions. The second nitride region includes Alx2Ga1-x2N. The second nitride region includes sixth and seventh partial regions. The first insulating film includes a first insulating region and is between the third partial region and the third electrode. The third partial region has a first surface opposing the first insulating region. The fourth partial region has a second surface opposing the sixth partial region.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: August 10, 2021
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Daimotsu Kato, Yosuke Kajiwara, Akira Mukai, Aya Shindome, Hiroshi Ono, Masahiko Kuraguchi
  • Publication number: 20210234032
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first and second semiconductor layers, a nitride layer, and an oxide layer. A direction from the second electrode toward the first electrode is aligned with a first direction. A position in the first direction of the third electrode is between the first electrode and the second electrode in the first direction. The first semiconductor layer includes first to fifth partial regions. The first partial region is between the fourth and third partial regions in the first direction. The second partial region is between the third and fifth partial regions in the first direction. The nitride layer includes first and second nitride regions. The second semiconductor layer includes first and second semiconductor regions. The oxide layer includes silicon and oxygen. The oxide layer includes first to third oxide regions.
    Type: Application
    Filed: April 16, 2021
    Publication date: July 29, 2021
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Yosuke Kajiwara, Daimotsu Kato, Masahiko Kuraguchi
  • Publication number: 20210234012
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, and a nitride member. A position of the third electrode in a first direction is between a position of the first electrode in the first direction and a position of the second electrode in the first direction. The nitride member includes a first nitride layer and a second nitride layer. The first nitride layer includes first, second, and third partial regions. The first electrode includes first, second, and third conductive portions, and a first conductive layer. The first, second, third conductive portions, and a portion of the second nitride layer are between the first partial region and the first conductive layer. The first, second, and third conductive portions are electrically connected to the first conductive layer. The second nitride layer includes a first region between the first and second conductive portions.
    Type: Application
    Filed: September 9, 2020
    Publication date: July 29, 2021
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Hiroshi ONO, Yosuke KAJIWARA, Masahiko KURAGUCHI
  • Publication number: 20210218394
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor member, a gate electrode, a source electrode, a drain electrode, a conductive member, a gate terminal, and a first circuit. The semiconductor member includes a first semiconductor layer including a first partial region and including Alx1Ga1?x1N (0?x1?1), and a second semiconductor layer including Alx2Ga1?x2N (0<x2?1 and x1<x2). The first partial region is between the gate electrode and at least a portion of the conductive member in a first direction. The gate terminal is electrically connected to the gate electrode. The first circuit is configured to apply a first voltage to the conductive member based on a gate voltage applied to the gate terminal. The first voltage has a reverse polarity of a polarity of the gate voltage.
    Type: Application
    Filed: September 11, 2020
    Publication date: July 15, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masahiko KURAGUCHI, Yosuke KAJIWARA, Kentaro IKEDA
  • Publication number: 20210217747
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor member, a first gate electrode, a second gate electrode, a first control transistor part, a gate interconnect, and a control gate interconnect. The semiconductor member includes first and second semiconductor layers. The semiconductor member includes first and second regions, and a first control region. The first and second gate electrodes extend along a first direction. A direction from the first region toward at least a portion of the first gate electrode is along a second direction crossing the first direction. The first control transistor part includes a first control gate electrode and a first control drain electrode. The first control drain electrode is electrically connected to the first and second gate electrodes. The gate interconnect is electrically connected to the first and second gate electrodes. The control gate interconnect is electrically connected to the first control gate electrode.
    Type: Application
    Filed: September 10, 2020
    Publication date: July 15, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masahiko KURAGUCHI, Kentaro IKEDA
  • Patent number: 11043452
    Abstract: According to one embodiment, a semiconductor device includes first to fourth electrodes, a semiconductor layer, a first extension conductive layer, first and second electrode connection portions, and an insulating member. The first to fourth electrodes extend along a first direction. The first electrode is between the second and third electrodes in a second direction. The second direction crosses the first direction. The first extension conductive layer extends along the first direction and is electrically connected to the first electrode. The fourth electrode is between the first and third electrodes in the second direction. The first electrode connection portion is electrically connected to the first electrode. The second electrode connection portion is electrically connected to the second and fourth electrodes. The insulating member includes a first insulating portion. The first insulating portion is between the second electrode connection portion and a portion of the first electrode.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: June 22, 2021
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Yosuke Kajiwara, Masahiko Kuraguchi