Patents by Inventor Masahiko Miwa

Masahiko Miwa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11903299
    Abstract: A TEG near the perimeter of a frame region is away from a TFT, which is disposed in a display region and is actually used for screen display. Hence, the characteristics of the TEG can change in a manner different from that in the characteristics of the TFT within the display region. Accordingly, provided is a display device that includes a TEG pattern disposed between the display region and a trench, and includes a dummy pixel circuit disposed between the display region and a barrier wall. The TEG pattern is outside the display region and is adjacent to at least the dummy pixel circuit.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: February 13, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Takao Saitoh, Masahiko Miwa, Masaki Yamanaka, Yi Sun, Yohsuke Kanzaki, Seiji Kaneko
  • Patent number: 11871615
    Abstract: A display device includes: a base substrate; a TFT layer including a plurality of pixel circuits arranged; and a light-emitting element layer. Each of the plurality of pixel circuits includes: a TFT including a semiconductor layer, a gate insulating film, and a gate electrode; and a capacitor including the gate electrode, a first inorganic insulating film, and a capacitive electrode. The capacitive electrode extends all around a perimeter of the gate electrode and extends to an outside of the perimeter. An angle formed between an upper surface of the base substrate and at least a part of an end surface in a circumferential direction of the gate electrode not overlapping the semiconductor layer in the plan view is greater than an angle formed between the upper surface of the base substrate and an end surface of the gate electrode overlapping the semiconductor layer in the plan view.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: January 9, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Takao Saitoh, Masahiko Miwa, Yohsuke Kanzaki, Masaki Yamanaka, Yi Sun
  • Publication number: 20230413615
    Abstract: According to an aspect pf the disclosure, a display device includes a base substrate; a thin film transistor layer provided on the base substrate and including a wiring layer; and a light-emitting element layer provided on the thin film transistor layer and including a plurality of first electrodes, a plurality of functional layers, and a common, second electrode, which are sequentially stacked in such a manner as to correspond to a plurality of subpixels in a display area.
    Type: Application
    Filed: September 23, 2020
    Publication date: December 21, 2023
    Inventors: TAKAO SAITOH, YOHSUKE KANZAKI, MASAKI YAMANAKA, YI SUN, MASAHIKO MIWA
  • Publication number: 20230329038
    Abstract: A capacitor (9ha) includes a gate electrode (14a), a first interlayer insulating film (15), a capacitance electrode (16c), and a capacitance wiring line (18ha). The capacitance wiring line (18ha) is electrically connected to the capacitance electrode (16c). A capacitance of the capacitor (9ha) is formed between the gate electrode (14a) and the capacitance electrode (16c) and the capacitance wiring line (18ha) arranged facing each other across the first interlayer insulating film (15). A line width (W18h) of the capacitance wiring line (18ha) is equal to or greater than a line width (W16c) of the capacitance electrode (16c) and equal to or less than a line width (W14a) of the gate electrode (14a).
    Type: Application
    Filed: September 8, 2020
    Publication date: October 12, 2023
    Inventors: TAKAO SAITOH, YOHSUKE KANZAKI, MASAKI YAMANAKA, MASAHIKO MIWA, YI SUN
  • Patent number: 11699778
    Abstract: A display device includes: an underlayer, a first insulating film contacting an upper face of the underlayer, a semiconductor layer, a second insulating film, a first metal layer, a first resin layer, a first electrode, and a second resin layer, in order from a lower layer, wherein at least one of the underlayer, the first resin layer, and the second resin layer is a thin film layer having a maximum film thickness in a display region provided with a light-emitting element being thicker than a maximum film thickness in a frame region surrounding the display region.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: July 11, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Takao Saitoh, Yi Sun, Yohsuke Kanzaki, Masaki Yamanaka, Masahiko Miwa, Seiji Kaneko
  • Patent number: 11681388
    Abstract: A display device includes a plurality of upper layer electrodes including a first upper layer electrode and a second upper layer electrode electrically separated from the first upper layer electrode, and a lower layer electrode provided in common with the first upper layer electrode and a second upper layer electrode and overlapping with the first upper layer electrode and the second upper layer electrode via an insulating film. The first upper layer electrode includes a first protrusion protruding toward the second upper layer electrode, and the second upper layer electrode includes a second protrusion protruding toward the first upper layer electrode. The lower layer electrode is provided with a wide portion having a width greater than those of the first protrusion and the second protrusion, the wide portion overlapping at least with a gap between the first protrusion and the second protrusion.
    Type: Grant
    Filed: April 19, 2019
    Date of Patent: June 20, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Masaki Yamanaka, Yi Sun, Takao Saitoh, Masahiko Miwa, Yohsuke Kanzaki
  • Patent number: 11659746
    Abstract: A first wiring line and a second wiring line are extended to an upper face of a resin substrate exposed from a slit formed in at least one layer of an inorganic insulating film, a first flattening film is provided within the slit which exposes the upper face of the resin substrate between the portions to which the first wiring line and the second wiring line are extended, and the first wiring line and the second wiring line are electrically connected to each other via a third wiring line provided between an end face of the first flattening film and the upper face of the resin substrate.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: May 23, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Takao Saitoh, Seiji Kaneko, Yohsuke Kanzaki, Masahiko Miwa, Masaki Yamanaka, Yi Sun
  • Publication number: 20230152647
    Abstract: A display device of the present disclosure has the following: a display region including a thin-film transistor; a frame region surrounding the display region; a terminal section provided in the frame region; a resin layer provided above a base; an inorganic insulating layer provided on the resin layer and having an opening; and a conductive pattern provided on the inorganic insulating layer in a location except a location over the opening.
    Type: Application
    Filed: April 20, 2020
    Publication date: May 18, 2023
    Inventors: Yohsuke KANZAKI, Takao SAITOH, Masahiko MIWA, Masaki YAMANAKA, Yi SUN
  • Patent number: 11653547
    Abstract: A display device includes a display layer that includes a TFT layer, a light-emitting element layer, a sealing layer, a bank, and a touch panel layer. The touch panel layer includes a plurality of touch-panel-use lines electrically connecting a terminal section to a plurality of sensing sections configured to transfer measurements. The plurality of touch-panel-use lines resides on the sealing layer so as to intersect with the bank in a plan view of the display device. The plurality of touch-panel-use lines comprises a first touch-panel-use line and a second touch-panel-use line that are adjacent to each other, an interlayer insulation film being interposed between the first touch-panel-use line and the second touch-panel-use line in an intersection where the first touch-panel-use line and the second touch-panel-use line intersect with the bank.
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: May 16, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Masaki Yamanaka, Yohsuke Kanzaki, Yi Sun, Takao Saitoh, Masahiko Miwa, Seiji Kaneko
  • Patent number: 11650469
    Abstract: A method for manufacturing a display device includes a pixel circuit formed on a substrate, wherein a manufacturing process of the pixel circuit includes a patterning step of a metal film performed in the following procedures (a) to (e): (a) forming the metal film on the substrate; (b) forming a first resist pattern on the metal film by a photolithographic method; (c) etching the metal film with the first resist pattern to form a first metal pattern; (d) forming by the photolithographic method on the metal film formed in the first metal pattern, a second resist pattern including a pattern shape smaller than a pattern shape of the first resist pattern; and (e) etching the metal film with the second resist pattern to form a second metal pattern.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: May 16, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Yohsuke Kanzaki, Takao Saitoh, Masahiko Miwa, Masaki Yamanaka, Yi Sun, Seiji Kaneko
  • Patent number: 11640771
    Abstract: A display device is provided with a display area and a frame area on a flexible substrate. The display area includes a transistor and a light-emitting element, and the frame area surrounds the display area. The display device includes: an upper inorganic insulating film, a first upper metal layer, a first resin layer, a protective layer, a second upper metal layer, a second resin layer, and a third resin layer provided in a stated order above a semiconductor layer of a transistor. In a display area, the protective layer covering a whole upper face of the first resin layer comes into contact with an upper wire included in the second upper metal layer.
    Type: Grant
    Filed: August 24, 2018
    Date of Patent: May 2, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Seiji Kaneko, Takao Saitoh, Masahiko Miwa, Yohsuke Kanzaki, Masaki Yamanaka, Yi Sun
  • Publication number: 20230109516
    Abstract: A display device according to an aspect of the disclosure includes a display region. The display region is provided with a plurality of first grooves and a plurality of second grooves formed between adjacent control lines and spaced apart from the plurality of control lines, in a plan view. Each of the plurality of first grooves extends in a second direction along a coupling semiconductor layer, between the adjacent control lines, in a plan view. Each of the plurality of second grooves extends in a direction intersecting a first groove of the plurality of first grooves, and is adjacent to at least one end portion of the first groove.
    Type: Application
    Filed: March 11, 2020
    Publication date: April 6, 2023
    Inventors: TAKAO SAITOH, MASAKI YAMANAKA, YI SUN, YOHSUKE KANZAKI, MASAHIKO MIWA
  • Publication number: 20230100577
    Abstract: A non-display region is provided within a display region, a through-hole is provided in the non-display region, a plurality of inner protruding portions are provided in the non-display region so as to surround the through-hole, a lower resin layer of each of the inner protruding portions is separated by a plurality of inner slits formed in the resin substrate layer, some of the plurality of display wiring lines are separated by the through-hole, and a first non-display conductive layer at a bottom portion of the inner slit closest to the display region side is provided so as to overlap the display wiring line separated by the through-hole at one end portion on a side of the through-hole and another end portion on a side of the through-hole.
    Type: Application
    Filed: April 9, 2020
    Publication date: March 30, 2023
    Inventors: TAKAO SAITOH, MASAHIKO MIWA, MASAKI YAMANAKA, YOHSUKE KANZAKI, YI SUN
  • Publication number: 20230050052
    Abstract: A display device includes: a display panel including: a base substrate; a thin film transistor layer provided on the base substrate and including a semiconductor layer, a gate insulation film, a plurality of first wiring lines, an interlayer insulation film, and a plurality of second wiring lines, all of which are stacked in a stated order; a light-emitting element layer provided on the thin film transistor layer; and a sealing film provided on the light-emitting element layer; and an image capturing unit provided on a base substrate side of the display area of the display panel, wherein in a plan view, the plurality of second wiring lines, in an area overlapping the image capturing unit, have portions respectively overlapping the plurality of first wiring lines.
    Type: Application
    Filed: January 28, 2020
    Publication date: February 16, 2023
    Inventors: MASAKI YAMANAKA, MASAHIKO MIWA, TAKAO SAITOH, YOHSUKE KANZAKI, YI SUN
  • Publication number: 20230041278
    Abstract: A resin substrate layer and a first inorganic insulating film on the resin substrate layer are provided. A notch is provided to an end portion of the resin substrate layer. A first inorganic-insulating-film-free region is provided along the notch. From the first inorganic-insulating-film-free region, the first inorganic insulating film is removed.
    Type: Application
    Filed: January 20, 2020
    Publication date: February 9, 2023
    Inventors: TAKAO SAITOH, YOHSUKE KANZAKI, MASAKI YAMANAKA, YI SUN, MASAHIKO MIWA
  • Publication number: 20220376027
    Abstract: A display device in accordance with the disclosure includes a substrate, an insular semiconductor layer, a gate insulation film, a plurality of control lines extending in a row direction, a first interlayer insulation film, and a plurality of data signal lines extending in a column direction, all of which are provided in a stated order. The insular semiconductor layer, residing in a display area, is electrically separated from the plurality of control lines and the plurality of data signal lines and overlaps one of the plurality of control lines in a plan view taken normal to the substrate.
    Type: Application
    Filed: November 1, 2019
    Publication date: November 24, 2022
    Inventors: YI SUN, MASAKI YAMANAKA, TAKAO SAITOH, YOHSUKE KANZAKI, MASAHIKO MIWA
  • Patent number: 11508798
    Abstract: In an organic electroluminescence (EL) display device, a display region and a first frame region are defined in a substantially circular shape or a substantially oval shape, and in a bending portion, an opening is formed in an inorganic layered film, and a frame flattening film is provided to fill the opening. An end portion of the opening on the display region side is formed along an arc of the first frame region on the bending portion side.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: November 22, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Takao Saitoh, Seiji Kaneko, Yohsuke Kanzaki, Masahiko Miwa, Masaki Yamanaka, Yi Sun
  • Patent number: 11508797
    Abstract: A display device includes: a resin substrate; a TFT layer; a bending portion; at least one inorganic film forming the TFT layer; an interlayer insulating film forming the TFT layer; and a plurality of wires forming the TFT layer, wherein the at least one inorganic film and the interlayer insulating film include an opening disposed at the bending portion, the at least one inorganic film includes a plurality of island-shaped inorganic films remaining in the opening, each of the plurality of wires overlaps a corresponding island-shaped inorganic film among the plurality of island-shaped inorganic films, and the display device includes a metal layer in a form of islands disposed between each of the plurality of wires and the corresponding island-shaped inorganic film overlapping each of the plurality of wires, the metal layer being in contact with each of the plurality of wires.
    Type: Grant
    Filed: February 22, 2018
    Date of Patent: November 22, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Masaki Yamanaka, Masahiko Miwa, Yohsuke Kanzaki, Takao Saitoh, Yi Sun, Seiji Kaneko
  • Patent number: 11508760
    Abstract: An active matrix substrate includes a plurality of first contact holes extending through an inorganic insulating film, a first protection layer that is a silicon nitride film, and a second protection layer, a plurality of second contact holes extending through the inorganic insulating film and the second protection layer, a first transistor, and a second transistor. A channel region of the second transistor does not overlap the first protection layer.
    Type: Grant
    Filed: March 15, 2018
    Date of Patent: November 22, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Masahiko Miwa, Yohsuke Kanzaki, Takao Saitoh, Masaki Yamanaka, Yi Sun, Seiji Kaneko
  • Publication number: 20220367592
    Abstract: A second connection wire is electrically connected to a first connection wire via a display-side contact portion and terminal-side contact portion in a bending section. The first connection wire and the second connection wire do not overlap each other at least partly between the display-side contact portion and terminal-side contact portion.
    Type: Application
    Filed: June 20, 2019
    Publication date: November 17, 2022
    Inventors: Yohsuke KANZAKI, Yi SUN, Takao SAITOH, Masahiko MIWA, Masaki YAMANAKA