Patents by Inventor Masahiro Miyairi
Masahiro Miyairi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10852648Abstract: According to one embodiment, a mask pattern correction system includes the following configuration. A stress analysis circuitry divides a layout of a circuit pattern formed using a design mask formed in accordance with mask design data into correction regions, and acquires a displacement amount from the regions. A correction value calculation circuitry calculates a displacement correction value from the displacement amount. A correction map generation circuitry generates a correction map based on a correction value difference of the displacement correction values. A mask position correction circuitry allocates the regions to a layout of the circuit pattern, performs displacement correction of a mask pattern on the design mask by the displacement correction values, and creates a correction mask based on the displacement correction.Type: GrantFiled: September 10, 2019Date of Patent: December 1, 2020Assignee: TOSHIBA MEMORY CORPORATIONInventors: Kazuyuki Hino, Hiromitsu Mashita, Masahiro Miyairi, Hiroshi Yoshimura, Taiga Uno, Sachiyo Ito, Shinichirou Ooki, Kenji Shiraishi, Hirotaka Ichikawa, Yuto Takeuchi
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Publication number: 20200117104Abstract: According to one embodiment, a mask pattern correction system includes the following configuration. A stress analysis circuitry divides a layout of a circuit pattern formed using a design mask formed in accordance with mask design data into correction regions, and acquires a displacement amount from the regions. A correction value calculation circuitry calculates a displacement correction value from the displacement amount. A correction map generation circuitry generates a correction map based on a correction value difference of the displacement correction values. A mask position correction circuitry allocates the regions to a layout of the circuit pattern, performs displacement correction of a mask pattern on the design mask by the displacement correction values, and creates a correction mask based on the displacement correction.Type: ApplicationFiled: September 10, 2019Publication date: April 16, 2020Applicant: TOSHIBA MEMORY CORPORATIONInventors: Kazuyuki HINO, Hiromitsu MASHITA, Masahiro MIYAIRI, Hiroshi YOSHIMURA, Taiga UNO, Sachiyo ITO, Shinichirou OOKI, Kenji SHIRAISHI, Hirotaka ICHIKAWA, Yuto TAKEUCHI
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Patent number: 10151972Abstract: A manufacturing method of a photomask according to the embodiment sets an exposure condition applied when a resist is formed into a three-dimensional target shape by using a photomask including a plurality of light-shielding areas. Subsequently, the method sets a hypothetical target shape obtained by correcting a target shape based on a development characteristic of the resist for the exposure condition. Subsequently, the method creates a pattern of the photomask corresponding to the hypothetical target shape. Subsequently, the method simulates a prediction shape of the resist when the pattern is used. Subsequently, the method calculates a cost function related to an error between the prediction shape and the hypothetical target shape. Subsequently, the method adjusts the pattern based on a result of the calculation of the cost function.Type: GrantFiled: March 1, 2017Date of Patent: December 11, 2018Assignee: TOSHIBA MEMORY CORPORATIONInventors: Takaki Hashimoto, Satoshi Usui, Naoki Sato, Kouichi Nakayama, Masahiro Miyairi, Syogo Okamoto
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Publication number: 20180157167Abstract: A manufacturing method of a photomask according to the embodiment sets an exposure condition applied when a resist is formed into a three-dimensional target shape by using a photomask including a plurality of light-shielding areas. Subsequently, the method sets a hypothetical target shape obtained by correcting a target shape based on a development characteristic of the resist for the exposure condition. Subsequently, the method creates a pattern of the photomask corresponding to the hypothetical target shape. Subsequently, the method simulates a prediction shape of the resist when the pattern is used. Subsequently, the method calculates a cost function related to an error between the prediction shape and the hypothetical target shape. Subsequently, the method adjusts the pattern based on a result of the calculation of the cost function.Type: ApplicationFiled: March 1, 2017Publication date: June 7, 2018Applicant: TOSHIBA MEMORY CORPORATIONInventors: Takaki HASHIMOTO, Satoshi Usui, Naoki Sato, Kouichi Nakayama, Masahiro Miyairi, Syogo Okamoto
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Patent number: 9268208Abstract: One embodiment includes: a step of evaluating an amount of flare occurring through a mask at EUV exposure; a step of providing a dummy mask pattern on the mask based on the evaluated result of the amount of flare; and a step of executing a flare correction and an optical proximity correction on a layout pattern. The layout pattern is provided by the EUV exposure through the mask with the dummy mask pattern.Type: GrantFiled: March 15, 2012Date of Patent: February 23, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Ryota Aburada, Hiromitsu Mashita, Taiga Uno, Masahiro Miyairi, Toshiya Kotani
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Publication number: 20130063707Abstract: One embodiment includes: a step of evaluating an amount of flare occurring through a mask at EUV exposure; a step of providing a dummy mask pattern on the mask based on the evaluated result of the amount of flare; and a step of executing a flare correction and an optical proximity correction on a layout pattern. The layout pattern is provided by the EUV exposure through the mask with the dummy mask pattern.Type: ApplicationFiled: March 15, 2012Publication date: March 14, 2013Inventors: Ryota ABURADA, Hiromitsu Mashita, Taiga Uno, Masahiro Miyairi, Toshiya Kotani
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Patent number: 8336004Abstract: According to a mask verifying method of the embodiment, a difference between an actual dimension of a mask pattern and a simulation dimension is calculated as a computational estimated value. Moreover, a difference between an actual dimension of the mask pattern that is actually measured and a dimension on pattern data is calculated as an actually-measured difference. Then, it is verified whether a mask pattern dimension passes or fails based on the calculated value. When calculating the computational estimated value, a model function, which is set based on each correspondence relationship between an actual dimension and a mask simulation dimension of a test pattern, which includes a plurality of types of pattern ambient environments, to the mask pattern.Type: GrantFiled: February 10, 2011Date of Patent: December 18, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Shigeki Nojima, Tetsuaki Matsunawa, Shigeru Hasebe, Masahiro Miyairi
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Patent number: 8261214Abstract: A graph in which patterns are each regarded as nodes and nodes of patterns adjacent to each other at a first distance are connected with each other by an edge is produced, each of the patterns is classified into two types so that the two patterns corresponding to the nodes at both ends of the edge are types different to each other, a classification result is corrected by grouping the patterns in each node cluster connected by the edge or each node cluster connected via the node by the edge, and by inverting each of types of a pattern belonging to a same group as that of one pattern, out of a pair of patterns that are classified into a same type and that belong to respectively different groups adjacent to each other at a second distance, and a pattern layout diagram is created based on the corrected classification result.Type: GrantFiled: December 3, 2009Date of Patent: September 4, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Shimon Maeda, Masahiro Miyairi, Soichi Inoue
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Patent number: 8234596Abstract: A pattern data creating method according to an embodiment of the present invention comprises: extracting marginal error patterns using a first result obtained by applying process simulation to mask pattern data based on an evaluation target cell pattern, applying the process simulation to mask pattern data based on an evaluation target cell pattern with peripheral environment pattern created by arranging a peripheral environment pattern in the marginal error patterns such that a second result obtained by creating mask pattern data and applying the process simulation to the mask pattern data is more deteriorated than the first result, and correcting the evaluation target cell pattern or the mask pattern data based on the evaluation target cell pattern when there is a fatal error.Type: GrantFiled: September 1, 2009Date of Patent: July 31, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Ryuji Ogawa, Masahiro Miyairi, Shimon Maeda, Suigen Kyoh, Satoshi Tanaka
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Publication number: 20120054697Abstract: According to one embodiment, a light source shape calculation method includes calculating a first light source shape as an exposure illumination light source shape, so that the first light source shape has a light source shape region symmetrical to an X-axis direction and a Y-axis direction, and a process margin when forming an on-substrate pattern corresponding to at least two pattern layouts defined by design rules is optimized. A point light source is calculated such that the process margin of formation of the on-substrate pattern corresponding to a pattern layout to be formed on a semiconductor device is optimized, and is applied to the first light source shape.Type: ApplicationFiled: August 31, 2011Publication date: March 1, 2012Inventors: Kazuhiro TAKAHATA, Tetsuaki MATSUNAWA, Masahiro MIYAIRI, Shimon MAEDA, Shigeki NOJIMA
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Publication number: 20110201138Abstract: According to a mask verifying method of the embodiment, a difference between an actual dimension of a mask pattern and a simulation dimension is calculated as a computational estimated value. Moreover, a difference between an actual dimension of the mask pattern that is actually measured and a dimension on pattern data is calculated as an actually-measured difference. Then, it is verified whether a mask pattern dimension passes or fails based on the calculated value. When calculating the computational estimated value, a model function, which is set based on each correspondence relationship between an actual dimension and a mask simulation dimension of a test pattern, which includes a plurality of types of pattern ambient environments, to the mask pattern.Type: ApplicationFiled: February 10, 2011Publication date: August 18, 2011Inventors: Shigeki Nojima, Tetsuaki Matsunawa, Shigeru Hasebe, Masahiro Miyairi
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Publication number: 20110029938Abstract: According to one embodiment, a pattern creating method includes: calculating, from pattern data on which a circuit pattern formed on a substrate and an auxiliary pattern not formed on the substrate are arranged, a first feature value of a first pattern edge of a circuit pattern affected by the auxiliary pattern and a second feature value of a second pattern edge connected to the first pattern edge; and arranging, when a relation between the feature values does not have a desired relation corresponding to the circuit pattern, the auxiliary pattern such that the relation between the feature values has the relation corresponding to a shape of the circuit pattern.Type: ApplicationFiled: July 26, 2010Publication date: February 3, 2011Inventors: Shigeki NOJIMA, Masahiro MIYAIRI
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Publication number: 20100191357Abstract: A graph in which patterns are each regarded as nodes and nodes of patterns adjacent to each other at a first distance are connected with each other by an edge is produced, each of the patterns is classified into two types so that the two patterns corresponding to the nodes at both ends of the edge are types different to each other, a classification result is corrected by grouping the patterns in each node cluster connected by the edge or each node cluster connected via the node by the edge, and by inverting each of types of a pattern belonging to a same group as that of one pattern, out of a pair of patterns that are classified into a same type and that belong to respectively different groups adjacent to each other at a second distance, and a pattern layout diagram is created based on the corrected classification result.Type: ApplicationFiled: December 3, 2009Publication date: July 29, 2010Inventors: Shimon Maeda, Masahiro Miyairi, Soichi Inoue
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Publication number: 20100081294Abstract: A pattern data creating method according to an embodiment of the present invention comprises: extracting marginal error patterns using a first result obtained by applying process simulation to mask pattern data based on an evaluation target cell pattern, applying the process simulation to mask pattern data based on an evaluation target cell pattern with peripheral environment pattern created by arranging a peripheral environment pattern in the marginal error patterns such that a second result obtained by creating mask pattern data and applying the process simulation to the mask pattern data is more deteriorated than the first result, and correcting the evaluation target cell pattern or the mask pattern data based on the evaluation target cell pattern when there is a fatal error.Type: ApplicationFiled: September 1, 2009Publication date: April 1, 2010Inventors: Ryuji OGAWA, Masahiro Miyairi, Shimon Maeda, Suigen Kyoh, Satoshi Tanaka