Patents by Inventor Masakazu Aoki

Masakazu Aoki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100230299
    Abstract: The hydrogen storage alloy has, as a main phase thereof, a bcc structure phase having a composition represented by TixCryVzXw wherein 3/2?y/x?3/1, 50?z?75 mol %, 0?w?5 mol %, and x+y+z+w=100 mol %, and X represents any one or more selected from Al, Si, and Fe. The hydrogen storage device is a device using the alloy. The preparation process of a hydrogen storage alloy includes the steps of: melting/casting raw materials mixed to give the composition represented by TixCryVzXw; heat-treating an ingot obtained in the melting/casting step; and subjecting the heat-treated ingot to a hydrogen storing/releasing treatment at least once to activate the ingot.
    Type: Application
    Filed: March 5, 2010
    Publication date: September 16, 2010
    Applicant: KABUSHIKI KAISHA TOYOTA CHUO KENKYUSHO
    Inventors: Masakazu Aoki, Shinichi Towata, Tatsuo Noritake, Akio Itoh, Kota Washio, Mamoru Ishikiriyama
  • Patent number: 7750668
    Abstract: A semiconductor integrated circuit device is composed of logic gates each provided with at least two MOS transistors. The logic gates are connected to a first potential point and a second potential point. The semiconductor integrated circuit device includes a current control device connected between the logic gate and the first potential point and/or between the logic gate and the second potential point for controlling a value of a current flowing in the logic gate depending on an operating state of the logic gate. The circuit can be used in devices that cycle in operation between high and low power consumption modes, such as microprocessors that have both an operation mode and a low power back-up or sleep mode used for power reduction.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: July 6, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Masashi Horiguchi, Kunio Uchiyama, Kiyoo Itoh, Takeshi Sakata, Masakazu Aoki, Takayuki Kawahara
  • Publication number: 20090178552
    Abstract: The variable capacity compressor has a rotor 21, as a rotating member, fixed to a drive shaft 10 and rotating integrally with the drive shaft 10, a swash plate 24, as a tilting member, tiltably and slidably attached to the drive shaft 10, a linkage mechanism 40 linking the rotor 21 and the swash plate 24 at a position corresponding to an upper dead center of the swash plate 24, transferring rotation of the rotor 21 to the swash plate 24, and guiding the tilting movement of the swash plate 24, and a tilting movement guide 60 provided between the rotor 21 and the swash plate 24 and anterior to the linkage mechanism 40 in the rotating direction and guiding changes of the inclination angle of the swash plate 24 with respect to the drive shaft 10.
    Type: Application
    Filed: April 5, 2007
    Publication date: July 16, 2009
    Inventors: Makoto Kawamura, Masakazu Aoki
  • Patent number: 7510996
    Abstract: A hydrogen storage material is expressed by a composition formula, (Ca1-xAx)1-z(Si1-yBy)z, wherein “A” is at least one member selected from the group consisting of alkali metal elements, alkaline-earth metal elements, rare-earth elements, the elements of groups 3 through 6, Ni, Au, In, Tl, Sn, Fe, Co, Cu and Ag; “B” is at least one member selected from the group consisting of the elements of groups 7 through 17, rare-earth elements, Hf and Be; 0?x<1 by atomic ratio; 0?y<1 by atomic ratio; and 0.38?z?0.58 by atomic ratio. It is lightweight as well as less expensive. In principle, neither high-temperature nor high-pressure activation is required, because it exhibits a high initial activity. The operation temperature can be lowered and the hydrogen absorption content can be enlarged by controlling the kind and substitution proportion of the substituent elements appropriately.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: March 31, 2009
    Assignee: Kabushiki Kaisha Toyota Chuo Kenkyusho
    Inventors: Masakazu Aoki, Nobuko Oba, Shin-ichi Towata, Tatsuo Noritake
  • Publication number: 20090073090
    Abstract: A digital-signal processing apparatus for processing elementary-color data to be output to a liquid-crystal display apparatus having a color panel structure, the digital-signal processing apparatus including: a line-unit weight-coefficient sum computation section; a compensation-coefficient computation section; a partial-weight-coefficient-sum computation section; a first-compensation-quantity-component computation section; a second-compensation-quantity-component computation section; a compensation-quantity computation section; a line memory used for applying a 1-line period extension process to each elementary-color data; and a horizontal-cross-talk compensation section for successively compensating each elementary-color data, which has been subjected to the 1-line period extension process in the line memory.
    Type: Application
    Filed: September 16, 2008
    Publication date: March 19, 2009
    Applicant: Sony Corporation
    Inventors: Takashi Hirakawa, Masakazu Aoki, Naoki Ohashi
  • Patent number: 7391998
    Abstract: The present invention provides a developing apparatus to be provided in a quick start up electrophotographic image forming apparatus that can efficiently prevent generation of unevenness by a screw pitch in a short period of time. The developing apparatus rotates a developer transporting screw so as to transport and supply a developer to a developer bearing member, and develops a latent image formed on an image bearing member by the developer. The developer transporting screw includes a vane winding around a rotation shaft in a spiral form. A vane surface on other side of a developer transport direction of the vane includes two planes having different angles with a rotational center line of the rotation shaft.
    Type: Grant
    Filed: February 14, 2006
    Date of Patent: June 24, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masakazu Aoki, Akinobu Okuda, Hironobu Kinoshita, Hideki Yasuda, Kazumasa Hayashi
  • Publication number: 20080089795
    Abstract: A water-injected compressor, which injects the water inside the separator 3 into the compressor and discharges the water along with compressed air into the separator and then gains condensed and separated water, has the compressor stopping and then, if staying at a stop for a predetermined duration of time without activating, becoming activated and operating for a set duration of time.
    Type: Application
    Filed: August 23, 2007
    Publication date: April 17, 2008
    Applicant: Hitachi Industrial Equipment Systems Co., Ltd.
    Inventors: Fumio Takeda, Hitoshi Nishimura, Natsuki Kawabata, Masakazu Aoki
  • Publication number: 20080072085
    Abstract: A semiconductor integrated circuit device is composed of logic gates each provided with at least two MOS transistors. The logic gates are connected to a first potential point and a second potential point. The semiconductor integrated circuit device includes a current control device connected between the logic gate and the first potential point and/or between the logic gate and the second potential point for controlling a value of a current flowing in the logic gate depending on an operating state of the logic gate. The circuit can be used in devices that cycle in operation between high and low power consumption modes, such as microprocessors that have both an operation mode and a low power back-up or sleep mode used for power reduction.
    Type: Application
    Filed: October 31, 2007
    Publication date: March 20, 2008
    Inventors: Masashi Horiguchi, Kunio Uchiyama, Kiyoo Itoh, Takeshi Sakata, Masakazu Aoki, Takayuki Kawahara
  • Publication number: 20080061298
    Abstract: A semiconductor memory device includes a plurality of memory cells, each including, a source region formed of a semiconductor material, a drain region formed of the semiconductor material, and a first region formed of the semiconductor material and located between the source region and the drain region. First and second insulator films sandwich the first region and a first gate electrode is connected to the first region through the first insulator film. In this arrangement, the first region is adapted to accumulate charges corresponding to stored information.
    Type: Application
    Filed: October 31, 2007
    Publication date: March 13, 2008
    Inventors: Kazuo YANO, Tomoyuki Ishii, Takashi Hashimoto, Koichi Seki, Masakazu Aoki, Takeshi Sakata, Yoshinobu Nakagome, Kan Takeuchi
  • Patent number: 7312640
    Abstract: A semiconductor integrated circuit device is composed of logic gates each provided with at least two MOS transistors. The logic gates are connected to a first potential point and a second potential point. The semiconductor integrated circuit device includes a current control device connected between the logic gate and the first potential point and/or between the logic gate and the second potential point for controlling a value of a current flowing in the logic gate depending on an operating state of the logic gate. The circuit can be used in devices that cycle in operation between high and low power consumption modes, such as microprocessors that have both an operation mode and a low power back-up or sleep mode used for power reduction.
    Type: Grant
    Filed: May 18, 2005
    Date of Patent: December 25, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Masashi Horiguchi, Kunio Uchiyama, Kiyoo Itoh, Takeshi Sakata, Masakazu Aoki, Takayuki Kawahara
  • Patent number: 7309892
    Abstract: A field-effect semiconductor element implemented with a fewer number of elements and a reduced area and capable of storing data by itself without need for cooling at a cryogenic temperature, and a memory device employing the same. Gate-channel capacitance is set so small that whether or not a trap captures one electron or hole can definitely and distinctively be detected in terms of changes of a current of the semiconductor FET element. By detecting a change in a threshold voltage of the semiconductor element brought about by trapping of electron or hole in the trap, data storage can be realized at a room temperature.
    Type: Grant
    Filed: May 24, 2006
    Date of Patent: December 18, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Kazuo Yano, Tomoyuki Ishii, Takashi Hashimoto, Koichi Seki, Masakazu Aoki, Takeshi Sakata, Yoshinobu Nakagome, Kan Takeuchi
  • Patent number: 7149113
    Abstract: To reduce cost of defect redundancy and trimming in a semiconductor integrated circuit having multiple layer wirings and copper wirings, an address for salvaging a defect of a memory cell array in a semiconductor is stored by using a nonvolatile memory element constituting a floating electrode by a first layer of polysilicon, or the nonvolatile memory element is programmed in testing the semiconductor integrated circuit. As a result, a special process is not needed in forming the nonvolatile memory element. In other words, the nonvolatile memory element can be formed in a process of forming a CMOS device and an apparatus of a laser beam for programming is not needed since the programming is carried out in testing. Thus, the time necessary for programming can be shortened, and, therefore, testing costs can be reduced.
    Type: Grant
    Filed: March 7, 2005
    Date of Patent: December 12, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Koichiro Ishibashi, Shoji Shukuri, Kazumasa Yanagisawa, Junichi Nishimoto, Masanao Yamaoka, Masakazu Aoki
  • Patent number: 7116320
    Abstract: A liquid-crystal display device performs a feedback process. A video signal is written on pixels on a unit by unit basis, each unit including a plurality of pixels (six pixels, for example). Scan pulses output from RGB LCD panels are supplied to a driver IC that supplies the RGB LCD panels with a variety of timing signals. A delay amount from the scan pulses from the optimum state thereof is measured. The delay amount is accounted for in a pulse that samples and holds the video signal, i.e., a pulsewidth control clock pulse.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: October 3, 2006
    Assignee: Sony Corporation
    Inventors: Takashi Hirakawa, Masakazu Aoki
  • Publication number: 20060208315
    Abstract: A field-effect semiconductor element implemented with a fewer number of elements and a reduced area and capable of storing data by itself without need for cooling at a cryogenic temperature, and a memory device employing the same. Gate-channel capacitance is set so small that whether or not a trap captures one electron or hole can definitely and distinctively be detected in terms of changes of a current of the semiconductor FET element. By detecting a change in a threshold voltage of the semiconductor element brought about by trapping of electron or hole in the trap, data storage can be realized at a room temperature.
    Type: Application
    Filed: May 24, 2006
    Publication date: September 21, 2006
    Inventors: Kazuo Yano, Tomoyuki Ishii, Takashi Hashimoto, Koichi Seki, Masakazu Aoki, Takeshi Sakata, Yoshinobu Nakagome, Kan Takeuchi
  • Patent number: 7106643
    Abstract: Method for manufacturing a memory device, the memory being a memory array with a spare bit line and being provided with a defect recovery scheme featuring a redundancy circuit. The redundancy circuit includes one or more comparing circuits having programmable elements which function as a memory for storing therein a defective address existing in the memory array. The programmable elements of the redundancy circuit can be programmed in accordance with any of a number of different types of defect modes. Each comparing circuit of the redundancy circuit compares information (data) inputted therein, for example, the column and row addresses which may be under the control of an address multiplex system, with that programmed in the programmable elements of the comparing circuit. On the basis of this comparison, an appropriate defect recovery is effected.
    Type: Grant
    Filed: May 31, 2005
    Date of Patent: September 12, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Masashi Horiguchi, Jun Etoh, Masakazu Aoki, Kiyoo Itoh
  • Publication number: 20060192741
    Abstract: A liquid-crystal display device performs a feedback process. A video signal is written on pixels on a unit by unit basis, each unit including a plurality of pixels (six pixels, for example). Scan pulses output from RGB LCD panels are supplied to a driver IC that supplies the RGB LCD panels with a variety of timing signals. A delay amount from the scan pulses from the optimum state thereof is measured. The delay amount is accounted for in a pulse that samples and holds the video signal, i.e., a pulsewidth control clock pulse.
    Type: Application
    Filed: April 28, 2006
    Publication date: August 31, 2006
    Inventors: Takashi Hirakawa, Masakazu Aoki
  • Publication number: 20060182467
    Abstract: The present invention provides a developing apparatus to be provided in a quick start up electrophotographic image forming apparatus that can efficiently prevent generation of unevenness by a screw pitch in a short period of time. The developing apparatus rotates a developer transporting screw so as to transport and supply a developer to a developer bearing member, and develops a latent image formed on an image bearing member by the developer. The developer transporting screw includes a vane winding around a rotation shaft in a spiral form. A vane surface on other side of a developer transport direction of the vane includes two planes having different angles with a rotational center line of the rotation shaft.
    Type: Application
    Filed: February 14, 2006
    Publication date: August 17, 2006
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masakazu Aoki, Akinobu Okuda, Hironobu Kinoshita, Hideki Yasuda, Kazumasa Hayashi
  • Patent number: 7070288
    Abstract: In a vehicle door mirror device (10), an outer side surface (20B), with respect to a vehicle, of a projection (20) of a door mirror stay (16) is made to be flat. Further, an angle of the outer side surface (20B) with respect to a front-rear direction of the vehicle, inward or outward with respect to the vehicle, is not more than 2 degrees. Therefore, wind arriving at the outer side surface (20B) flows rearward with respect to the vehicle with fluctuation thereof being suppressed, and its flow is straightened. Furthermore, a radius of curvature of a corner portion (20E) at an outer rear side, with respect to the vehicle, of the projection (20) is not more than 15 mm. Therefore, wind arriving at the outer side surface (20B) of the projection (20) is suppressed from flowing along the corner portion (20E), and its flow is straightened. Thus, wind noise performance of the door mirror stay (16) can be improved.
    Type: Grant
    Filed: March 19, 2003
    Date of Patent: July 4, 2006
    Assignee: Kabushiki Kaisha Tokai-Rik-A-Denki-Seisakusho
    Inventors: Toshinobu Mizutani, Masakazu Iwatsuki, Masakazu Aoki, Masaaki Itou, Yasunobu Okatsu
  • Patent number: 7061053
    Abstract: A field-effect semiconductor element implemented with a fewer number of elements and a reduced area and capable of storing data by itself without need for cooling at a cryogenic temperature, and a memory device employing the same. Gate-channel capacitance is set so small that whether or not a trap captures one electron or hole can definitely and distinctively be detected in terms of changes of a current of the semiconductor FET element. By detecting a change in a threshold voltage of the semiconductor element brought about by trapping of electron or hole in the trap, data storage can be realized at a room temperature.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: June 13, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Kazuo Yano, Tomoyuki Ishii, Takashi Hashimoto, Koichi Seki, Masakazu Aoki, Takeshi Sakata, Yoshinobu Nakagome, Kan Takeuchi
  • Patent number: 7062060
    Abstract: An outer mirror and a vehicle interphone are provided for transmitting a sound to the outside from a vehicle cabin and vice versa. Sound outside the vehicle cabin is transmitted to the cabin from a microphone-loudspeaker provided in a visor cover of the outer mirror. The microphone-loudspeaker is supported on a frame having higher rigidity than the visor cover, which is mounted to a vehicle body via an electric accommodating unit and a door mirror base to promote shock resistance. The visor cover includes a sound-conducting opening in its bottom portion, and the microphone-loudspeaker is made waterproof to promote weather resistance.
    Type: Grant
    Filed: February 4, 2003
    Date of Patent: June 13, 2006
    Assignee: Kabushiki Kaisha Tokai-Rika-Denki-Seisakusho
    Inventors: Masami Hosono, Masakazu Aoki, Tadashi Ejiri, Takashi Ichikawa, Terumasa Suyama, Masao Ayabe