Abstract: In a control apparatus which transmits/receives data from a central processing unit via a serial transfer channel to a communication control unit, and groups/distributes data of input/output units from the communication control unit via a parallel transfer channel, the control apparatus initiates a diagnosing unit of the parallel transfer channel in response to an instruction issued from the central processing unit, and diagnosis the input/output units subsequent to the diagnosis of the transmission channel. Data input/output timing of the input/output unit is also instructed from the central processing unit, so that the central processing unit can suppress lowering of response speeds caused by the diagnoses, and can maintain the periodicity of the data input/output.

Abstract: A fault diagnosis apparatus and method capable of simultaneously detecting the fault of a multiplexer and the fault of an A/D converter and isolating and identifying causes of these faults, the multiplexer and the A/D converter being used in a multi-channel analog input/output circuit. Test-voltage values are inputted from a diagnosis-voltage input unit into the multiplexer and the A/D converter constituting an analog-signal conversion unit, the multiplexer having plural channels, the A/D converter converting outputs from the multiplexer into digital signals, the test-voltage values being different from each other for each channel of the multiplexer. Comparisons are made between the digital voltage values and the test-voltage values inputted, the digital voltage values being outputted for each channel of the multiplexer. From this comparison result, it is judged whether the multiplexer is at fault or the A/D converter is at fault.

Abstract: A receiving device including: a receiver receiving two frames, each including substantially same data attached thereto with a data error detection code, a frame error detection code, and safety flag information indicating a safety function or not, respectively; a first detector connected to the receiver for performing error detection of the frames by use of the frame error detection code, respectively; a second detector connected to the receiver for performing error detection of the data by use of the data error detection code, respectively; and a Direct Memory Access Controller (DMAC) connected to the first and second detectors for outputting one among the data included in the two frames under a condition of the safety function in the two frames when no error is detected in the frame and data error detections.

Abstract: Processed results are received when processors make compatible computations on data of a common object. A computation command signal is generated and fed to the processors in response to a start signal from any one of the processors so that the processors can make computations with different operation timings. Then, the results of the computations made by the processors are compared with each other. Thus, apparatus capable of small size, high performance and safety at the same time can be achieved by the above construction using the processors.

Abstract: The present invention provides a method for expanding and improving functional capacity of human adult-derived progenitor cells in vitro using a closed culture system. The present invention provides a favorable condition for cell therapy to promote tissue repair and organogenesis via vasculogenesis and angiogenesis in clinical settings. The proposed closed bag culture system for culturing hemangioblast comprises of, in one embodiment, a serum-free culture medium containing one or more factors selected from the group consisting of stem cell growth factor, interleukin-6, FMS-like tyrosine kinase 3, thrombopoietin, and vascular endothelial growth factor and a kit for the preparation of the serum-free culture medium and the like.

Abstract: An input/output control apparatus including: a unit that controls input/output of data relating to a computation of a plurality of processors in response to an access request from a second input/output unit and an access request from a first input/output unit which requires higher reliability than said second input/output unit, and orders at least one of a plurality of processors to perform a computation relating to the access request from said first input/output unit away from the computation relating to the access request from said second input/output unit in case of that said first input/output unit issued an access request, so that a same computation is made by said plurality of processors; a unit that compares the results of said computations relative to the access request from said first input/output unit provided from said plurality of processors; and a unit that allows the data associated with said computations of said processors to be output on the basis of said compared results.

Abstract: In the disclosed control system, loops of 1st path and 2nd path are formed connecting an active CPU unit and each of RIO units, the direction of data frame transfer through the loop of 1st path being opposite to that of the data frame transfer through the loop 2nd path. Reflective electro-optical transducer modules are used in the RIO units which are connected with the active CPU unit so that a standby CPU unit can also be connected. Further, the loop of 1st path and the loop of 2nd path are formed connecting the standby CPU module and each of the RIO modules. The data frame transfer directions through the loops connecting the active CPU unit and each of the RIO units are opposite to the data frame transfer directions through the corresponding loops connecting the standby CPU unit and each of the RIO units.

Abstract: A receiving device including: a receiver receiving two frames, each including substantially same data attached thereto with a data error detection code, a frame error detection code, and safety flag information indicating a safety function or not, respectively; a first detector connected to the receiver for performing error detection of the frames by use of the frame error detection code, respectively; a second detector connected to the receiver for performing error detection of the data by use of the data error detection code, respectively; and a Direct Memory Access Controller (DMAC) connected to the first and second detectors for outputting one among the data included in the two frames under a condition of the safety function in the two frames when no error is detected in the frame and data error detections.

Abstract: A programmable electronic controller in which one central arithmetic processing unit and a plurality of input devices and output devices are connected by means of a parallel bus, the controller being basically configured to activate a self-diagnostic function and a diagnostic test of the input devices and the output devices with an instruction from a microprocessor of the central arithmetic processing unit; and to judge the result with the microprocessor of the central arithmetic processing unit, by using the microprocessor installed in the central arithmetic processing unit also as a processor for tests (diagnostic tests) of the self-diagnostic function of the input devices and output devices and conducting tests of the self-diagnostic function of the plurality of input devices and output devices with the central arithmetic processing unit.

Abstract: A fault diagnosis apparatus and method capable of simultaneously detecting the fault of a multiplexer and the fault of an A/D converter and isolating and identifying causes of these faults, the multiplexer and the A/D converter being used in a multi-channel analog input/output circuit. Test-voltage values are inputted from a diagnosis-voltage input unit into the multiplexer and the A/D converter constituting an analog-signal conversion unit, the multiplexer having plural channels, the A/D converter converting outputs from the multiplexer into digital signals, the test-voltage values being different from each other for each channel of the multiplexer. Comparisons are made between the digital voltage values and the test-voltage values inputted, the digital voltage values being outputted for each channel of the multiplexer. From this comparison result, it is judged whether the multiplexer is at fault or the A/D converter is at fault.

Abstract: The system has, provided in a sending device, a generator generating transmission data including data, a data error detection code generated from the data and a safety flag indicating a degree of reliability, and transmission data; has, provided in a receiving device, a plurality of components of extracting transmission data, a safety flag, and a data error detection code from a received frame, and detecting a data error, a comparator comparing the matching of a plurality of received frames, and a selector selecting one received frame, from the frame error detection result, the safety flag, the data error detection result, and the matching comparison result; and determines the validity of transmitted data by the detection corresponding to the degree of reliability set with the safety flag.

Abstract: The present invention provides a duplexed operation processor control system that includes operation processors, an I/O device, and at least one communication path that couples the operation processors to the I/O device, and at least one communication path that couples the operation processors with each other. The duplexed operation processor control system switches over either of the operation processors to be a primary operation processor that executes a control operation for a control target, and the other to be a secondary operation processor that is in a stand-by state, and the secondary operation processor snoops control data synchronously when the primary operation processor acquires the control data from the control target.

Abstract: Input-output devices are prevented from conducting false output due to faulty operation by providing an input-output control apparatus configured to store input-output values to be used by a processor to conduct arithmetic operation in a mode having a relatively high safety requirement, in a first storage area, store input-output values to be used by the processor to conduct arithmetic operation in a mode having a relatively low safety requirement, in a second storage area, and restrict copying to the first storage area, copying from the first storage area, copying to the second storage area, or copying from the second storage area according to the mode concerning the safety requirement.

Abstract: A control device diagnoses the operation of a bus arbiter that mediates bus usage requests output by multiple devices in the control device to satisfy both responsiveness and safety. A diagnostic module, implemented as an external diagnostic module, monitors signals related to the arbiter mediation and, if an abnormality caused by a signal sticking condition or an abnormality in a mediation control unit is detected, stops data transfer safely to prevent safety data from being output incorrectly.

Abstract: In a control apparatus which transmits/receives data from a central processing unit via a serial transfer channel to a communication control unit, and groups/distributes data of input/output units from the communication control unit via a parallel transfer channel, the control apparatus initiates a diagnosing unit of the parallel transfer channel in response to an instruction issued from the central processing unit, and diagnosis the input/output units subsequent to the diagnosis of the transmission channel. Data input/output timing of the input/output unit is also instructed from the central processing unit, so that the central processing unit can suppress lowering of response speeds caused by the diagnoses, and can maintain the periodicity of the data input/output.

Abstract: A programmable electronic controller in which one central arithmetic processing unit and a plurality of input devices and output devices are connected by means of a parallel bus, the controller being basically configured to activate a self-diagnostic function and a diagnostic test of the input devices and the output devices with an instruction from a microprocessor of the central arithmetic processing unit; and to judge the result with the microprocessor of the central arithmetic processing unit, by using the microprocessor installed in the central arithmetic processing unit also as a processor for tests (diagnostic tests) of the self-diagnostic function of the input devices and output devices and conducting tests of the self-diagnostic function of the plurality of input devices and output devices with the central arithmetic processing unit.

Abstract: We focused attention on AC133 positive cells as a cell source. AC133 positive cells were transplanted to an injured sciatic nerve model and an injured spinal cord model and were found to have very intensive neural regeneration ability. Such AC133 positive cells are easily available from the peripheral blood with reduced burden on a donor. In addition, they are free from ethical questions and are found to be used as a very useful cell source in neural regenerative treatments with transplanted cells. According to this invention, there is provided a cell source for neural regenerative treatments with transplanted cells, which is more easily available and has a higher neural regeneration ability than equivalents.

Abstract: Input-output devices are prevented from conducting false output due to faulty operation by providing an input-output control apparatus configured to store input-output values to be used by a processor to conduct arithmetic operation in a mode having a relatively high safety requirement, in a first storage area, store input-output values to be used by the processor to conduct arithmetic operation in a mode having a relatively low safety requirement, in a second storage area, and restrict copying to the first storage area, copying from the first storage area, copying to the second storage area, or copying from the second storage area according to the mode concerning the safety requirement.

Abstract: The system has, provided in a sending device, a generator generating transmission data including data, a data error detection code generated from the data and a safety flag indicating a degree of reliability, and transmission data; has, provided in a receiving device, a plurality of components of extracting transmission data, a safety flag, and a data error detection code from a received frame, and detecting a data error, a comparator comparing the matching of a plurality of received frames, and a selector selecting one received frame, from the frame error detection result, the safety flag, the data error detection result, and the matching comparison result; and determines the validity of transmitted data by the detection corresponding to the degree of reliability set with the safety flag.

Abstract: Processed results are received when processors make compatible computations on data of a common object. A computation command signal is generated and fed to the processors in response to a start signal from any one of the processors so that the processors can make computations with different operation timings. Then, the results of the computations made by the processors are compared with each other. Thus, apparatus capable of small size, high performance and safety at the same time can be achieved by the above construction using the processors.