Patents by Inventor Masakazu Sugiura
Masakazu Sugiura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9917573Abstract: To provide a voltage detection circuit which avoids unintentional on/off-control of an output transistor immediately after starting a power supply. A voltage detection circuit is configured to be equipped with a comparator which compares a detected voltage and a reference voltage, and an inverter which drives an output transistor, based on an output of the comparator and to supply the operating current of the inverter by a current source.Type: GrantFiled: December 2, 2015Date of Patent: March 13, 2018Assignee: SII SEMICONDUCTOR CORPORATIONInventor: Masakazu Sugiura
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Patent number: 9910452Abstract: Provided is a reference voltage circuit capable of adjusting an arbitrary output voltage to have arbitrary temperature characteristics. The reference voltage circuit includes: a reference current generating circuit configured to convert a difference between forward voltages of a plurality of PN junction elements into current to generate a first current; a current generating circuit configured to use the first current generated by the reference current generating circuit to generate a second current; and a voltage generating circuit including a first resistive element and a second resistive element, the first resistive element being configured to generate a first voltage having positive temperature characteristics when the first current flows through the first resistive element, the second resistive element being configured to generate a second voltage having negative temperature characteristics when the first current and the second current flow through the second resistive element.Type: GrantFiled: September 18, 2014Date of Patent: March 6, 2018Assignee: SII SEMICONDUCTOR CORPORATIONInventors: Kosuke Takada, Masakazu Sugiura
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Patent number: 9886052Abstract: Provided is a voltage regulator configured to suppress a fluctuation in output voltage even when a power supply voltage fluctuates, thereby realizing stable operation thereof. The voltage regulator includes a control circuit including a first input terminal connected to a drain of an output transistor, a second input terminal connected to a power supply terminal, an overshoot detection circuit connected to the first input terminal, and a power supply voltage detection circuit connected to the second input terminal, and being configured to cause a boost current to flow through an error amplifier circuit when an output voltage and a power supply voltage largely fluctuate with respect to a predetermined voltage.Type: GrantFiled: May 17, 2016Date of Patent: February 6, 2018Assignee: SII SEMICONDUCTOR CORPORATIONInventors: Tsutomu Tomioka, Masakazu Sugiura
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Publication number: 20170353166Abstract: Provided are an amplifier circuit capable of reducing DC offset voltage without an increase in chip area and degradation in frequency characteristics, and a multipath nested miller amplifier circuit. The amplifier circuit includes a chopper switching circuit, a sampling circuit configured to sample an output signal from the chopper switching circuit, and a holding circuit configured to hold a signal output from the sampling circuit.Type: ApplicationFiled: May 30, 2017Publication date: December 7, 2017Inventors: Masakazu SUGIURA, Toshiyuki TSUZAKI, Yuji SHIINE, Manabu FUJIMURA
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Patent number: 9831757Abstract: Provided is a voltage regulator configured to suppress a variation of an output voltage so as to stably operate even when a power supply voltage varies. The voltage regulator includes a control circuit having an input terminal connected to a drain of an output transistor, and an output terminal connected to an error amplifier circuit. The control circuit is configured to cause a boost current to flow through an error amplifier circuit when the output voltage varies beyond a predetermined value.Type: GrantFiled: December 12, 2014Date of Patent: November 28, 2017Assignee: SII SEMICONDUCTOR CORPORATIONInventors: Tsutomu Tomioka, Masakazu Sugiura
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Patent number: 9811105Abstract: To provide a reference voltage circuit capable of outputting a reference voltage excellent in temperature characteristic. A reference voltage circuit includes a first constant current circuit, a first transistor of a first conductivity type which has a source connected to the first constant current circuit and is operated as a first stage source follower, a second constant current circuit, and a second transistor of a second conductivity type which has a gate connected to the source of the first transistor and a source connected to the second constant current circuit and is operated as a second stage source follower. The reference voltage circuit is configured to output a reference voltage from the source of the second transistor.Type: GrantFiled: January 14, 2015Date of Patent: November 7, 2017Assignee: SII SEMICONDUCTOR CORPORATIONInventors: Masakazu Sugiura, Tsutomu Tomioka
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Patent number: 9800156Abstract: Provided are an amplifier circuit capable of improving phase characteristics, and a voltage regulator including the amplifier circuit. The amplifier circuit is configured to amplify an input voltage and to output the input voltage, and includes a current source, a first transistor having a gate to which the input voltage is applied, and a second transistor having a gate to which a voltage synchronous with the input voltage is applied, and a source connected to a capacitor.Type: GrantFiled: December 2, 2016Date of Patent: October 24, 2017Assignee: SII SEMICONDUCTOR CORPORATIONInventor: Masakazu Sugiura
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Patent number: 9772365Abstract: Provided is a detection circuit configured to avoid erroneous detection that may occur immediately after a detection circuit is powered on. The detection circuit includes: an output transistor connected between a voltage input terminal and a voltage output terminal; and a load open-circuit detection circuit configured to detect an open circuit of a load connected to the voltage output terminal, in which an output circuit of the load open-circuit detection circuit includes a first transistor and a second transistor connected in series, the first transistor having a gate connected to the output transistor in common, the second transistor having a gate to which a signal indicating that the open-circuit of the load is detected, and in which the first transistor is in an off state when the output transistor is in an off state.Type: GrantFiled: January 21, 2016Date of Patent: September 26, 2017Assignee: SII Semiconductor CorporationInventors: Masakazu Sugiura, Atsushi Igarashi
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Patent number: 9748946Abstract: To provide a power supply switching circuit which avoids an increase in current consumption. A power supply switching circuit includes MOS transistors provided between power supply input terminals and an output terminal, which have gates connected to each other and backgates connected to each other and are connected in series.Type: GrantFiled: February 4, 2016Date of Patent: August 29, 2017Assignee: SII SEMICONDUCTOR CORPORATIONInventor: Masakazu Sugiura
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Patent number: 9740222Abstract: To provide an overcurrent protection circuit which prevents an excessive current from flowing to an output terminal for a long time, and a semiconductor device and a voltage regulator each equipped with the overcurrent protection circuit. An overcurrent protection circuit is configured to include a first transistor which allows a current proportional to an output current flowing through an output transistor to flow, a constant current circuit which allows a reference current to flow, a comparison circuit which compares the current flowing through the first transistor and the reference current, and a control circuit which controls a gate of the output transistor by a signal outputted from the comparison circuit.Type: GrantFiled: April 22, 2015Date of Patent: August 22, 2017Assignee: SII Semiconductor CorporationInventor: Masakazu Sugiura
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Patent number: 9733284Abstract: To provide a current detection circuit capable of suppressing the occurrence of a large potential difference between input terminals of a differential amplifier circuit, and preventing degradation of input transistors. A differential amplifier circuit is equipped with a clamp circuit which limits gate-source voltages of a pair of PMOS transistors each having a bulk and a source connected to each other with the sources of the pair of PMOS transistors as input terminals.Type: GrantFiled: April 5, 2016Date of Patent: August 15, 2017Assignee: SII SEMICONDUCTOR CORPORATIONInventors: Atsushi Igarashi, Nao Otsuka, Masakazu Sugiura
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Publication number: 20170170730Abstract: Provided are an amplifier circuit capable of improving phase characteristics, and a voltage regulator including the amplifier circuit. The amplifier circuit is configured to amplify an input voltage and to output the input voltage, and includes a current source, a first transistor having a gate to which the input voltage is applied, and a second transistor having a gate to which a voltage synchronous with the input voltage is applied, and a source connected to a capacitor.Type: ApplicationFiled: December 2, 2016Publication date: June 15, 2017Inventor: Masakazu SUGIURA
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Patent number: 9671802Abstract: Provided is a voltage regulator capable of applying an optimal overshoot suppression unit depending on states. The voltage regulator includes: an amplifier for controlling an output transistor based on a voltage obtained by amplifying a difference between a divided voltage and a reference voltage; a first overshoot suppression unit for controlling a gate voltage of the output transistor, to thereby suppress overshoot of the output voltage; a second overshoot suppression unit for controlling an operating current of the amplifier, to thereby suppress the overshoot of the output voltage; and a control circuit. The control circuit is configured to turn on the first overshoot suppression unit immediately after the voltage regulator is powered on, and turn off the first overshoot suppression unit under a state in which the output voltage is stable.Type: GrantFiled: December 14, 2015Date of Patent: June 6, 2017Assignee: SII SEMICONDUCTOR CORPORATIONInventors: Masakazu Sugiura, Tsutomu Tomioka
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Publication number: 20170093378Abstract: To provide an input circuit which avoids power supply voltage dependency of a threshold of the input circuit when an output signal is transited. There is provided an input circuit equipped with an input transistor and a current source connected in series between a first power supply and a second power supply. The input circuit is configured in such a manner that an input signal is inputted to a gate of the input transistor and a signal of a connection point between the input transistor and the current source is outputted as an output signal, and a current value of the current source is changed based on the output signal.Type: ApplicationFiled: September 15, 2016Publication date: March 30, 2017Inventors: Masakazu SUGIURA, Tsutomu TOMIOKA
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Publication number: 20160342171Abstract: Provided is a voltage regulator configured to suppress a fluctuation in output voltage even when a power supply voltage fluctuates, thereby realizing stable operation thereof. The voltage regulator includes a control circuit including a first input terminal connected to a drain of an output transistor, a second input terminal connected to a power supply terminal, an overshoot detection circuit connected to the first input terminal, and a power supply voltage detection circuit connected to the second input terminal, and being configured to cause a boost current to flow through an error amplifier circuit when an output voltage and a power supply voltage largely fluctuate with respect to a predetermined voltage.Type: ApplicationFiled: May 17, 2016Publication date: November 24, 2016Inventors: Tsutomu TOMIOKA, Masakazu SUGIURA
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Publication number: 20160305985Abstract: To provide a current detection circuit capable of suppressing the occurrence of a large potential difference between input terminals of a differential amplifier circuit, and preventing degradation of input transistors. A differential amplifier circuit is equipped with a clamp circuit which limits gate-source voltages of a pair of PMOS transistors each having a bulk and a source connected to each other with the sources of the pair of PMOS transistors as input terminals.Type: ApplicationFiled: April 5, 2016Publication date: October 20, 2016Inventors: Atsushi IGARASHI, Nao OTSUKA, Masakazu SUGIURA
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Patent number: 9455628Abstract: To provide a voltage regulator capable of preventing a reduction in output voltage and an increase in output noise in a steady state without performing suppression of an overshoot. A voltage regulator is equipped with an overshoot detection circuit which detects an overshoot on the basis of an output voltage, an overshoot suppression circuit which controls an output terminal of an error amplifier circuit, based on the output of the overshoot detection circuit, and a driver state discrimination circuit which discriminates the state of an output transistor, based on an output voltage of the error amplifier circuit. The driver state discrimination circuit is configured to control the operation of the overshoot suppression circuit.Type: GrantFiled: January 14, 2015Date of Patent: September 27, 2016Assignee: SII SEMICONDUCTOR CORPORATIONInventors: Tsutomu Tomioka, Masakazu Sugiura
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Publication number: 20160233773Abstract: To provide a power supply switching circuit which avoids an increase in current consumption. A power supply switching circuit includes MOS transistors provided between power supply input terminals and an output terminal, which have gates connected to each other and backgates connected to each other and are connected in series.Type: ApplicationFiled: February 4, 2016Publication date: August 11, 2016Inventor: Masakazu SUGIURA
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Publication number: 20160216307Abstract: Provided is a detection circuit configured to avoid erroneous detection that may occur immediately after a detection circuit is powered on. The detection circuit includes: an output transistor connected between a voltage input terminal and a voltage output terminal; and a load open-circuit detection circuit configured to detect an open circuit of a load connected to the voltage output terminal, in which an output circuit of the load open-circuit detection circuit includes a first transistor and a second transistor connected in series, the first transistor having a gate connected to the output transistor in common, the second transistor having a gate to which a signal indicating that the open-circuit of the load is detected, and in which the first transistor is in an off state when the output transistor is in an off state.Type: ApplicationFiled: January 21, 2016Publication date: July 28, 2016Inventors: Masakazu SUGIURA, Atsushi IGARASHI
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Patent number: 9400515Abstract: A voltage regulator is provided which can suppress an occurrence of overshooting in an output voltage at the time of starting a power source with a source voltage or the like. The voltage regulator includes an error amplifier circuit, an overshooting control circuit that is connected to the gate of an output transistor, and an ON/OFF circuit that controls ON and OFF states of at least the error amplifier circuit. Here, the ON/OFF circuit controls the overshooting control circuit so as to turn on the output transistor when a predetermined time passes after at least the error amplifier circuit is turned on at the time of starting the voltage regulator.Type: GrantFiled: December 18, 2014Date of Patent: July 26, 2016Assignee: SII SEMICONDUCTOR CORPORATIONInventors: Tsutomu Tomioka, Masakazu Sugiura