Patents by Inventor Masaki Kan

Masaki Kan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10909044
    Abstract: To avoid degradation of access performance and resource use efficiency when a multi-node system utilizing a resource-disaggregated architecture makes data access across nodes under the control of software and the like which are not compatible with the resource-disaggregated architecture, an access control unit 410-1 is a unit included in an access control system 2, wherein remote access from a first processor 420-1 to a second information processing resource 440-2 is made via first and second communication networks, and is equipped with: a determination part 411-1 for determining whether or not the access made by the first processor 420-1 is remote access; and an access conversion part 412-1 for converting, when the access is remote access, the remote access to local access by updating access destination management information 432-1 such that the second information processing resource is associated with a first information processing device.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: February 2, 2021
    Assignee: NEC CORPORATION
    Inventors: Masaki Kan, Jun Suzuki, Yuki Hayashi, Akira Tsuji
  • Patent number: 10831547
    Abstract: An accelerator control apparatus includes: a task storage part which holds an executable task(s); a data scheduler which selects a task needing a relatively small input/output data amount on a memory included in an accelerator when the task is executed by the accelerator from the executable task(s) and instructs the accelerator to prepare for data I/O on the memory for the selected task; and a task scheduler which instructs the accelerator to execute the selected task and adds a task that becomes executable upon completion of the selected task to the task storage part, wherein the data scheduler continues, depending on a use status of the memory, selection of a next task from the executable task(s) held in the task storage part and preparation of data I/O for the next task selected.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: November 10, 2020
    Assignee: NEC CORPORATION
    Inventors: Jun Suzuki, Masaki Kan, Yuki Hayashi
  • Patent number: 10797957
    Abstract: A network management apparatus includes: a determination part that determines, when a set of transmission rates set for a plurality of groups including one or more flows is gradually changed from a start state to an end state, a set(s) of transmission rates used in an intermediate state(s) in such a manner that a constraint(s) on a bandwidth(s) of a link(s) through which a flow(s) passes is satisfied; and a setting part that gradually changes the set of transmission rates set for the plurality of groups from the start state to the end state while using the determined set(s) of transmission rates in the intermediate state(s).
    Type: Grant
    Filed: October 27, 2016
    Date of Patent: October 6, 2020
    Assignee: NEC CORPORATION
    Inventors: Yuki Hayashi, Jun Suzuki, Masaki Kan
  • Patent number: 10692647
    Abstract: A coil component includes a non-conductive bobbin and a coil that winds around the bobbin. The coil includes first and second coil members with joining portions in which joining holes are formed. The bobbin includes first and second bobbin members. The first bobbin member includes: first and second positioning portions that position the first and second coil members, respectively, when the first and second coil members are moved onto the first bobbin member; and a support that supports lower portions of the first and second joining portions. The second bobbin member includes a first insulator disposed between the first and second coil members. The first and second coil members and the second bobbin member are attached to the first bobbin member by being moved in a single direction without a further step of rotating.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: June 23, 2020
    Assignee: TDK CORPORATION
    Inventors: Masaki Kan, Han Wu
  • Publication number: 20200183756
    Abstract: The present invention addresses a problem in which distributed processing of data of various formats could not be performed. The distributed processing system 200 according to the present invention is provided with: an interface means 201 for receiving data formats of data to be processed in a distributed manner and parameters which are dependent on the data formats of the data to be processed in the distributed manner; and a divided data generation means 202 for generating, from the data, data partitions which are processing units used when processing the data in a distributed manner, and for generating metadata corresponding to the respective data partitions, including information based on parameters which are dependent on the data formats of the source data from which the data partitions are generated.
    Type: Application
    Filed: October 17, 2017
    Publication date: June 11, 2020
    Applicant: NEC Corporation
    Inventors: Jun SUZUKI, Masaki KAN, Yuki HAYASHI
  • Patent number: 10621125
    Abstract: A packet processing device is connected as a route of a plurality of I/O devices and configures a PCIe fabric. The packet processing device includes a plurality of first request processing units and a second request processing unit that process a PCIe packet issuing request to the I/O device; and a first selecting unit that selects the plurality of first request processing units or the second request processing unit, based on a request classification of the PCIe packet issuing request, and a load exerted on the PCIe fabric by a packet to be transmitted to the I/O device. The first selecting unit includes a first determining unit that determines whether the PCIe packet issuing request is possible to pass another PCIe packet issuing request being processed by the first request processing unit, based on a transaction identifier included in the PCIe packet issuing request.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: April 14, 2020
    Assignee: NEC CORPORATION
    Inventors: Akira Tsuji, Masaki Kan, Jun Suzuki, Yuki Hayashi
  • Patent number: 10606635
    Abstract: Provided is an accelerator control apparatus including a data management table storing a name assigned to data and an identifier for an accelerator that stores the data on a local memory by associating the name and the identifier; a data management unit that is configured to determine, when receiving a first process that accepts data assigned with the name as input data, the accelerator that stores the data on the local memory, by referring to the data management table; and a task processing unit that is configured to control the accelerator being determined by data management unit to execute the first process.
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: March 31, 2020
    Assignee: NEC CORPORATION
    Inventors: Jun Suzuki, Masaki Kan, Yuki Hayashi
  • Patent number: 10594058
    Abstract: A terminal block includes: a nonconductive main body that is attached to a structure; a main terminal that is conductive, passes through the main body, and is disposed on the main body so that both ends of the main terminal project from the main body; a capacitor that is sealed inside the main body; a first connecting conductor that connects one lead terminal of the capacitor and the main terminal; and a second connecting conductor that connects another lead terminal of the capacitor and a conductor of the structure. The first connecting conductor is entirely sealed inside the main body in a state where one end is connected to the main terminal and another end is connected to the one lead terminal of the capacitor.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: March 17, 2020
    Assignee: TDK CORPORATION
    Inventors: Masaki Kan, Han Wu
  • Patent number: 10496585
    Abstract: Provided is an accelerator control apparatus including: an accelerator that is configured to store at least one segment data item of a plurality of segment data items obtained by dividing data, and a boundary data item that is data item being included in a segment data item adjacent to the at least one segment data item; and data management unit to determine whether a width of data which is included in the boundary data item and is consistent with the segment data item adjacent to the at least one segment data item, is equal to or larger than a reference width representing a width of data referred to in processing executed by the accelerator.
    Type: Grant
    Filed: June 20, 2016
    Date of Patent: December 3, 2019
    Assignee: NEC CORPORATION
    Inventors: Jun Suzuki, Masaki Kan, Yuki Hayashi, Takuya Araki
  • Publication number: 20190334826
    Abstract: Provided are a connection management mechanism and a connection management method with which computer bus connections can be managed such that failures and freezes do not occur in a computer system when delays and packet losses occur. A connection management unit, which is used in computer bus communication in which packets are transmitted between a request source and a request destination, has a dummy return packet generation/transmission function wherein a dummy return packet is generated and is transmitted to the request source when a delay or loss occurs in a return packet transmitted from the request destination, and/or a filter function wherein, after transmission of the dummy return packet, a legitimate return packet arriving from the request destination is discarded.
    Type: Application
    Filed: January 9, 2018
    Publication date: October 31, 2019
    Applicant: NEC Corporation
    Inventors: Yuki HAYASHI, Jun SUZUKI, Masaki KAN
  • Patent number: 10404288
    Abstract: To speed up processing for decoding a source packet from a coded packet based on rateless coding, a terminal is provided with: a storage unit which holds a matrix with n rows and n columns and an n-bit flag; and a calculation unit which performs processing for extracting an element that becomes 1 in both a received n-bit coded packet and the flag, and performing processing for performing an exclusive OR operation of a row vector of the matrix that corresponds to the element number of the extracted element and the received coded packet on all extracted elements, determines an element that is the first to become 1 in the coded packet after the exclusive OR operation, and inserts, into the matrix, the coded packet after the exclusive OR operation as a row vector corresponding to the element number of the determined element.
    Type: Grant
    Filed: May 19, 2015
    Date of Patent: September 3, 2019
    Assignee: NEC CORPORATION
    Inventors: Yuki Hayashi, Jun Suzuki, Masaki Kan
  • Publication number: 20190179784
    Abstract: A packet processing device is connected as a route of a plurality of I/O devices and configures a PCIe fabric. The packet processing device includes a plurality of first request processing units and a second request processing unit that process a PCIe packet issuing request to the I/O device; and a first selecting unit that selects the plurality of first request processing units or the second request processing unit, based on a request classification of the PCIe packet issuing request, and a load exerted on the PCIe fabric by a packet to be transmitted to the I/O device. The first selecting unit includes a first determining unit that determines whether the PCIe packet issuing request is possible to pass another PCIe packet issuing request being processed by the first request processing unit, based on a transaction identifier included in the PCIe packet issuing request.
    Type: Application
    Filed: June 21, 2017
    Publication date: June 13, 2019
    Applicant: NEC Corporation
    Inventors: Akira TSUJI, Masaki KAN, Jun SUZUKI, Yuki HAYASHI
  • Patent number: 10318392
    Abstract: A Management system 10 includes: resource pools 111-114 which act as the hardware components on which multiple virtual machines are running; an inter-connecting network 12 which connects various resource pools; and a HA manager 13 which snoops all traffic of the inter-connecting network 12 to detect failure of a target VM and triggers corresponded actions when failure is detected.
    Type: Grant
    Filed: October 6, 2014
    Date of Patent: June 11, 2019
    Assignee: NEC CORPORATION
    Inventors: Lei Sun, Shinya Miyakawa, Masaki Kan, Jun Suzuki, Yuki Hayashi
  • Publication number: 20190171584
    Abstract: To avoid degradation of access performance and resource use efficiency when a multi-node system utilizing a resource-disaggregated architecture makes data access across nodes under the control of software and the like which are not compatible with the resource-disaggregated architecture, an access control unit 410-1 is a unit included in an access control system 2, wherein remote access from a first processor 420-1 to a second information processing resource 440-2 is made via first and second communication networks, and is equipped with: a determination part 411-1 for determining whether or not the access made by the first processor 420-1 is remote access; and an access conversion part 412-1 for converting, when the access is remote access, the remote access to local access by updating access destination management information 432-1 such that the second information processing resource is associated with a first information processing device.
    Type: Application
    Filed: April 17, 2017
    Publication date: June 6, 2019
    Applicant: NEC Corporation
    Inventors: Masaki KAN, Jun SUZUKI, Yuki HAYASHI, Akira TSUJI
  • Patent number: 10291549
    Abstract: A parameter determination apparatus is provided with: an input/output I/F configured to receive topology information representing connections between nodes included in a communication system, and node pair information indicating node pairs that communicate with each other; a parameter determination unit configured to simultaneously determine, based on the topology information and the node pair information, a group formed of 1 or more node pairs and a transmission rate to be assigned to the group; and a parameter setting unit configured to give notification of the group and the transmission rate to the nodes included in the communication system. In this way, network utilization efficiency is increased.
    Type: Grant
    Filed: March 17, 2016
    Date of Patent: May 14, 2019
    Assignee: NEC CORPORATION
    Inventors: Yuki Hayashi, Jun Suzuki, Masaki Kan
  • Publication number: 20190123936
    Abstract: In order to achieve a communication apparatus capable of efficiently transmitting data, the present invention is provided with a plurality of buffers configured to cause a communication packet to wait therein, and an intra-buffer packet switching means for moving a predetermined communication packet among packets waiting in the plurality of buffers from a first buffer in which the predetermined communication packet waits to a second buffer among the plurality of buffers.
    Type: Application
    Filed: April 14, 2017
    Publication date: April 25, 2019
    Applicant: NEC Corporation
    Inventors: Yuki HAYASHI, Jun SUZUKI, Masaki KAN
  • Patent number: 10270701
    Abstract: Disclosed are a management node and the like for enabling packets to be efficiently sent to a plurality of destination terminals, while preventing the increase of implementation scale of network interface cards (NIC). The management node includes: a rule determination means for determining a prescribed rule for distributing packets to a plurality of rate control means included in the network interface cards (NIC) provided to the terminals; and a rule sending means for sending the determined prescribed rule to the terminals.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: April 23, 2019
    Assignee: NEC CORPORATION
    Inventors: Yuki Hayashi, Jun Suzuki, Masaki Kan
  • Patent number: 10200296
    Abstract: [Problem] In a case where a plurality of packets are compiled for transmission to a network, the length of data to be continuously transmitted to each of a plurality of destinations is increased and hence the time interval in which the packet(s) addressed to each destination gets a transmission opportunity is increased, with the result that the packet delay is disadvantageously increased. [Solution] A packet extraction unit (22 of FIG. 2) extracts a plurality of packets as a whole from a packet compilation queue (21 of FIG. 2) that sorts, according to destinations, and stores packets. A limited number of packets to be extracted as a whole at this time is given in accordance with a maximum packet compilation number defined by a maximum compilation number calculation unit (29 of FIG. 2) on the basis of a band increase and a delay increase due to a packet compilation.
    Type: Grant
    Filed: May 7, 2015
    Date of Patent: February 5, 2019
    Assignee: NEC CORPORATION
    Inventors: Jun Suzuki, Yuki Hayashi, Masaki Kan
  • Patent number: 10191690
    Abstract: Provided is contribution for improving response performance. For that, a storage system includes a control device and a memory device that is connected to the control device via an interconnected network, wherein the memory device includes a data memory unit that stores data and a comparison write unit that performs a comparison write process of comparing first data specified by the control device with second data stored into a predetermined area in the data memory means and determining whether to update data in the predetermined area depending on a result of the comparison, and wherein the control device includes a read command issuance unit that issues a read command to the memory device; a write buffer memory unit that holds data that has been read based on the read command; and a comparison write command unit that designates data written to the write buffer memory means as the first data and instructs, in the form of a comparison write command, the memory device to perform the comparison write process.
    Type: Grant
    Filed: March 18, 2015
    Date of Patent: January 29, 2019
    Assignee: NEC Corporation
    Inventors: Masaki Kan, Jun Suzuki, Yuki Hayashi
  • Publication number: 20190026157
    Abstract: An accelerator control apparatus includes: a task storage part which holds an executable task(s); a data scheduler which selects a task needing a relatively small input/output data amount on a memory included in an accelerator when the task is executed by the accelerator from the executable task(s) and instructs the accelerator to prepare for data I/O on the memory for the selected task; and a task scheduler which instructs the accelerator to execute the selected task and adds a task that becomes executable upon completion of the selected task to the task storage part, wherein the data scheduler continues, depending on a use status of the memory, selection of a next task from the executable task(s) held in the task storage part and preparation of data I/O for the next task selected.
    Type: Application
    Filed: January 27, 2017
    Publication date: January 24, 2019
    Applicant: NEC CORPORATION
    Inventors: Jun SUZUKI, Masaki KAN, Yuki HAYASHI