Patents by Inventor Masaki Miyazato

Masaki Miyazato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11469303
    Abstract: A semiconductor device includes a semiconductor device provided on a semiconductor substrate and an ohmic electrode provided on a back surface of the semiconductor device and containing a nickel silicide and a molybdenum carbide, or the nickel silicide and a titanium carbide. The ohmic electrode is configured by first regions where a silicide is thick and second regions where the silicide is thin; a ratio of an arithmetic area of the second regions to an arithmetic area of the ohmic electrode is in a range from 10% to 30% in a plan view.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: October 11, 2022
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Makoto Utsumi, Masaki Miyazato
  • Publication number: 20220254917
    Abstract: A silicon carbide semiconductor device being capable of operating at least 100 degree C., includes a semiconductor substrate having an active region, the semiconductor substrate having first and second surfaces opposite to each other, a first semiconductor region of an n type, provided in the semiconductor substrate, a second semiconductor region of a p type, provided in the active region, between the first surface of the semiconductor substrate and the first semiconductor region, and a device element structure including a pn junction between the second and first semiconductor regions that forms a body diode through which a current flows when the semiconductor device is turned on. A stacking fault area that is a sum of areas that contain stacking faults within an entire active region of the first surface of the semiconductor substrate in the first surface is set to be greater, the higher a breakdown voltage is set.
    Type: Application
    Filed: January 4, 2022
    Publication date: August 11, 2022
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Yohei KAGOYAMA, Masaki MIYAZATO
  • Publication number: 20220254916
    Abstract: Back-surface roughness of a back surface of a silicon carbide semiconductor device having a MOS gate structure in a first region that is a region within 30 ?m of a cross section (lateral surface) of the device is at most 4 ?m while the back-surface roughness in a second region other than the first region is at most 2 ?m, the back surface of the silicon carbide semiconductor device is the back surface of the second electrode. In a method of manufacture, the back-surface roughness of the device is specified to meet a predetermined condition. Then, ON voltages of the device before and after a forward current is passed through body diodes of the device are measured, and a rate of change of the ON voltage while the forward current is passed through body diodes is calculated, and then the device having a calculated rate of change less than 3% is identified.
    Type: Application
    Filed: December 30, 2021
    Publication date: August 11, 2022
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Masaki MIYAZATO, Makoto UTSUMI
  • Publication number: 20220214392
    Abstract: A body diode is energized by inputting a BD energization pulse signal having a predetermined cycle. At the start of energization of the body diode and immediately before termination thereof, an ON signal of a Von measurement pulse signal is input to a high-temperature semiconductor chip at a timing different from that of an ON signal of the BD energization pulse signal, thereby passing a drain-source current through a MOSFET, and a drain-source voltage is measured. Thereafter, energization of the body diode is terminated. At room temperature before and after the energization of the body diode, the drain-source voltage is measured by inputting the ON signal of the Von measurement pulse signal. A semiconductor chip for which a fluctuation amount of the drain-source voltage at a high temperature and a fluctuation amount of the drain-source voltage at room temperature are within predetermined ranges is determined to be a conforming product.
    Type: Application
    Filed: November 30, 2021
    Publication date: July 7, 2022
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Makoto UTSUMI, Masaki MIYAZATO
  • Publication number: 20220165629
    Abstract: A portion of a source pad is exposed in an opening of a passivation film. In the exposed portion of the source pad, a wiring region in which a package wiring member is to be bonded and a probe region that is a region different from the wiring region are provided. The probe region has a probe mark of a probe for an energization inspection. An area of the probe mark that overlaps the wiring region is at most 30% of an entire area of the wiring region in a plan view of the silicon carbide semiconductor device.
    Type: Application
    Filed: September 29, 2021
    Publication date: May 26, 2022
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Makoto UTSUMI, Masaki MIYAZATO
  • Publication number: 20220109049
    Abstract: A silicon carbide semiconductor device includes silicon carbide semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type, a second semiconductor layer of the first conductivity type, a third semiconductor layer of a second conductivity type, a first semiconductor region of the first conductivity type, a trench, a gate insulating film, a gate electrode, and an interlayer insulating film. The first semiconductor layer and the second semiconductor layer constitute a first-conductivity-type semiconductor layer and in a deep region of the first-conductivity-type semiconductor layer at least 1 ?m from an interface with the third semiconductor layer, a maximum value of a concentration of aluminum is less than 3.0×1013/cm3. In the deep region of the first-conductivity-type semiconductor layer, a maximum value of a concentration of boron is less than 1.0×1014/cm3.
    Type: Application
    Filed: August 31, 2021
    Publication date: April 7, 2022
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Masaki MIYAZATO
  • Patent number: 11262399
    Abstract: A method of determining whether a silicon-carbide semiconductor device, which has a metal oxide semiconductor (MOS) gate structure and a built-in diode, is a conforming product. The method includes measuring an ON voltage of the silicon carbide semiconductor device, passing a forward current through the built-in diode of the silicon carbide semiconductor device, measuring another ON voltage of the silicon carbide semiconductor device, which is the ON voltage of the silicon carbide semiconductor device after passing the forward current, calculating a rate of change between the ON voltage and the another ON voltage, and determining that the silicon carbide semiconductor device is a conforming product unless the calculated rate of change is less than 3%.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: March 1, 2022
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Masaki Miyazato
  • Publication number: 20210217852
    Abstract: A semiconductor device includes a semiconductor device provided on a semiconductor substrate and an ohmic electrode provided on a back surface of the semiconductor device and containing a nickel silicide and a molybdenum carbide, or the nickel silicide and a titanium carbide. The ohmic electrode is configured by first regions where a silicide is thick and second regions where the silicide is thin; a ratio of an arithmetic area of the second regions to an arithmetic area of the ohmic electrode is in a range from 10% to 30% in a plan view.
    Type: Application
    Filed: November 30, 2020
    Publication date: July 15, 2021
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Makoto UTSUMI, Masaki MIYAZATO
  • Publication number: 20200292612
    Abstract: A method of determining whether a silicon-carbide semiconductor device, which has a metal oxide semiconductor (MOS) gate structure and a built-in diode, is a conforming product. The method includes measuring an ON voltage of the silicon carbide semiconductor device, passing a forward current through the built-in diode of the silicon carbide semiconductor device, measuring another ON voltage of the silicon carbide semiconductor device, which is the ON voltage of the silicon carbide semiconductor device after passing the forward current, calculating a rate of change between the ON voltage and the another ON voltage, and determining that the silicon carbide semiconductor device is a conforming product unless the calculated rate of change is less than 3%.
    Type: Application
    Filed: March 2, 2020
    Publication date: September 17, 2020
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Masaki MIYAZATO
  • Patent number: 10418445
    Abstract: In a vertical MOSFET having a trench gate structure, a lifetime killer region is provided in a p-type epitaxial layer formed by epitaxial growth. The lifetime killer region includes an electron lifetime killer that causes electrons entering the lifetime killer region to recombine and become extinct. As a result, the lifetime killer region decreases the electrons generated at the pn interface of the p-type epitaxial layer and an n-type drift layer and enables a configuration in which electrons are not delivered to the p-type epitaxial layer.
    Type: Grant
    Filed: May 24, 2018
    Date of Patent: September 17, 2019
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Mina Ryo, Takeshi Tawara, Masaki Miyazato, Masaaki Miyajima
  • Patent number: 10163637
    Abstract: A silicon carbide semiconductor device, including a silicon carbide semiconductor substrate, and an insulating film formed on a front surface of the silicon carbide semiconductor substrate. The silicon carbide semiconductor substrate has fluorine implanted therein, a concentration of which is in a range of 2×1017/cm3 to 4×1018/cm3. A method of manufacturing the silicon carbide semiconductor device includes providing a silicon carbide semiconductor substrate, forming an oxide film on a front surface of the silicon carbide semiconductor substrate, removing a portion of the oxide film to expose the silicon carbide semiconductor substrate, implanting fluorine ions in the front surface of the silicon carbide semiconductor substrate through the removed portion of the oxide film, removing the oxide film after the fluorine ions are implanted, and forming an insulating film on the front surface of the silicon carbide semiconductor substrate after the oxide film is removed.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: December 25, 2018
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Tsuyoshi Araoka, Youichi Makifuchi, Masaki Miyazato, Takashi Tsutsumi, Mitsuo Okamoto, Kenji Fukuda
  • Publication number: 20180358444
    Abstract: In a vertical MOSFET having a trench gate structure, a lifetime killer region is provided in a p-type epitaxial layer formed by epitaxial growth. The lifetime killer region includes an electron lifetime killer that causes electrons entering the lifetime killer region to recombine and become extinct. As a result, the lifetime killer region decreases the electrons generated at the pn interface of the p-type epitaxial layer and an n-type drift layer and enables a configuration in which electrons are not delivered to the p-type epitaxial layer.
    Type: Application
    Filed: May 24, 2018
    Publication date: December 13, 2018
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Mina Ryo, Takeshi Tawara, Masaki Miyazato, Masaaki Miyajima
  • Publication number: 20180090320
    Abstract: A silicon carbide semiconductor device, including a silicon carbide semiconductor substrate, and an insulating film formed on a front surface of the silicon carbide semiconductor substrate. The silicon carbide semiconductor substrate has fluorine implanted therein, a concentration of which is in a range of 2×1017/cm3 to 4×1018/cm3. A method of manufacturing the silicon carbide semiconductor device includes providing a silicon carbide semiconductor substrate, forming an oxide film on a front surface of the silicon carbide semiconductor substrate, removing a portion of the oxide film to expose the silicon carbide semiconductor substrate, implanting fluorine ions in the front surface of the silicon carbide semiconductor substrate through the removed portion of the oxide film, removing the oxide film after the fluorine ions are implanted, and forming an insulating film on the front surface of the silicon carbide semiconductor substrate after the oxide film is removed.
    Type: Application
    Filed: August 30, 2017
    Publication date: March 29, 2018
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Tsuyoshi Araoka, Youichi Makifuchi, Masaki Miyazato, Takashi Tsutsumi, Mitsuo Okamoto, Kenji Fukuda
  • Patent number: 8334028
    Abstract: A method of forming a protective film for a magnetic recording medium is disclosed. The protective film suppresses cobalt elution out of the magnetic recording layer and has a thickness not larger than 3 nm. The method of the invention of forming a protective film for a magnetic recording medium comprises (1) a step of forming a protective film, on a lamination including a substrate and metallic film layers formed on the substrate, by means of a plasma CVD method using a raw gas of a hydrocarbon gas, wherein a flow rate of the hydrocarbon gas is in a range of 50 sccm to 200 sccm and a emission current is in a range of 0.1 A to 0.3 A, and (2) a step of surface treatment on the protective film that has been formed in the step (1), including sub-steps of (2a) a plasma treatment in an argon gas and (2b) a plasma treatment in a gas containing a nitrogen gas.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: December 18, 2012
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Naruhisa Nagata, Ryoji Kobayashi, Masaki Miyazato
  • Publication number: 20100167090
    Abstract: A method of forming a protective film for a magnetic recording medium is disclosed. The protective film suppresses cobalt elution out of the magnetic recording layer and has a thickness not larger than 3 nm. The method of the invention of forming a protective film for a magnetic recording medium comprises (1) a step of forming a protective film, on a lamination including a substrate and metallic film layers formed on the substrate, by means of a plasma CVD method using a raw gas of a hydrocarbon gas, wherein a flow rate of the hydrocarbon gas is in a range of 50 sccm to 200 sccm and a emission current is in a range of 0.1 A to 0.3 A, and (2) a step of surface treatment on the protective film that has been formed in the step (1), including sub-steps of (2a) a plasma treatment in an argon gas and (2b) a plasma treatment in a gas containing a nitrogen gas.
    Type: Application
    Filed: December 22, 2009
    Publication date: July 1, 2010
    Applicant: FUJI ELECTRIC DEVICE TECHNOLOGY CO. LTD.
    Inventors: Naruhisa NAGATA, Ryoji KOBAYASHI, Masaki MIYAZATO
  • Publication number: 20080318085
    Abstract: A method of forming a carbon protective film is disclosed that improves electromagnetic conversion characteristics through reduction of the film thickness without any damage on a magnetic layer. Also disclosed is a magnetic recording medium that exhibits good electromagnetic conversion characteristics and corrosion resistance. The method of forming the carbon protective film uses a high frequency plasma CVD method on a disk including at least a magnetic film on a nonmagnetic substrate. A bias voltage in a range of ?200 V to zero V is applied at the beginning of discharge in a process of forming the carbon protective film, and a bias voltage in a range of ?500 V to ?200 V is applied at the end of discharge. Also disclosed is a magnetic recording medium having at least a magnetic film and a protective film on a nonmagnetic substrate, wherein the protective film is formed by the method of forming a protective film stated above according to the invention.
    Type: Application
    Filed: June 11, 2008
    Publication date: December 25, 2008
    Applicant: FUJI ELECTRIC DEVICE TECHNOLOGY CO., LTD.
    Inventors: Tuqiang LI, Masaki MIYAZATO, Tsuyoshi ONITSUKA, Makoto ISOZAKI, Hajime KURIHARA
  • Publication number: 20010031382
    Abstract: A carbon protective film of a magnetic recording medium includes a surface region having a high nitrogen concentration. The nitrogen-doped surface region enhances surface energy and improves wettability of the protective film with a liquid lubricant. The nitrogen is implanted by plasma treatment to produce a surface region in the protective film that includes from 6 to 20 at % of nitrogen in the surface region within 30 Å from the film surface. The treatment reduces the contact angle of the film surface with water to the range from of 10 to 30 degrees.
    Type: Application
    Filed: January 10, 2001
    Publication date: October 18, 2001
    Inventors: Kazuhiro Kusakawa, Michinari Kamiyama, Masaki Miyazato, Masanori Yoshihara, Hideki Matsuo, Hideaki Matsuyama
  • Patent number: 5837357
    Abstract: A magnetic recording medium is provided that includes a non-magnetic base, a magnetic layer laminated on a non-magnetic base, a carbon protective layer containing hydrogen and laminated on the magnetic layer, and a lubrication layer formed by applying a liquid lubricant to the carbon protective layer. The carbon protective layer includes a surface layer containing nitrogen, and the composition ratios of nitrogen and hydrogen in the surface layer may be suitably controlled to optimum ranges.
    Type: Grant
    Filed: November 6, 1996
    Date of Patent: November 17, 1998
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Souta Matsuo, Hiroshi Minazawa, Masaki Miyazato, Yoshiharu Kashiwakura