Patents by Inventor Masaki Shiozaki

Masaki Shiozaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11923479
    Abstract: A light-emitting element and an electronic apparatus capable of reducing the element area and realizing a stable electrical connection. A light-emitting element according to the present technology includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer laminated in this order, and a light-emitting surface, a non-light-emitting surface, and a side surface connecting the light-emitting surface and the non-light-emitting surface. The side surface is inclined. A first electrode is in a concave portion in the light-emitting surface at a periphery of the first semiconductor layer. A second electrode is on a non-light-emitting surface side of the laminate. A third electrode is on the non-light-emitting surface side of the laminate and is insulated from the second electrode. The side wiring electrically connects the first electrode and the third electrode via the side surface.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: March 5, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Nobuhiro Sugawara, Yasunari Hanzawa, Shinsuke Nozawa, Masaki Shiozaki, Takeshi Satou
  • Publication number: 20230096713
    Abstract: A light-emitting element including: a stacked body; a light-emitting surface; and a reflecting body. The stacked body includes a first semiconductor layer, a second semiconductor layer, and an active layer between the first and second semiconductor layers, and has first and second surfaces on a side opposite to the active layer, and a circumferential surface that connects the first surface and the second surface and includes an end surface of the active layer, a groove formed in the first semiconductor layer from the first surface toward the active layer, having a depth such that the groove is separated from the active layer, and extending in a direction parallel to the first surface. The light-emitting surface is positioned on the first surface on a side opposite to the active layer and emits light generated in the active layer. The reflecting body reflects light emitted from the end surface toward the groove.
    Type: Application
    Filed: February 15, 2021
    Publication date: March 30, 2023
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yasunari HANZAWA, Nobuhiro SUGAWARA, Masaki SHIOZAKI, Takeshi SATOU, Shinsuke NOZAWA, Hidekazu AOYAGI
  • Publication number: 20210351324
    Abstract: A light-emitting element according to an embodiment of the present disclosure includes: a semiconductor layer having a first surface and a second surface, and including a first conductive-type layer, an active layer, and a second conductive-type layer that are stacked in order from the first surface side; a first dielectric layer provided on the second surface side of the semiconductor layer and having an opening; a first electrode electrically coupled to the first conductive-type layer on the first surface side of the semiconductor layer; and a second electrode provided on the first dielectric layer and electrically coupled to the second conductive-type layer via the opening.
    Type: Application
    Filed: October 4, 2019
    Publication date: November 11, 2021
    Inventors: HIROYUKI OKUYAMA, MASAKI SHIOZAKI, SHINSUKE NOZAWA, NAOKI FURUKAWA, NOBUHIRO SUBAWARA
  • Publication number: 20210320226
    Abstract: A light-emitting element and an electronic apparatus capable of reducing the element area and realizing a stable electrical connection. A light-emitting element according to the present technology includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer laminated in this order, and a light-emitting surface, a non-light-emitting surface, and a side surface connecting the light-emitting surface and the non-light-emitting surface. The side surface is inclined. A first electrode is in a concave portion in the light-emitting surface at a periphery of the first semiconductor layer. A second electrode is on a non-light-emitting surface side of the laminate. A third electrode is on the non-light-emitting surface side of the laminate and is insulated from the second electrode. The side wiring electrically connects the first electrode and the third electrode via the side surface.
    Type: Application
    Filed: August 7, 2019
    Publication date: October 14, 2021
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Nobuhiro SUGAWARA, Yasunari HANZAWA, Shinsuke NOZAWA, Masaki SHIOZAKI, Takeshi SATOU
  • Publication number: 20160308333
    Abstract: A method of manufacturing a laser diode array capable of inhibiting electric cross talk is provided. The method of manufacturing a laser diode array includes a processing step of forming a peel layer containing an oxidizable material and a vertical resonator structure over a first substrate sequentially from the first substrate side by crystal growth, and then selectively etching the peel layer and the vertical resonator structure to the first substrate, thereby processing into a columnar shape, a peeling step of oxidizing the peel layer from a side face, and then peeling the vertical resonator structure of columnar shape from the first substrate, and a rearrangement step of jointing a plurality of vertical resonator structures of columnar shape obtained by the peeling step to a surface of a metal layer of a second substrate formed with the metal layer on the surface.
    Type: Application
    Filed: June 20, 2016
    Publication date: October 20, 2016
    Inventors: Osamu Maeda, Masaki Shiozaki, Takahiro Arakida
  • Patent number: 8582615
    Abstract: There is provided a semiconductor light-emitting device including a temperature detecting section which is allowed to accurately estimate an element temperature. The semiconductor light-emitting device includes: one or a plurality of surface-emitting semiconductor light-emitting sections and one or a plurality of semiconductor temperature detecting sections on a semiconductor substrate, the surface-emitting semiconductor light-emitting sections emitting light in a direction normal to the semiconductor substrate, the semiconductor temperature detecting sections not emitting light to outside. The semiconductor light-emitting sections and the semiconductor temperature detecting sections have a PN junction or a PIN junction in a direction normal to the semiconductor substrate.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: November 12, 2013
    Assignee: Sony Corporation
    Inventors: Osamu Maeda, Masaki Shiozaki, Susumu Sato, Takahiro Arakida, Shiro Uchida
  • Patent number: 8513683
    Abstract: An optical integrated semiconductor light emitting device with improved light emitting efficiency is provided by preventing leak current from flowing through a high defect region of the substrate. The optical integrated semiconductor light emitting device includes: a substrate, in which in a low defect region made of crystal having a first average dislocation density, one or more high defect regions having a second average dislocation density higher than the first average dislocation density are included; and a Group III-V nitride semiconductor layer which is formed on the substrate, has a plurality of light emitting device structures, and has a groove in the region including the region corresponding to the high defect region (high defect region).
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: August 20, 2013
    Assignee: Sony Corporation
    Inventors: Osamu Maeda, Tsuyoshi Fujimoto, Motonobu Takeya, Toshihiro Hashidu, Masaki Shiozaki, Yoshio Oofuji
  • Patent number: 8488647
    Abstract: The present invention provides a semiconductor light emitting device realizing increased light detection precision by a simple manufacture process. One or more second oxidation layers are provided between an active layer and a semiconductor light detecting element in addition to a first oxidation layer for narrowing current. Since natural emission light includes many divergence components, the natural emission light is reflected and scattered by the second oxidation layer, and propagation of the natural emission light to the semiconductor light detecting element side is suppressed. The detection level of the natural emission light by the semiconductor light detecting element decreases, and light detection precision increases. The first and second oxidation layers are formed by a single oxidizing process so that the manufacturing process is simplified.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: July 16, 2013
    Assignee: Sony Corporation
    Inventors: Takahiro Arakida, Shiro Uchida, Masaki Shiozaki, Osamu Maeda
  • Patent number: 8435815
    Abstract: A manufacturing method of a surface-emitting semiconductor laser includes the steps of: forming a stacked structure having a lower-multilayer film reflector including a lower oxidizable layer having at least one layer, an active layer having a light emitting region, an upper-multilayer film reflector including an upper oxidizable layer and an upper layer on a substrate in this order; providing a first groove in the upper layer; and providing a second groove including a portion overlapping the first groove in a planar shape and a portion not overlapping the first groove in the stacked structure.
    Type: Grant
    Filed: December 17, 2010
    Date of Patent: May 7, 2013
    Assignee: Sony Corporation
    Inventors: Masaki Shiozaki, Osamu Maeda, Takahiro Arakida, Susumu Sato
  • Patent number: 8385381
    Abstract: In a VCSEL, a first multilayer film reflector, an active layer having a light emitting central region, a second multilayer film reflector, and a transverse mode adjustment layer are layered in this order. The first multilayer film reflector has a quadrangle current injection region with an intersection of diagonal lines corresponding to the light emitting central region. The second multilayer film reflector has a light emitting window provided in a region corresponding to one diagonal line of the current injection region and a pair of grooves provided with the light emitting window in between. The transverse mode adjustment layer is provided correspondingly to the light emitting window, and reflectance of a peripheral region thereof is lower than that of a central region thereof.
    Type: Grant
    Filed: June 28, 2006
    Date of Patent: February 26, 2013
    Assignee: Sony Corporation
    Inventors: Osamu Maeda, Masaki Shiozaki, Norihiko Yamaguchi, Yoshinori Yamauchi, Yuji Masui
  • Patent number: 8363689
    Abstract: A method of manufacturing a laser diode array capable of inhibiting electric cross talk is provided. The method of manufacturing a laser diode array includes a processing step of forming a peel layer containing an oxidizable material and a vertical resonator structure over a first substrate sequentially from the first substrate side by crystal growth, and then selectively etching the peel layer and the vertical resonator structure to the first substrate, thereby processing into a columnar shape, a peeling step of oxidizing the peel layer from a side face, and then peeling the vertical resonator structure of columnar shape from the first substrate, and a rearrangement step of jointing a plurality of vertical resonator structures of columnar shape obtained by the peeling step to a surface of a metal layer of a second substrate formed with the metal layer on the surface.
    Type: Grant
    Filed: March 11, 2011
    Date of Patent: January 29, 2013
    Assignee: Sony Corporation
    Inventors: Osamu Maeda, Masaki Shiozaki, Takahiro Arakida
  • Patent number: 8363687
    Abstract: A Vertical Cavity Surface Emitting Laser (VCSEL) capable of providing high output of fundamental transverse mode while preventing oscillation of high-order transverse mode is provided. The VCSEL includes a semiconductor layer including an active layer and a current confinement layer, and a transverse mode adjustment section formed on the semiconductor layer. The current confinement layer has a current injection region and a current confinement region. The transverse mode adjustment section has a high reflectance area and a low reflectance area. The high reflectance area is formed in a region including a first opposed region opposing to a center point of the current injection region. A center point of the high reflectance area is arranged in a region different from the first opposed region. The low reflectance area is formed in a region where the high reflectance area is not formed, in an opposed region opposing to the current injection region.
    Type: Grant
    Filed: April 15, 2011
    Date of Patent: January 29, 2013
    Assignee: Sony Corporation
    Inventors: Osamu Maeda, Masaki Shiozaki, Takahiro Arakida
  • Patent number: 8218594
    Abstract: The present invention provides a Vertical Cavity Surface Emitting Laser including: a first multilayer film reflector; an active layer having a light emission region; a second multilayer film reflector; and a reflectance adjustment layer in this order on a substrate side. The first multilayer film reflector and the second multilayer film reflector have a laminated structure in which reflectance of oscillation wavelength ?x is almost constant without depending on temperature change. The active layer is made of a material with which a maximum gain is obtained at temperature higher than ambient temperature. The reflectance adjustment layer has a laminated structure in which difference ?R(=Rx?Ry) between reflectance Rx of a region opposed to a central region of the light emission region and reflectance Ry of a region opposed to an outer edge region of the light emission region is increased associated with temperature increase from ambient temperature to high temperature.
    Type: Grant
    Filed: July 22, 2009
    Date of Patent: July 10, 2012
    Assignee: Sony Corporation
    Inventors: Osamu Maeda, Yuji Masui, Masaki Shiozaki, Takahiro Arakida, Takayuki Kawasumi
  • Patent number: 8098703
    Abstract: A laser diode allowed to stabilize the polarization direction of laser light in one direction is provided. The laser diode includes a laminate configuration including a lower multilayer reflecting mirror, an active layer and an upper multilayer reflecting mirror in order from a substrate side, in which the laminate configuration includes a columnar mesa section including an upper part of the lower multilayer reflecting mirror, the active layer and the upper multilayer reflecting mirror, and the lower multilayer reflecting mirror includes a plurality of pairs of a low refractive index layer and a high refractive index layer, and a plurality of oxidation layers nonuniformly distributed in a direction rotating around a central axis of the mesa section in a region except for a central region of one or more of the low refractive index layers.
    Type: Grant
    Filed: January 29, 2010
    Date of Patent: January 17, 2012
    Assignee: Sony Corporation
    Inventors: Osamu Maeda, Yuji Masui, Masaki Shiozaki, Susumu Sato, Takahiro Arakida
  • Patent number: 8077752
    Abstract: A Vertical Cavity Surface Emitting Laser (VCSEL) capable of providing high output of fundamental transverse mode while preventing oscillation of high-order transverse mode is provided. The VCSEL includes a semiconductor layer including an active layer and a current confinement layer, and a transverse mode adjustment section formed on the semiconductor layer. The current confinement layer has a current injection region and a current confinement region. The transverse mode adjustment section has a high reflectance area and a low reflectance area. The high reflectance area is formed in a region including a first opposed region opposing to a center point of the current injection region. A center point of the high reflectance area is arranged in a region different from the first opposed region. The low reflectance area is formed in a region where the high reflectance area is not formed, in an opposed region opposing to the current injection region.
    Type: Grant
    Filed: December 29, 2008
    Date of Patent: December 13, 2011
    Assignee: Sony Corporation
    Inventors: Osamu Maeda, Masaki Shiozaki, Takahiro Arakida
  • Publication number: 20110243174
    Abstract: There is provided a semiconductor light-emitting device including a temperature detecting section which is allowed to accurately estimate an element temperature. The semiconductor light-emitting device includes: one or a plurality of surface-emitting semiconductor light-emitting sections and one or a plurality of semiconductor temperature detecting sections on a semiconductor substrate, the surface-emitting semiconductor light-emitting sections emitting light in a direction normal to the semiconductor substrate, the semiconductor temperature detecting sections not emitting light to outside. The semiconductor light-emitting sections and the semiconductor temperature detecting sections have a PN junction or a PIN junction in a direction normal to the semiconductor substrate.
    Type: Application
    Filed: March 24, 2011
    Publication date: October 6, 2011
    Applicant: Sony Corporation
    Inventors: Osamu Maeda, Masaki Shiozaki, Susumu Sato, Takahiro Arakida, Shiro Uchida
  • Patent number: RE46059
    Abstract: A method of manufacturing a laser diode array capable of inhibiting electric cross talk is provided. The method of manufacturing a laser diode array includes a processing step of forming a peel layer containing an oxidizable material and a vertical resonator structure over a first substrate sequentially from the first substrate side by crystal growth, and then selectively etching the peel layer and the vertical resonator structure to the first substrate, thereby processing into a columnar shape, a peeling step of oxidizing the peel layer from a side face, and then peeling the vertical resonator structure of columnar shape from the first substrate, and a rearrangement step of jointing a plurality of vertical resonator structures of columnar shape obtained by the peeling step to a surface of a metal layer of a second substrate formed with the metal layer on the surface.
    Type: Grant
    Filed: January 26, 2015
    Date of Patent: July 5, 2016
    Assignee: Sony Corporation
    Inventors: Osamu Maeda, Masaki Shiozaki, Takahiro Arakida
  • Patent number: RE46996
    Abstract: A method of manufacturing a laser diode array capable of inhibiting electric cross talk is provided. The method of manufacturing a laser diode array includes a processing step of forming a peel layer containing an oxidizable material and a vertical resonator structure over a first substrate sequentially from the first substrate side by crystal growth, and then selectively etching the peel layer and the vertical resonator structure to the first substrate, thereby processing into a columnar shape, a peeling step of oxidizing the peel layer from a side face, and then peeling the vertical resonator structure of columnar shape from the first substrate, and a rearrangement step of jointing a plurality of vertical resonator structures of columnar shape obtained by the peeling step to a surface of a metal layer of a second substrate formed with the metal layer on the surface.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: August 14, 2018
    Assignee: Sony Corporation
    Inventors: Osamu Maeda, Masaki Shiozaki, Takahiro Arakida
  • Patent number: RE48577
    Abstract: A Vertical Cavity Surface Emitting Laser (VCSEL) capable of providing high output of fundamental transverse mode while preventing oscillation of high-order transverse mode is provided. The VCSEL includes a semiconductor layer including an active layer and a current confinement layer, and a transverse mode adjustment section formed on the semiconductor layer. The current confinement layer has a current injection region and a current confinement region. The transverse mode adjustment section has a high reflectance area and a low reflectance area. The high reflectance area is formed in a region including a first opposed region opposing to a center point of the current injection region. A center point of the high reflectance area is arranged in a region different from the first opposed region. The low reflectance area is formed in a region where the high reflectance area is not formed, in an opposed region opposing to the current injection region.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: June 1, 2021
    Assignee: Sony Corporation
    Inventors: Osamu Maeda, Masaki Shiozaki, Takahiro Arakida
  • Patent number: RE48880
    Abstract: A method of manufacturing a laser diode array capable of inhibiting electric cross talk is provided. The method of manufacturing a laser diode array includes a processing step of forming a peel layer containing an oxidizable material and a vertical resonator structure over a first substrate sequentially from the first substrate side by crystal growth, and then selectively etching the peel layer and the vertical resonator structure to the first substrate, thereby processing into a columnar shape, a peeling step of oxidizing the peel layer from a side face, and then peeling the vertical resonator structure of columnar shape from the first substrate, and a rearrangement step of jointing a plurality of vertical resonator structures of columnar shape obtained by the peeling step to a surface of a metal layer of a second substrate formed with the metal layer on the surface.
    Type: Grant
    Filed: August 9, 2018
    Date of Patent: January 4, 2022
    Assignee: Sony Group Corporation
    Inventors: Osamu Maeda, Masaki Shiozaki, Takahiro Arakida