Patents by Inventor Masaki Shirai

Masaki Shirai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10438367
    Abstract: A parallax calculating apparatus comprises first parallax calculating means for calculating a first parallax on a basis of a reference image for all pixels in the reference image using SGM method, second parallax calculating means for calculating a second parallax on a basis of the reference image for at least a part of pixels among pixels in the reference image using BM method, and final parallax calculating means for calculating a final parallax of each of pixels in the reference image based on the first and second parallaxes. The final parallax calculating means calculates the first parallax as the final parallax for a pixel for which only the first parallax has been calculated and calculates a parallax where a decimal part of the first parallax is replaced with that of the second parallax as the final parallax for a pixel for which the first and second parallaxes have been calculated.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: October 8, 2019
    Assignees: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Naohide Uchida, Ken Tanabe, Hirotake Ishigami, Masaki Kuwahara, Noriaki Shirai
  • Patent number: 10301547
    Abstract: The present invention relates to a flame retardant composition, including: at least one phosphorus compound represented by the following general formula (1) or (2); a cationic surfactant; and a nonionic surfactant: in the formula (1), A represents a divalent hydrocarbon group having 1 to 20 carbon atoms, n represents a number of from 1 to 10, and R1 to R8 each independently represent a hydrogen atom or an alkyl group having 1 to 20 carbon atoms; in the formula (2), R9 to R14 each independently represent a hydrogen atom or an alkyl group having 1 to 20 carbon atoms, and r1, r2, and r3 each independently represent a number of 1 or 0.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: May 28, 2019
    Assignee: ADEKA CORPORATION
    Inventors: Masahiro Takata, Go Homma, Hiroaki Shirai, Masaki Hosaka
  • Patent number: 7336535
    Abstract: A nonvolatile storage element of a single-layer gate type structure is arranged so that a floating gate is formed of a conductive layer which partly overlaps with a control gate, formed of a diffused layer, and is provided with a barrier layer covering a part of or the whole surface of the floating gate. Nonvolatile storage elements characterized as such are used for redundancy control of defects or change of functions.
    Type: Grant
    Filed: March 28, 2007
    Date of Patent: February 26, 2008
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
    Inventors: Kenichi Kuroda, Toshifumi Takeda, Hisahiro Moriuchi, Masaki Shirai, Jiroh Sakaguchi, Akinori Matsuo, Shoji Yoshida
  • Publication number: 20070171692
    Abstract: A nonvolatile storage element of a single-layer gate type structure is arranged so that a floating gate is formed of a conductive layer which partly overlaps with a control gate, formed of a diffused layer, and is provided with a barrier layer covering a part of or the whole surface of the floating gate. Nonvolatile storage elements characterized as such are used for redundancy control of defects or change of functions.
    Type: Application
    Filed: March 28, 2007
    Publication date: July 26, 2007
    Inventors: Kenichi Kuroda, Toshifumi Takeda, Hisahiro Moriuchi, Masaki Shirai, Jiroh Sakaguchi, Akinori Matsuo, Shoji Yoshida
  • Patent number: 7212425
    Abstract: A nonvolatile storage element of a single-layer gate type structure is arranged so that a floating gate is formed of a conductive layer which partly overlaps with a control gate, formed of a diffused layer, and is provided with a barrier layer covering a part of or the whole surface of the floating gate. Nonvolatile storage elements characterized as such are used for redundancy control of defects or change of functions.
    Type: Grant
    Filed: September 19, 2005
    Date of Patent: May 1, 2007
    Assignees: Renesas Technology Corp., Hitachi Ulsi Systems Co., Ltd.
    Inventors: Kenichi Kuroda, Toshifumi Takeda, Hisahiro Moriuchi, Masaki Shirai, Jiroh Sakaguchi, Akinori Matsuo, Shoji Yoshida
  • Patent number: 7002830
    Abstract: A nonvolatile storage element of a single-layer gate type structure is arranged so that a floating gate is formed of a conductive layer which partly overlaps with a control gate, formed of a diffused layer, and is provided with a barrier layer covering a part of or the whole surface of the floating gate. Nonvolatile storage elements characterized as such are used for redundancy control of defects or change of functions.
    Type: Grant
    Filed: October 28, 2003
    Date of Patent: February 21, 2006
    Assignees: Renesas Technology Corp., Hitachi VLSI Engineering Corp.
    Inventors: Kenichi Kuroda, Toshifumi Takeda, Hisahiro Moriuchi, Masaki Shirai, Jiroh Sakaguchi, Akinori Matsuo, Shoji Yoshida
  • Publication number: 20060018172
    Abstract: A nonvolatile storage element of a single-layer gate type structure is arranged so that a floating gate is formed of a conductive layer which partly overlaps with a control gate, formed of a diffused layer, and is provided with a barrier layer covering a part of or the whole surface of the floating gate. Nonvolatile storage elements characterized as such are used for redundancy control of defects or change of functions.
    Type: Application
    Filed: September 19, 2005
    Publication date: January 26, 2006
    Inventors: Kenichi Kuroda, Toshifumi Takeda, Hisahiro Moriuchi, Masaki Shirai, Jiroh Sakaguchi, Akinori Matsuo, Shoji Yoshida
  • Patent number: 6751138
    Abstract: A nonvolatile storage element of a single-layer gate type structure is arranged so that a floating gate is formed of a conductive layer which partly overlaps with a control gate, formed of a diffused layer, and is provided with a barrier layer covering a part of or the whole surface of the floating gate. Nonvolatile storage elements characterized as such are used for redundancy control of defects or change of functions.
    Type: Grant
    Filed: November 21, 2002
    Date of Patent: June 15, 2004
    Assignees: Renesas Technology Corporation, Hitachi ULSI Systems Co., Ltd.
    Inventors: Kenichi Kuroda, Toshifumi Takeda, Hisahiro Moriuchi, Masaki Shirai, Jiroh Sakaguchi, Akinori Matsuo, Shoji Yoshida
  • Publication number: 20040090838
    Abstract: A nonvolatile storage element of a single-layer gate type structure is arranged so that a floating gate is formed of a conductive layer which partly overlaps with a control gate, formed of a diffused layer, and is provided with a barrier layer covering a part of or the whole surface of the floating gate. Nonvolatile storage elements characterized as such are used for redundancy control of defects or change of functions.
    Type: Application
    Filed: October 28, 2003
    Publication date: May 13, 2004
    Inventors: Kenichi Kuroda, Toshifumi Takeda, Hisahiro Moriuchi, Masaki Shirai, Jiroh Sakaguchi, Akinori Matsuo, Shoji Yoshida
  • Patent number: 6584014
    Abstract: A nonvolatile storage system includes a plurality of nonvolatile memories and a control unit. When having detected a write-in error that occurred at an operation-subject nonvolatile memory, the control unit can set inter-chip alternate information indicating that a storage region related to the write-in error has been replaced by a storage region of any other nonvolatile memory of the plurality of nonvolatile memories to the nonvolatile memory of the storage region related to this error, so that when having received the inter-chip alternate information from the operation-subject nonvolatile memory, the control unit can change the operation subject from the current operation-subject nonvolatile memory to any other nonvolatile memory indicated by this inter-chip alternate information. It is thus possible to rescue a write-in error which occurred at one nonvolatile memory by replacing it with any other chip.
    Type: Grant
    Filed: February 26, 2002
    Date of Patent: June 24, 2003
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Seisuke Hirosawa, Masaki Shirai, Takeshi Suzuki, Katsumi Ouchi
  • Publication number: 20030095434
    Abstract: A nonvolatile storage element of a single-layer gate type structure is arranged so that a floating gate is formed of a conductive layer which partly overlaps with a control gate, formed of a diffused layer, and is provided with a barrier layer covering a part of or the whole surface of the floating gate. Nonvolatile storage elements characterized as such are used for redundancy control of defects or change of functions.
    Type: Application
    Filed: November 21, 2002
    Publication date: May 22, 2003
    Inventors: Kenichi Kuroda, Toshifumi Takeda, Hisahiro Moriuchi, Masaki Shirai, Jiroh Sakaguchi, Akinori Matsuo, Shoji Yoshida
  • Patent number: 6501689
    Abstract: A nonvolatile storage element of a single-layer gate type structure is arranged so that a floating gate is formed of a conductive layer which partly overlaps with a control gate, formed of a diffused layer, and is provided with a barrier layer covering a part of or the whole surface of the floating gate. Nonvolatile storage elements characterized as such are used for redundancy control of defects or change of functions.
    Type: Grant
    Filed: October 25, 2001
    Date of Patent: December 31, 2002
    Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp.
    Inventors: Kenichi Kuroda, Toshifumi Takeda, Hisahiro Moriuchi, Masaki Shirai, Jiroh Sakaguchi, Akinori Matsuo, Shoji Yoshida
  • Publication number: 20020181285
    Abstract: A nonvolatile storage system includes a plurality of nonvolatile memories and a control unit. When having detected a write-in error that occurred at an operation-subject nonvolatile memory, the control unit can set inter-chip alternate information indicating that a storage region related to the write-in error has been replaced by a storage region of any other nonvolatile memory of the plurality of nonvolatile memories to the nonvolatile memory of the storage region related to this error, so that when having received the inter-chip alternate information from the operation-subject nonvolatile memory, the control unit can change the operation subject from the current operation-subject nonvolatile memory to any other nonvolatile memory indicated by this inter-chip alternate information. It is thus possible to rescue a write-in error which occurred at one nonvolatile memory by replacing it with any other chip.
    Type: Application
    Filed: February 26, 2002
    Publication date: December 5, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Seisuke Hirosawa, Masaki Shirai, Takeshi Suzuki, Katsumi Ouchi
  • Publication number: 20020048204
    Abstract: A nonvolatile storage element of a single-layer gate type structure is arranged so that a floating gate is formed of a conductive layer which partly overlaps with a control gate, formed of a diffused layer, and is provided with a barrier layer covering a part of or the whole surface of the floating gate. Nonvolatile storage elements characterized as such are used for redundancy control of defects or change of functions.
    Type: Application
    Filed: October 25, 2001
    Publication date: April 25, 2002
    Inventors: Kenichi Kuroda, Toshifumi Takeda, Hisahiro Moriuchi, Masaki Shirai, Jiroh Sakaguchi, Akinori Matsuo, Shoji Yoshida
  • Patent number: 6064606
    Abstract: A nonvolatile storage element of single-layer gate structure constructed by arranging a floating gate formed of a conductive layer to partly overlap with a control gate formed of a diffused layer is provided with a barrier layer covering a part or the whole of the surface of the floating gate. Such nonvolatile storage elements are used for redundancy control of defects or change of functions.
    Type: Grant
    Filed: December 31, 1997
    Date of Patent: May 16, 2000
    Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp.
    Inventors: Kenichi Kuroda, Toshifumi Takeda, Hisahiro Moriuchi, Masaki Shirai, Jiroh Sakaguchi, Akinori Matsuo, Shoji Yoshida
  • Patent number: 5767544
    Abstract: A nonvolatile storage element of single-layer gate structure constructed by arranging a floating gate formed of a conductive layer to partly overlap with a control gate formed of a diffused layer is provided with a barrier layer covering a part or the whole of the surface of the floating gate. Such nonvolatile storage elements are used for redundancy control of defects or change of functions.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: June 16, 1998
    Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp.
    Inventors: Kenichi Kuroda, Toshifumi Takeda, Hisahiro Moriuchi, Masaki Shirai, Jiroh Sakaguchi, Akinori Matsuo, Shoji Yoshida
  • Patent number: 5457335
    Abstract: A nonvolatile storage element of a single-layer gate type structure is arranged so that a floating gate is formed of a conductive layer which partly overlaps with a control gate, formed of a diffused layer, and is provided with a barrier layer covering a part of or the whole surface of the floating gate. Nonvolatile storage elements characterized as such are used for redundancy control of defects or change of functions.
    Type: Grant
    Filed: July 9, 1991
    Date of Patent: October 10, 1995
    Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp.
    Inventors: Kenichi Kuroda, Toshifumi Takeda, Hisahiro Moriuchi, Masaki Shirai, Jiroh Sakaguchi, Akinori Matsuo, Shoji Yoshida
  • Patent number: 5383162
    Abstract: A non-volatile memory element comprising a control gate formed by a diffusion layer, a floating gate comprising a conductive layer, the floating gate being partly overlapping with the control gate through a thin insulating layer, and a barrier layer formed to cover a part or the entire part of the floating gate is used as a defect remedy circuit for the memory circuit having read-only memory elements arranged in the form of a matrix for storing defective addresses corresponding to the word lines and bit lines and storing data corresponding thereto respectively.
    Type: Grant
    Filed: August 26, 1992
    Date of Patent: January 17, 1995
    Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp.
    Inventors: Masaki Shirai, Hisahiro Moriuchi, Yasuhiro Yoshii, Kenichi Kuroda, Akinori Matsuo