Abstract: A workpiece transfer system includes a bracket rotatably supported on a support part, a rotary drive mechanism provided on the support part in order to rotate the bracket, a workpiece support arm swingably and axially supported on the bracket, a swing drive mechanism provided on the bracket in order to swing the workpiece support arm, and a workpiece retainer provided on a tip end part of the workpiece support arm and retaining a workpiece that is to be transferred, the workpiece being inclined by operation of the swing drive mechanism when the rotary drive mechanism is operated so that a center of gravity of the workpiece comes on the vicinity of an axis of rotation of the rotary drive mechanism. This reduces the rotational load on the rotary drive mechanism, and since a small size and a reduction in weight can be achieved for the system, the workpiece transfer system and method enables a single worker to easily give a workpiece an inclination and inversion attitude change.

Abstract: A transfer system includes transfer lines (L) each of which forms a closed loop and has transfer-in stations (S1 and S3) and transfer-out stations (S2 and S4) for assembling parts to a work, while circulating the work along the transfer line (L); and a work and part transfer passage (51) for transferring the work and the parts. Transfer-in stations (S1 and S3) and the transfer-out stations (S2 and S4) are disposed at each of the longitudinal ends of each of the transfer lines (L). Sub-transfer-passages (521 and 522) branching out rightward and leftward from the work and part transfer passage (51), are disposed along longitudinal sides of the transfer lines (L). With this layout, a plurality of the transfer lines (L) can be disposed in a required minimum space, while securing a smooth supply and discharge of the works and parts with respect to the plurality of the transfer lines L.

Abstract: A transfer system includes transfer lines (L) each of which forms a closed loop and has transfer-in stations (S1 and S3) and transfer-out stations (S2 and S4) for assembling parts to a work, while circulating the work along the transfer line (L); and a work and part transfer passage (51) for transferring the work and the parts. Transfer-in stations (S1 and S3) and the transfer-out stations (S2 and S4) are disposed at each of the longitudinal ends of each of the transfer lines (L). Sub-transfer-passages (521 and 522) branching out rightward and leftward from the work and part transfer passage (51), are disposed along longitudinal sides of the transfer lines (L). With this layout, a plurality of the transfer lines (L) can be disposed in a required minimum space, while securing a smooth supply and discharge of the works and parts with respect to the plurality of the transfer lines L.

Abstract: A transfer line (L) is formed by a first conveyer (C1) and a second conveyer (C2) which are disposed in parallel to each other for transferring a pallet, a first traverser (T1) for transporting the pallet (P) from a terminal end of the first conveyer (C1) to a start end of the second conveyer (C2), and a second traverser (T2) for transporting the pallet (P) from a terminal end of the second conveyer (C2) to a start end of the first conveyer (C1). The first and second conveyers (C1 and C2) are operable to drive main drive rollers (22) provided at start ends of the conveyers by bringing the rollers into abutment against side surfaces of rearmost pallets (P) in the advancing direction, thereby urging and collectively driving a plurality of pallets (P) which are connected together forwardly of the rearmost pallets (P) in a state in contact with the rearmost pallets. This enables the length of the transfer line (L) to be changed as desired without modification of a drive device for the pallet (P).

Abstract: A DRAM having a plurality of bit lines and associated sense amplifiers, the bit lines being arrayed across an integrated circuit chip and the sense amplifiers being disposed in a row, a pair of low resistance power supply conductors extending in parallel with the row for carrying logic high level and logic low level voltages, sense amplifier enabling signal conductors extending across the chip accessible to the sense amplifiers, apparatus for coupling sense inputs of the sense amplifiers to the power supply conductors, and apparatus coupling the sense amplifier enabling signal conductors to the apparatus for coupling sense inputs, for enabling passage of current resulting from the logic high level and low level voltages to the sense amplifiers.

Abstract: Apparatus and methods for controlling the sensing of bit lines which facilitates the distribution of bit line charging current to be distributed any time, and facilitates the fast raising of the sense modes to full logic levels. An embodiment is comprised of a plurality of bit storage capacitors, a folded bit line for receiving charge stored on one of the capacitors, having bit line capacitance, a sense amplifier having a pair of sense nodes for sensing a voltage differential across the sense nodes, apparatus connected to the bit line and the sense nodes for imperfectly isolating the sense nodes from the bit line whereby current can leak therethrough, apparatus for enabling the sense amplifier and for disabling the isolating apparatus and thereby removing the isolation between the sense amplifier and the bit line, whereby current passing through the sense amplifier to the sense nodes is enabled to charge the bit line capacitance through the isolating apparatus to predetermined logic voltage level.

Abstract: Apparatus and methods for controlling the sensing of bit lines which facilitates the distribution of bit line charging current to be distributed any time, and facilitates the fast raising of the sense modes to full logic levels. An embodiment is comprised of a plurality of bit storage capacitors, a folded bit line for receiving charge stored on one of the capacitors, having bit line capacitance, a sense amplifier having a pair of sense nodes for sensing a voltage differential across the sense nodes, apparatus connected to the bit line and the sense nodes for imperfectly isolating the sense nodes from the bit line whereby current can leak therethrough, apparatus for enabling the sense amplifier and for disabling the isolating apparatus and thereby removing the isolation between the sense amplifier and the bit line, whereby current passing through the sense amplifier to the sense noes is enabled to charge the bit line capacitance through the isolating apparatus to predetermined logic voltage level.

Abstract: Apparatus and methods for controlling the sensing of bit lines which facilitates the distribution of bit line charging current to be distributed any time, and facilitates the fast raising of the sense modes to full logic levels. An embodiment is comprised of a plurality of bit storage capacitors, a folded bit line for receiving charge stored on one of the capacitors, having bit line capacitance, a sense amplifier having a pair of sense nodes for sensing a voltage differential across the sense nodes, apparatus connected to the bit line and the sense nodes for imperfectly isolating the sense nodes from the bit line whereby current can leak therethrough, apparatus for enabling the sense amplifier and for disabling the isolating apparatus and thereby removing the isolation between the sense amplifier and the bit line, whereby current passing through the sense amplifier to the sense nodes is enabled to charge the bit line capacitance through the isolating apparatus to predetermined logic voltage level.